[llvm-branch-commits] [llvm-branch] r216089 - Merging r216064:

[Bill Wendling]

Author: void
Date: Wed Aug 20 12:42:35 2014
New Revision: 216089

URL: http://llvm.org/viewvc/llvm-project?rev=216089&view=rev
Log:
Merging r216064:
------------------------------------------------------------------------
r216064 | kongyi | 2014-08-20 03:40:20 -0700 (Wed, 20 Aug 2014) | 9 lines

ARM: Fix codegen for rbit intrinsic

LLVM generates illegal `rbit r0, #352` instruction for rbit intrinsic.
According to ARM ARM, rbit only takes register as argument, not immediate.
The correct instruction should be rbit <Rd>, <Rm>.

The bug was originally introduced in r211057.

Differential Revision: http://reviews.llvm.org/D4980
------------------------------------------------------------------------

Added:
    llvm/branches/release_35/test/CodeGen/AArch64/rbit.ll
      - copied unchanged from r216064, llvm/trunk/test/CodeGen/AArch64/rbit.ll
    llvm/branches/release_35/test/CodeGen/ARM/rbit.ll
      - copied unchanged from r216064, llvm/trunk/test/CodeGen/ARM/rbit.ll
Modified:
    llvm/branches/release_35/   (props changed)
    llvm/branches/release_35/lib/Target/ARM/ARMISelLowering.cpp

Propchange: llvm/branches/release_35/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Wed Aug 20 12:42:35 2014
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,213653,213665,213726,213749,213773,213793,213798-213799,213815,213847,213880,213883-213884,213894-213896,213899,213915,213966,213999,214060,214129,214180,214287,214331,214423,214429,214519,214670,214674,214679,215685,215711,215806
+/llvm/trunk:155241,213653,213665,213726,213749,213773,213793,213798-213799,213815,213847,213880,213883-213884,213894-213896,213899,213915,213966,213999,214060,214129,214180,214287,214331,214423,214429,214519,214670,214674,214679,215685,215711,215806,216064

Modified: llvm/branches/release_35/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/Target/ARM/ARMISelLowering.cpp?rev=216089&r1=216088&r2=216089&view=diff
==============================================================================
--- llvm/branches/release_35/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/branches/release_35/lib/Target/ARM/ARMISelLowering.cpp Wed Aug 20 12:42:35 2014
@@ -2578,9 +2578,9 @@ ARMTargetLowering::LowerINTRINSIC_WO_CHA
   switch (IntNo) {
   default: return SDValue();    // Don't custom lower most intrinsics.
   case Intrinsic::arm_rbit: {
-    assert(Op.getOperand(0).getValueType() == MVT::i32 &&
+    assert(Op.getOperand(1).getValueType() == MVT::i32 &&
            "RBIT intrinsic must have i32 type!");
-    return DAG.getNode(ARMISD::RBIT, dl, MVT::i32, Op.getOperand(0));
+    return DAG.getNode(ARMISD::RBIT, dl, MVT::i32, Op.getOperand(1));
   }
   case Intrinsic::arm_thread_pointer: {
     EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();