[llvm-branch-commits] [llvm-branch] r206056 - Merging r201507:

[Tom Stellard]

Author: tstellar
Date: Fri Apr 11 14:35:46 2014
New Revision: 206056

URL: http://llvm.org/viewvc/llvm-project?rev=206056&view=rev
Log:
Merging r201507:

------------------------------------------------------------------------
r201507 | craig.topper | 2014-02-17 05:03:43 -0500 (Mon, 17 Feb 2014) | 2 lines

Fix diassembler handling of rex.b when mod=00/01/10 and bbb=101. Mod=00 should ignore the base register entirely. Mod=01/10 should treat this as R13 plus displacment. Fixes PR18860.

------------------------------------------------------------------------

Modified:
    llvm/branches/release_34/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
    llvm/branches/release_34/test/MC/Disassembler/X86/x86-64.txt

Modified: llvm/branches/release_34/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c?rev=206056&r1=206055&r2=206056&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c (original)
+++ llvm/branches/release_34/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c Fri Apr 11 14:35:46 2014
@@ -1065,6 +1065,7 @@ static int readSIB(struct InternalInstru
 
   switch (base) {
   case 0x5:
+  case 0xd:
     switch (modFromModRM(insn->modRM)) {
     case 0x0:
       insn->eaDisplacement = EA_DISP_32;
@@ -1072,13 +1073,11 @@ static int readSIB(struct InternalInstru
       break;
     case 0x1:
       insn->eaDisplacement = EA_DISP_8;
-      insn->sibBase = (insn->addressSize == 4 ?
-                       SIB_BASE_EBP : SIB_BASE_RBP);
+      insn->sibBase = (SIBBase)(sibBaseBase + base);
       break;
     case 0x2:
       insn->eaDisplacement = EA_DISP_32;
-      insn->sibBase = (insn->addressSize == 4 ?
-                       SIB_BASE_EBP : SIB_BASE_RBP);
+      insn->sibBase = (SIBBase)(sibBaseBase + base);
       break;
     case 0x3:
       debug("Cannot have Mod = 0b11 and a SIB byte");

Modified: llvm/branches/release_34/test/MC/Disassembler/X86/x86-64.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/test/MC/Disassembler/X86/x86-64.txt?rev=206056&r1=206055&r2=206056&view=diff
==============================================================================
--- llvm/branches/release_34/test/MC/Disassembler/X86/x86-64.txt (original)
+++ llvm/branches/release_34/test/MC/Disassembler/X86/x86-64.txt Fri Apr 11 14:35:46 2014
@@ -241,3 +241,27 @@
 
 # CHECK: pextrw $3, %xmm3, (%rax)
 0x66 0x0f 0x3a 0x15 0x18 0x03
+
+# CHECK: $0, 305419896(,%r8)
+0x43 0x80 0x04 0x05 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(%r13,%r8)
+0x43 0x80 0x84 0x05 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(,%r8)
+0x42 0x80 0x04 0x05 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(%rbp,%r8)
+0x42 0x80 0x84 0x05 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(,%r12)
+0x42 0x80 0x04 0x25 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(%rbp,%r12)
+0x42 0x80 0x84 0x25 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896
+0x80 0x04 0x25 0x78 0x56 0x34 0x12 0x00
+
+# CHECK: $0, 305419896(%rbp)
+0x80 0x84 0x25 0x78 0x56 0x34 0x12 0x00