[llvm-branch-commits] [llvm-branch] r205902 - Merging r201541:

[Tom Stellard]

Author: tstellar
Date: Wed Apr  9 10:24:16 2014
New Revision: 205902

URL: http://llvm.org/viewvc/llvm-project?rev=205902&view=rev
Log:
Merging r201541:

------------------------------------------------------------------------
r201541 | jiangning.liu | 2014-02-17 21:37:42 -0500 (Mon, 17 Feb 2014) | 2 lines

Fix a typo about lowering AArch64 va_copy.

------------------------------------------------------------------------

Modified:
    llvm/branches/release_34/lib/Target/AArch64/AArch64ISelLowering.cpp
    llvm/branches/release_34/test/CodeGen/AArch64/variadic.ll

Modified: llvm/branches/release_34/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=205902&r1=205901&r2=205902&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/branches/release_34/lib/Target/AArch64/AArch64ISelLowering.cpp Wed Apr  9 10:24:16 2014
@@ -2782,7 +2782,7 @@ AArch64TargetLowering::LowerSETCC(SDValu
 SDValue
 AArch64TargetLowering::LowerVACOPY(SDValue Op, SelectionDAG &DAG) const {
   const Value *DestSV = cast<SrcValueSDNode>(Op.getOperand(3))->getValue();
-  const Value *SrcSV = cast<SrcValueSDNode>(Op.getOperand(3))->getValue();
+  const Value *SrcSV = cast<SrcValueSDNode>(Op.getOperand(4))->getValue();
 
   // We have to make sure we copy the entire structure: 8+8+8+4+4 = 32 bytes
   // rather than just 8.

Modified: llvm/branches/release_34/test/CodeGen/AArch64/variadic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/test/CodeGen/AArch64/variadic.ll?rev=205902&r1=205901&r2=205902&view=diff
==============================================================================
--- llvm/branches/release_34/test/CodeGen/AArch64/variadic.ll (original)
+++ llvm/branches/release_34/test/CodeGen/AArch64/variadic.ll Wed Apr  9 10:24:16 2014
@@ -179,24 +179,19 @@ define void @test_va_copy() {
 
 ; Check beginning and end again:
 
-; CHECK: ldr [[BLOCK:x[0-9]+]], [{{x[0-9]+}}, #:lo12:var]
 ; CHECK: add x[[SRC_LIST:[0-9]+]], {{x[0-9]+}}, #:lo12:var
-; CHECK-NOFP: ldr [[BLOCK:x[0-9]+]], [{{x[0-9]+}}, #:lo12:var]
-; CHECK-NOFP: add x[[SRC_LIST:[0-9]+]], {{x[0-9]+}}, #:lo12:var
-
-; CHECK: str [[BLOCK]], [{{x[0-9]+}}, #:lo12:second_list]
-
-; CHECK: ldr [[BLOCK:x[0-9]+]], [x[[SRC_LIST]], #24]
 ; CHECK: add x[[DEST_LIST:[0-9]+]], {{x[0-9]+}}, #:lo12:second_list
+; CHECK: ldr [[BLOCK1:x[0-9]+]], [{{x[0-9]+}}, #:lo12:var]
+; CHECK: ldr [[BLOCK2:x[0-9]+]], [x[[SRC_LIST]], #24]
+; CHECK: str [[BLOCK1]], [{{x[0-9]+}}, #:lo12:second_list]
+; CHECK: str [[BLOCK2]], [x[[DEST_LIST]], #24]
 
-; CHECK: str [[BLOCK]], [x[[DEST_LIST]], #24]
-
-; CHECK-NOFP: str [[BLOCK]], [{{x[0-9]+}}, #:lo12:second_list]
-
-; CHECK-NOFP: ldr [[BLOCK:x[0-9]+]], [x[[SRC_LIST]], #24]
+; CHECK-NOFP: add x[[SRC_LIST:[0-9]+]], {{x[0-9]+}}, #:lo12:var
 ; CHECK-NOFP: add x[[DEST_LIST:[0-9]+]], {{x[0-9]+}}, #:lo12:second_list
-
-; CHECK-NOFP: str [[BLOCK]], [x[[DEST_LIST]], #24]
+; CHECK-NOFP: ldr [[BLOCK1:x[0-9]+]], [{{x[0-9]+}}, #:lo12:var]
+; CHECK-NOFP: ldr [[BLOCK2:x[0-9]+]], [x[[SRC_LIST]], #24]
+; CHECK-NOFP: str [[BLOCK1]], [{{x[0-9]+}}, #:lo12:second_list]
+; CHECK-NOFP: str [[BLOCK2]], [x[[DEST_LIST]], #24]
 
   ret void
 ; CHECK: ret