[llvm-branch-commits] [llvm-branch] r205822 - Merging r202192:
Tom Stellard
thomas.stellard at amd.com
Tue Apr 8 17:20:53 PDT 2014
Author: tstellar
Date: Tue Apr 8 19:20:52 2014
New Revision: 205822
URL: http://llvm.org/viewvc/llvm-project?rev=205822&view=rev
Log:
Merging r202192:
------------------------------------------------------------------------
r202192 | hfinkel | 2014-02-25 15:51:50 -0500 (Tue, 25 Feb 2014) | 5 lines
Account for 128-bit integer operations in PPCCTRLoops
We need to abort the formation of counter-register-based loops where there are
128-bit integer operations that might become function calls.
------------------------------------------------------------------------
Added:
llvm/branches/release_34/test/CodeGen/PowerPC/ctrloop-udivti3.ll
Modified:
llvm/branches/release_34/lib/Target/PowerPC/PPCCTRLoops.cpp
Modified: llvm/branches/release_34/lib/Target/PowerPC/PPCCTRLoops.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/PowerPC/PPCCTRLoops.cpp?rev=205822&r1=205821&r2=205822&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/PowerPC/PPCCTRLoops.cpp (original)
+++ llvm/branches/release_34/lib/Target/PowerPC/PPCCTRLoops.cpp Tue Apr 8 19:20:52 2014
@@ -186,6 +186,13 @@ bool PPCCTRLoops::runOnFunction(Function
return MadeChange;
}
+static bool isLargeIntegerTy(bool Is32Bit, Type *Ty) {
+ if (IntegerType *ITy = dyn_cast<IntegerType>(Ty))
+ return ITy->getBitWidth() > (Is32Bit ? 32 : 64);
+
+ return false;
+}
+
bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) {
for (BasicBlock::iterator J = BB->begin(), JE = BB->end();
J != JE; ++J) {
@@ -352,13 +359,11 @@ bool PPCCTRLoops::mightUseCTR(const Trip
CastInst *CI = cast<CastInst>(J);
if (CI->getSrcTy()->getScalarType()->isPPC_FP128Ty() ||
CI->getDestTy()->getScalarType()->isPPC_FP128Ty() ||
- (TT.isArch32Bit() &&
- (CI->getSrcTy()->getScalarType()->isIntegerTy(64) ||
- CI->getDestTy()->getScalarType()->isIntegerTy(64))
- ))
+ isLargeIntegerTy(TT.isArch32Bit(), CI->getSrcTy()->getScalarType()) ||
+ isLargeIntegerTy(TT.isArch32Bit(), CI->getDestTy()->getScalarType()))
return true;
- } else if (TT.isArch32Bit() &&
- J->getType()->getScalarType()->isIntegerTy(64) &&
+ } else if (isLargeIntegerTy(TT.isArch32Bit(),
+ J->getType()->getScalarType()) &&
(J->getOpcode() == Instruction::UDiv ||
J->getOpcode() == Instruction::SDiv ||
J->getOpcode() == Instruction::URem ||
Added: llvm/branches/release_34/test/CodeGen/PowerPC/ctrloop-udivti3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/test/CodeGen/PowerPC/ctrloop-udivti3.ll?rev=205822&view=auto
==============================================================================
--- llvm/branches/release_34/test/CodeGen/PowerPC/ctrloop-udivti3.ll (added)
+++ llvm/branches/release_34/test/CodeGen/PowerPC/ctrloop-udivti3.ll Tue Apr 8 19:20:52 2014
@@ -0,0 +1,31 @@
+; RUN: llc < %s -march=ppc64 | FileCheck %s
+target datalayout = "E-m:e-i64:64-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+; Function Attrs: nounwind
+define hidden void @_mpd_shortdiv(i64 %n) #0 {
+entry:
+ br i1 undef, label %for.end, label %for.body.lr.ph
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body, %for.body.lr.ph
+ %i.018.in = phi i64 [ %n, %for.body.lr.ph ], [ %i.018, %for.body ]
+ %i.018 = add i64 %i.018.in, -1
+ %add.i = or i128 undef, undef
+ %div.i = udiv i128 %add.i, 0
+ %conv3.i11 = trunc i128 %div.i to i64
+ store i64 %conv3.i11, i64* undef, align 8
+ %cmp = icmp eq i64 %i.018, 0
+ br i1 %cmp, label %for.end, label %for.body
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+; CHECK-LABEL: @_mpd_shortdiv
+; CHECK-NOT: mtctr
+
+attributes #0 = { nounwind }
+
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