[llvm-branch-commits] [llvm-branch] r205765 - Merging r196987:

[Tom Stellard]

Author: tstellar
Date: Tue Apr  8 09:27:52 2014
New Revision: 205765

URL: http://llvm.org/viewvc/llvm-project?rev=205765&view=rev
Log:
Merging r196987:

------------------------------------------------------------------------
r196987 | rafael.espindola | 2013-12-10 19:09:06 -0500 (Tue, 10 Dec 2013) | 2 lines

Move PPC's getDataLayoutString out of line and document it better.

------------------------------------------------------------------------

Modified:
    llvm/branches/release_34/lib/Target/PowerPC/PPCSubtarget.h
    llvm/branches/release_34/lib/Target/PowerPC/PPCTargetMachine.cpp

Modified: llvm/branches/release_34/lib/Target/PowerPC/PPCSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/PowerPC/PPCSubtarget.h?rev=205765&r1=205764&r2=205765&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/PowerPC/PPCSubtarget.h (original)
+++ llvm/branches/release_34/lib/Target/PowerPC/PPCSubtarget.h Tue Apr  8 09:27:52 2014
@@ -126,22 +126,6 @@ public:
   /// selection.
   const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
 
-  /// getDataLayoutString - Return the pointer size and type alignment
-  /// properties of this subtarget.
-  const char *getDataLayoutString() const {
-    // Note, the alignment values for f64 and i64 on ppc64 in Darwin
-    // documentation are wrong; these are correct (i.e. "what gcc does").
-    if (isPPC64() && isSVR4ABI()) {
-      if (TargetTriple.getOS() == llvm::Triple::FreeBSD)
-        return "E-p:64:64-f64:64:64-i64:64:64-v128:128:128-n32:64";
-      else
-        return "E-p:64:64-f64:64:64-i64:64:64-f128:128:128-v128:128:128-n32:64";
-    }
-
-    return isPPC64() ? "E-p:64:64-f64:64:64-i64:64:64-f128:64:128-n32:64"
-                     : "E-p:32:32-f64:64:64-i64:64:64-f128:64:128-n32";
-  }
-
   /// \brief Reset the features for the PowerPC target.
   virtual void resetSubtargetFeatures(const MachineFunction *MF);
 private:

Modified: llvm/branches/release_34/lib/Target/PowerPC/PPCTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=205765&r1=205764&r2=205765&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/PowerPC/PPCTargetMachine.cpp (original)
+++ llvm/branches/release_34/lib/Target/PowerPC/PPCTargetMachine.cpp Tue Apr  8 09:27:52 2014
@@ -33,6 +33,44 @@ extern "C" void LLVMInitializePowerPCTar
   RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
 }
 
+/// Return the datalayout string of a subtarget.
+static std::string getDataLayoutString(const PPCSubtarget &ST) {
+  const Triple &T = ST.getTargetTriple();
+
+  // PPC is big endian
+  std::string Ret = "E";
+
+  // PPC64 has 64 bit pointers, PPC32 has 32 bit pointers.
+  if (ST.isPPC64())
+    Ret += "-p:64:64";
+  else
+    Ret += "-p:32:32";
+
+  // Note, the alignment values for f64 and i64 on ppc64 in Darwin
+  // documentation are wrong; these are correct (i.e. "what gcc does").
+  Ret += "-f64:64:64-i64:64:64";
+
+  // Set support for 128 floats depending on the ABI.
+  if (ST.isPPC64() && ST.isSVR4ABI()) {
+    if (T.getOS() != llvm::Triple::FreeBSD)
+      Ret += "-f128:128:128";
+  } else {
+    Ret += "-f128:64:128";
+  }
+
+  // Some ABIs support 128 bit vectors.
+  if (ST.isPPC64() && ST.isSVR4ABI())
+    Ret += "-v128:128:128";
+
+  // PPC64 has 32 and 64 bit register, PPC32 has only 32 bit ones.
+  if (ST.isPPC64())
+    Ret += "-n32:64";
+  else
+    Ret += "-n32";
+
+  return Ret;
+}
+
 PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT,
                                    StringRef CPU, StringRef FS,
                                    const TargetOptions &Options,
@@ -41,7 +79,7 @@ PPCTargetMachine::PPCTargetMachine(const
                                    bool is64Bit)
   : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
     Subtarget(TT, CPU, FS, is64Bit),
-    DL(Subtarget.getDataLayoutString()), InstrInfo(*this),
+    DL(getDataLayoutString(Subtarget)), InstrInfo(*this),
     FrameLowering(Subtarget), JITInfo(*this, is64Bit),
     TLInfo(*this), TSInfo(*this),
     InstrItins(Subtarget.getInstrItineraryData()) {