[llvm-branch-commits] [llvm-branch] r196027 - Merging r195932:

Bill Wendling isanbard at gmail.com
Sat Nov 30 20:37:07 PST 2013


Author: void
Date: Sat Nov 30 22:37:07 2013
New Revision: 196027

URL: http://llvm.org/viewvc/llvm-project?rev=196027&view=rev
Log:
Merging r195932:
------------------------------------------------------------------------
r195932 | d0k | 2013-11-28 11:58:56 -0800 (Thu, 28 Nov 2013) | 3 lines

Silence sign-compare warning and reduce nesting.

No functionality change.
------------------------------------------------------------------------

Modified:
    llvm/branches/release_34/   (props changed)
    llvm/branches/release_34/lib/Target/AArch64/AArch64ISelLowering.cpp

Propchange: llvm/branches/release_34/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Sat Nov 30 22:37:07 2013
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195136,195138,195148,195152,195156-195157,195161-195162,195193,195272,195317-195318,195327,195330,195333,195339,195343,195355,195364,195379,195397-195399,195408,195421,195423-195424,195432,195439,195444,195455-195456,195469,195476-195477,195479,195491-195493,195514,195528,195547,195567,195573-195576,195590-195591,195599,195632,195635-195636,195670,195677,195679,195682,195684,195713,195716,195769,195773,195779,195782,195787-195788,195791,195798,195803,195812,195827,195834,195843-195844,195878-195881,195887,195903,195905,195915,196004
+/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195136,195138,195148,195152,195156-195157,195161-195162,195193,195272,195317-195318,195327,195330,195333,195339,195343,195355,195364,195379,195397-195399,195408,195421,195423-195424,195432,195439,195444,195455-195456,195469,195476-195477,195479,195491-195493,195514,195528,195547,195567,195573-195576,195590-195591,195599,195632,195635-195636,195670,195677,195679,195682,195684,195713,195716,195769,195773,195779,195782,195787-195788,195791,195798,195803,195812,195827,195834,195843-195844,195878-195881,195887,195903,195905,195915,195932,196004

Modified: llvm/branches/release_34/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=196027&r1=196026&r2=196027&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/branches/release_34/lib/Target/AArch64/AArch64ISelLowering.cpp Sat Nov 30 22:37:07 2013
@@ -4239,13 +4239,13 @@ AArch64TargetLowering::LowerVECTOR_SHUFF
                          DAG.getConstant(Lane + ExtLane, MVT::i64));
     }
     // Test if V1 is a CONCAT_VECTORS.
-    if (V1.getOpcode() == ISD::CONCAT_VECTORS) {
-      if (V1.getOperand(1).getOpcode() == ISD::UNDEF) {
-        assert((Lane < V1.getOperand(0).getValueType().getVectorNumElements())
-               && "Invalid vector lane access");
-        return DAG.getNode(AArch64ISD::NEON_VDUPLANE, dl, VT, V1.getOperand(0),
-                           DAG.getConstant(Lane, MVT::i64));
-      }
+    if (V1.getOpcode() == ISD::CONCAT_VECTORS &&
+        V1.getOperand(1).getOpcode() == ISD::UNDEF) {
+      SDValue Op0 = V1.getOperand(0);
+      assert((unsigned)Lane < Op0.getValueType().getVectorNumElements() &&
+             "Invalid vector lane access");
+      return DAG.getNode(AArch64ISD::NEON_VDUPLANE, dl, VT, Op0,
+                         DAG.getConstant(Lane, MVT::i64));
     }
 
     return DAG.getNode(AArch64ISD::NEON_VDUPLANE, dl, VT, V1,





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