[llvm-branch-commits] [llvm-branch] r195821 - Merging r195779:

Bill Wendling isanbard at gmail.com
Tue Nov 26 22:36:21 PST 2013


Author: void
Date: Wed Nov 27 00:36:20 2013
New Revision: 195821

URL: http://llvm.org/viewvc/llvm-project?rev=195821&view=rev
Log:
Merging r195779:
------------------------------------------------------------------------
r195779 | hliao | 2013-11-26 12:31:31 -0800 (Tue, 26 Nov 2013) | 7 lines

Fix PR18054

- Fix bug in (vsext (vzext x)) -> (vsext x) in SIGN_EXTEND_IN_REG
  lowering where we need to check whether x is a vector type (in-reg
  type) of i8, i16 or i32; otherwise, that optimization is not valid.


------------------------------------------------------------------------

Added:
    llvm/branches/release_34/test/CodeGen/X86/pr18054.ll
      - copied unchanged from r195779, llvm/trunk/test/CodeGen/X86/pr18054.ll
Modified:
    llvm/branches/release_34/   (props changed)
    llvm/branches/release_34/lib/Target/X86/X86ISelLowering.cpp

Propchange: llvm/branches/release_34/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Wed Nov 27 00:36:20 2013
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195136,195138,195152,195156-195157,195161-195162,195193,195272,195317-195318,195327,195330,195333,195339,195343,195355,195364,195379,195397-195399,195408,195421,195423-195424,195432,195439,195444,195455-195456,195469,195476-195477,195479,195491-195493,195514,195528,195547,195567,195591,195599,195632,195635-195636,195670,195679,195682,195684,195713,195716,195769,195773,195791
+/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195136,195138,195152,195156-195157,195161-195162,195193,195272,195317-195318,195327,195330,195333,195339,195343,195355,195364,195379,195397-195399,195408,195421,195423-195424,195432,195439,195444,195455-195456,195469,195476-195477,195479,195491-195493,195514,195528,195547,195567,195591,195599,195632,195635-195636,195670,195679,195682,195684,195713,195716,195769,195773,195779,195791

Modified: llvm/branches/release_34/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/X86/X86ISelLowering.cpp?rev=195821&r1=195820&r2=195821&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/release_34/lib/Target/X86/X86ISelLowering.cpp Wed Nov 27 00:36:20 2013
@@ -13120,19 +13120,27 @@ SDValue X86TargetLowering::LowerSIGN_EXT
       // fall through
     case MVT::v4i32:
     case MVT::v8i16: {
-      // (sext (vzext x)) -> (vsext x)
       SDValue Op0 = Op.getOperand(0);
       SDValue Op00 = Op0.getOperand(0);
       SDValue Tmp1;
       // Hopefully, this VECTOR_SHUFFLE is just a VZEXT.
       if (Op0.getOpcode() == ISD::BITCAST &&
-          Op00.getOpcode() == ISD::VECTOR_SHUFFLE)
+          Op00.getOpcode() == ISD::VECTOR_SHUFFLE) {
+        // (sext (vzext x)) -> (vsext x)
         Tmp1 = LowerVectorIntExtend(Op00, Subtarget, DAG);
-      if (Tmp1.getNode()) {
-        SDValue Tmp1Op0 = Tmp1.getOperand(0);
-        assert(Tmp1Op0.getOpcode() == X86ISD::VZEXT &&
-               "This optimization is invalid without a VZEXT.");
-        return DAG.getNode(X86ISD::VSEXT, dl, VT, Tmp1Op0.getOperand(0));
+        if (Tmp1.getNode()) {
+          EVT ExtraEltVT = ExtraVT.getVectorElementType();
+          // This folding is only valid when the in-reg type is a vector of i8,
+          // i16, or i32.
+          if (ExtraEltVT == MVT::i8 || ExtraEltVT == MVT::i16 ||
+              ExtraEltVT == MVT::i32) {
+            SDValue Tmp1Op0 = Tmp1.getOperand(0);
+            assert(Tmp1Op0.getOpcode() == X86ISD::VZEXT &&
+                   "This optimization is invalid without a VZEXT.");
+            return DAG.getNode(X86ISD::VSEXT, dl, VT, Tmp1Op0.getOperand(0));
+          }
+          Op0 = Tmp1;
+        }
       }
 
       // If the above didn't work, then just use Shift-Left + Shift-Right.





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