[llvm-branch-commits] [llvm-branch] r196074 - Merging r196046:
Bill Wendling
isanbard at gmail.com
Sun Dec 1 23:38:06 PST 2013
Author: void
Date: Mon Dec 2 01:38:06 2013
New Revision: 196074
URL: http://llvm.org/viewvc/llvm-project?rev=196074&view=rev
Log:
Merging r196046:
------------------------------------------------------------------------
r196046 | tnorthover | 2013-12-01 06:16:24 -0800 (Sun, 01 Dec 2013) | 8 lines
ARM: fix bug in -Oz stack adjustment folding
Previously, we clobbered callee-saved registers when folding an "add
sp, #N" into a "pop {rD, ...}" instruction. This change checks whether
a register we're going to add to the "pop" could actually be live
outside the function before doing so and should fix the issue.
This should fix PR18081.
------------------------------------------------------------------------
Modified:
llvm/branches/release_34/ (props changed)
llvm/branches/release_34/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/branches/release_34/lib/Target/ARM/ARMBaseRegisterInfo.h
llvm/branches/release_34/lib/Target/ARM/ARMFrameLowering.cpp
llvm/branches/release_34/lib/Target/ARM/Thumb1FrameLowering.cpp
llvm/branches/release_34/test/CodeGen/ARM/fold-stack-adjust.ll
Propchange: llvm/branches/release_34/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Dec 2 01:38:06 2013
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Pertwee:110850,110961
/llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195136,195138,195148,195152,195156-195157,195161-195162,195193,195272,195317-195318,195327,195330,195333,195339,195343,195355,195364,195379,195397-195399,195401,195408,195421,195423-195424,195432,195439,195444,195455-195456,195469,195476-195477,195479,195491-195493,195514,195528,195547,195567,195573-195576,195590-195591,195599,195632,195635-195636,195670,195677,195679,195682,195684,195713,195716,195769,195773,195779,195782,195787-195788,195791,195803,195812,195827,195834,195843-195844,195878-195881,195887,195903,195905,195915,195932,195936-195943,195972-195973,195975-195976,196004,196044-196045
+/llvm/trunk:155241,195092-195094,195100,195102-195103,195118,195129,195136,195138,195148,195152,195156-195157,195161-195162,195193,195272,195317-195318,195327,195330,195333,195339,195343,195355,195364,195379,195397-195399,195401,195408,195421,195423-195424,195432,195439,195444,195455-195456,195469,195476-195477,195479,195491-195493,195514,195528,195547,195567,195573-195576,195590-195591,195599,195632,195635-195636,195670,195677,195679,195682,195684,195713,195716,195769,195773,195779,195782,195787-195788,195791,195803,195812,195827,195834,195843-195844,195878-195881,195887,195903,195905,195915,195932,195936-195943,195972-195973,195975-195976,196004,196044-196046
Modified: llvm/branches/release_34/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=196074&r1=196073&r2=196074&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/branches/release_34/lib/Target/ARM/ARMBaseInstrInfo.cpp Mon Dec 2 01:38:06 2013
@@ -1913,29 +1913,40 @@ bool llvm::tryFoldSPUpdateIntoPushPop(Ma
MachineBasicBlock *MBB = MI->getParent();
const TargetRegisterInfo *TRI = MF.getRegInfo().getTargetRegisterInfo();
+ const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF);
// Now try to find enough space in the reglist to allocate NumBytes.
for (unsigned CurReg = FirstReg - 1; CurReg >= RD0Reg && RegsNeeded;
- --CurReg, --RegsNeeded) {
+ --CurReg) {
if (!IsPop) {
// Pushing any register is completely harmless, mark the
// register involved as undef since we don't care about it in
// the slightest.
RegList.push_back(MachineOperand::CreateReg(CurReg, false, false,
false, false, true));
+ --RegsNeeded;
continue;
}
- // However, we can only pop an extra register if it's not live. Otherwise we
- // might clobber a return value register. We assume that once we find a live
- // return register all lower ones will be too so there's no use proceeding.
- if (MBB->computeRegisterLiveness(TRI, CurReg, MI) !=
- MachineBasicBlock::LQR_Dead)
- return false;
+ // However, we can only pop an extra register if it's not live. For
+ // registers live within the function we might clobber a return value
+ // register; the other way a register can be live here is if it's
+ // callee-saved.
+ if (isCalleeSavedRegister(CurReg, CSRegs) ||
+ MBB->computeRegisterLiveness(TRI, CurReg, MI) !=
+ MachineBasicBlock::LQR_Dead) {
+ // VFP pops don't allow holes in the register list, so any skip is fatal
+ // for our transformation. GPR pops do, so we should just keep looking.
+ if (IsVFPPushPop)
+ return false;
+ else
+ continue;
+ }
// Mark the unimportant registers as <def,dead> in the POP.
RegList.push_back(MachineOperand::CreateReg(CurReg, true, false, false,
true));
+ --RegsNeeded;
}
if (RegsNeeded > 0)
Modified: llvm/branches/release_34/lib/Target/ARM/ARMBaseRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/ARM/ARMBaseRegisterInfo.h?rev=196074&r1=196073&r2=196074&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/ARM/ARMBaseRegisterInfo.h (original)
+++ llvm/branches/release_34/lib/Target/ARM/ARMBaseRegisterInfo.h Mon Dec 2 01:38:06 2013
@@ -72,6 +72,14 @@ static inline bool isARMArea3Register(un
}
}
+static inline bool isCalleeSavedRegister(unsigned Reg,
+ const MCPhysReg *CSRegs) {
+ for (unsigned i = 0; CSRegs[i]; ++i)
+ if (Reg == CSRegs[i])
+ return true;
+ return false;
+}
+
class ARMBaseRegisterInfo : public ARMGenRegisterInfo {
protected:
const ARMSubtarget &STI;
Modified: llvm/branches/release_34/lib/Target/ARM/ARMFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/ARM/ARMFrameLowering.cpp?rev=196074&r1=196073&r2=196074&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/ARM/ARMFrameLowering.cpp (original)
+++ llvm/branches/release_34/lib/Target/ARM/ARMFrameLowering.cpp Mon Dec 2 01:38:06 2013
@@ -82,13 +82,6 @@ ARMFrameLowering::canSimplifyCallFramePs
return hasReservedCallFrame(MF) || MF.getFrameInfo()->hasVarSizedObjects();
}
-static bool isCalleeSavedRegister(unsigned Reg, const uint16_t *CSRegs) {
- for (unsigned i = 0; CSRegs[i]; ++i)
- if (Reg == CSRegs[i])
- return true;
- return false;
-}
-
static bool isCSRestore(MachineInstr *MI,
const ARMBaseInstrInfo &TII,
const uint16_t *CSRegs) {
Modified: llvm/branches/release_34/lib/Target/ARM/Thumb1FrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/lib/Target/ARM/Thumb1FrameLowering.cpp?rev=196074&r1=196073&r2=196074&view=diff
==============================================================================
--- llvm/branches/release_34/lib/Target/ARM/Thumb1FrameLowering.cpp (original)
+++ llvm/branches/release_34/lib/Target/ARM/Thumb1FrameLowering.cpp Mon Dec 2 01:38:06 2013
@@ -215,13 +215,6 @@ void Thumb1FrameLowering::emitPrologue(M
AFI->setShouldRestoreSPFromFP(true);
}
-static bool isCalleeSavedRegister(unsigned Reg, const uint16_t *CSRegs) {
- for (unsigned i = 0; CSRegs[i]; ++i)
- if (Reg == CSRegs[i])
- return true;
- return false;
-}
-
static bool isCSRestore(MachineInstr *MI, const uint16_t *CSRegs) {
if (MI->getOpcode() == ARM::tLDRspi &&
MI->getOperand(1).isFI() &&
Modified: llvm/branches/release_34/test/CodeGen/ARM/fold-stack-adjust.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_34/test/CodeGen/ARM/fold-stack-adjust.ll?rev=196074&r1=196073&r2=196074&view=diff
==============================================================================
--- llvm/branches/release_34/test/CodeGen/ARM/fold-stack-adjust.ll (original)
+++ llvm/branches/release_34/test/CodeGen/ARM/fold-stack-adjust.ll Mon Dec 2 01:38:06 2013
@@ -15,7 +15,7 @@ define void @check_simple() minsize {
; CHECK-NOT: sub sp, sp,
; ...
; CHECK-NOT: add sp, sp,
-; CHECK: pop.w {r7, r8, r9, r10, r11, pc}
+; CHECK: pop.w {r0, r1, r2, r3, r11, pc}
; CHECK-T1-LABEL: check_simple:
; CHECK-T1: push {r3, r4, r5, r6, r7, lr}
@@ -23,7 +23,7 @@ define void @check_simple() minsize {
; CHECK-T1-NOT: sub sp, sp,
; ...
; CHECK-T1-NOT: add sp, sp,
-; CHECK-T1: pop {r3, r4, r5, r6, r7, pc}
+; CHECK-T1: pop {r0, r1, r2, r3, r7, pc}
; iOS always has a frame pointer and messing with the push affects
; how it's set in the prologue. Make sure we get that right.
More information about the llvm-branch-commits
mailing list