[llvm-branch-commits] [llvm-branch] r164534 - in /llvm/branches/R600: lib/Target/AMDGPU/R600ISelLowering.cpp lib/Target/AMDGPU/R600ISelLowering.h test/CodeGen/R600/i8_to_double_to_float.ll

[Tom Stellard]

Author: tstellar
Date: Mon Sep 24 10:52:45 2012
New Revision: 164534

URL: http://llvm.org/viewvc/llvm-project?rev=164534&view=rev
Log:
R600: Add optimization for FP_ROUND

Added:
    llvm/branches/R600/test/CodeGen/R600/i8_to_double_to_float.ll
Modified:
    llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp
    llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.h

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp?rev=164534&r1=164533&r2=164534&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp Mon Sep 24 10:52:45 2012
@@ -50,6 +50,9 @@
   setOperationAction(ISD::SETCC, MVT::i32, Custom);
   setOperationAction(ISD::SETCC, MVT::f32, Custom);
   setOperationAction(ISD::FP_TO_UINT, MVT::i1, Custom);
+
+  setTargetDAGCombine(ISD::FP_ROUND);
+
   setSchedulingPreference(Sched::VLIW);
 }
 
@@ -604,3 +607,26 @@
   }
   return Chain;
 }
+
+//===----------------------------------------------------------------------===//
+// Custom DAG Optimizations
+//===----------------------------------------------------------------------===//
+
+SDValue R600TargetLowering::PerformDAGCombine(SDNode *N,
+                                              DAGCombinerInfo &DCI) const
+{
+  SelectionDAG &DAG = DCI.DAG;
+
+  switch (N->getOpcode()) {
+  // (f32 fp_round (f64 uint_to_fp a)) -> (f32 uint_to_fp a)
+  case ISD::FP_ROUND: {
+      SDValue Arg = N->getOperand(0);
+      if (Arg.getOpcode() == ISD::UINT_TO_FP && Arg.getValueType() == MVT::f64) {
+        return DAG.getNode(ISD::UINT_TO_FP, N->getDebugLoc(), N->getValueType(0),
+                           Arg.getOperand(0));
+      }
+      break;
+    }
+  }
+  return SDValue();
+}

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.h?rev=164534&r1=164533&r2=164534&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.h (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.h Mon Sep 24 10:52:45 2012
@@ -27,6 +27,7 @@
   virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI,
       MachineBasicBlock * BB) const;
   virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
+  virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
   void ReplaceNodeResults(SDNode * N,
       SmallVectorImpl<SDValue> &Results,
       SelectionDAG &DAG) const;

Added: llvm/branches/R600/test/CodeGen/R600/i8_to_double_to_float.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/R600/i8_to_double_to_float.ll?rev=164534&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/R600/i8_to_double_to_float.ll (added)
+++ llvm/branches/R600/test/CodeGen/R600/i8_to_double_to_float.ll Mon Sep 24 10:52:45 2012
@@ -0,0 +1,11 @@
+;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+
+;CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+
+define void @test(float addrspace(1)* %out, i8 addrspace(1)* %in) {
+  %1 = load i8 addrspace(1)* %in
+  %2 = uitofp i8 %1 to double
+  %3 = fptrunc double %2 to float
+  store float %3, float addrspace(1)* %out
+  ret void
+}