[llvm-branch-commits] [llvm-branch] r166419 - /llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td
Tom Stellard
thomas.stellard at amd.com
Mon Oct 22 08:04:14 PDT 2012
Author: tstellar
Date: Mon Oct 22 10:04:14 2012
New Revision: 166419
URL: http://llvm.org/viewvc/llvm-project?rev=166419&view=rev
Log:
R600: Cayman uses vector instruction for SIN/COS/RECIP_CLAMPED_RECIPSQRT_IEEE
Patch by: Vincent Lejeune
Modified:
llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td
Modified: llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td?rev=166419&r1=166418&r2=166419&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td Mon Oct 22 10:04:14 2012
@@ -938,6 +938,15 @@
def RECIPSQRT_CLAMPED_eg : RECIPSQRT_CLAMPED_Common<0x87>;
def EXP_IEEE_eg : EXP_IEEE_Common<0x81>;
def LOG_IEEE_eg : LOG_IEEE_Common<0x83>;
+def RECIP_CLAMPED_eg : RECIP_CLAMPED_Common<0x84>;
+def RECIPSQRT_IEEE_eg : RECIPSQRT_IEEE_Common<0x89>;
+def SIN_eg : SIN_Common<0x8D>;
+def COS_eg : COS_Common<0x8E>;
+
+def : SIN_PAT <SIN_eg>;
+def : COS_PAT <COS_eg>;
+def : Pat<(fsqrt R600_Reg32:$src),
+ (MUL R600_Reg32:$src, (RECIPSQRT_CLAMPED_eg R600_Reg32:$src))>;
} // End Predicates = [isEG]
//===----------------------------------------------------------------------===//
@@ -982,18 +991,11 @@
def CNDGE_eg : CNDGE_Common<0x1B>;
def MUL_LIT_eg : MUL_LIT_Common<0x1F>;
def LOG_CLAMPED_eg : LOG_CLAMPED_Common<0x82>;
- def RECIP_CLAMPED_eg : RECIP_CLAMPED_Common<0x84>;
- def RECIPSQRT_IEEE_eg : RECIPSQRT_IEEE_Common<0x89>;
- def SIN_eg : SIN_Common<0x8D>;
- def COS_eg : COS_Common<0x8E>;
defm DOT4_eg : DOT4_Common<0xBE>;
defm CUBE_eg : CUBE_Common<0xC0>;
def TGSI_LIT_Z_eg : TGSI_LIT_Z_Common<MUL_LIT_eg, LOG_CLAMPED_eg, EXP_IEEE_eg>;
- def : SIN_PAT <SIN_eg>;
- def : COS_PAT <COS_eg>;
-
def FLT_TO_INT_eg : FLT_TO_INT_Common<0x50> {
let Pattern = [];
}
@@ -1022,9 +1024,6 @@
def : Pat<(fp_to_uint R600_Reg32:$src0),
(FLT_TO_UINT_eg (TRUNC R600_Reg32:$src0))>;
- def : Pat<(fsqrt R600_Reg32:$src),
- (MUL R600_Reg32:$src, (RECIPSQRT_CLAMPED_eg R600_Reg32:$src))>;
-
//===----------------------------------------------------------------------===//
// Memory read/write instructions
//===----------------------------------------------------------------------===//
@@ -1278,8 +1277,15 @@
def RECIPSQRT_CLAMPED_cm : RECIPSQRT_CLAMPED_Common<0x87>;
def EXP_IEEE_cm : EXP_IEEE_Common<0x81>;
def LOG_IEEE_ : LOG_IEEE_Common<0x83>;
+def RECIP_CLAMPED_cm : RECIP_CLAMPED_Common<0x84>;
+def RECIPSQRT_IEEE_cm : RECIPSQRT_IEEE_Common<0x89>;
+def SIN_cm : SIN_Common<0x8D>;
+def COS_cm : COS_Common<0x8E>;
} // End isVector = 1
+def : SIN_PAT <SIN_cm>;
+def : COS_PAT <COS_cm>;
+
defm DIV_cm : DIV_Common<RECIP_IEEE_cm>;
// RECIP_UINT emulation for Cayman
@@ -1289,6 +1295,10 @@
(MOV_IMM_I32 0x4f800000)))
>;
+
+def : Pat<(fsqrt R600_Reg32:$src),
+ (MUL R600_Reg32:$src, (RECIPSQRT_CLAMPED_cm R600_Reg32:$src))>;
+
} // End isCayman
//===----------------------------------------------------------------------===//
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