[llvm-branch-commits] [llvm-branch] r166325 - /llvm/branches/R600/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp

[Tom Stellard]

Author: tstellar
Date: Fri Oct 19 16:10:03 2012
New Revision: 166325

URL: http://llvm.org/viewvc/llvm-project?rev=166325&view=rev
Log:
R600: Emit CONTINUE instructions correctly

The finalizer in mesa was incorrectly handling conditional continue
instructions and the backend wasn't generating code for the unconditional
version at all.

This patch enables code generation for the unconditional continue and
disables it for conditional continue.

Modified:
    llvm/branches/R600/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp

Modified: llvm/branches/R600/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp?rev=166325&r1=166324&r2=166325&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp Fri Oct 19 16:10:03 2012
@@ -540,8 +540,7 @@
   case AMDGPU::BREAK_LOGICALZ_i32:
     instr = FC_BREAK_Z_INT;
     break;
-  case AMDGPU::CONTINUE_LOGICALNZ_f32:
-  case AMDGPU::CONTINUE_LOGICALNZ_i32:
+  case AMDGPU::CONTINUE:
     instr = FC_CONTINUE;
     break;
   case AMDGPU::IF_LOGICALNZ_f32:
@@ -633,7 +632,7 @@
   case AMDGPU::BREAK_LOGICALNZ_i32:
   case AMDGPU::BREAK_LOGICALZ_i32:
   case AMDGPU::BREAK_LOGICALNZ_f32:
-  case AMDGPU::CONTINUE_LOGICALNZ_f32:
+  case AMDGPU::CONTINUE:
   case AMDGPU::IF_LOGICALNZ_i32:
   case AMDGPU::IF_LOGICALZ_f32:
   case AMDGPU::ELSE: