[llvm-branch-commits] [llvm-branch] r166319 - in /llvm/branches/R600/lib/Target/AMDGPU: R600ISelLowering.cpp R600ISelLowering.h R600Instructions.td

[Tom Stellard]

Author: tstellar
Date: Fri Oct 19 16:09:56 2012
New Revision: 166319

URL: http://llvm.org/viewvc/llvm-project?rev=166319&view=rev
Log:
R600: Lower fpow(A, B) to fexp(mul(B, flog(A))) at DAG level

Patch by: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

Modified:
    llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp
    llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.h
    llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp?rev=166319&r1=166318&r2=166319&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp Fri Oct 19 16:09:56 2012
@@ -53,6 +53,7 @@
   setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom);
   setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
   setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i1, Custom);
+  setOperationAction(ISD::FPOW, MVT::f32, Custom);
 
   setOperationAction(ISD::ROTL, MVT::i32, Custom);
 
@@ -293,6 +294,7 @@
   case ISD::ROTL: return LowerROTL(Op, DAG);
   case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
   case ISD::SETCC: return LowerSETCC(Op, DAG);
+  case ISD::FPOW: return LowerFPOW(Op, DAG);
   case ISD::INTRINSIC_VOID: {
     SDValue Chain = Op.getOperand(0);
     unsigned IntrinsicID =
@@ -712,6 +714,16 @@
   return Cond;
 }
 
+SDValue R600TargetLowering::LowerFPOW(SDValue Op,
+    SelectionDAG &DAG) const
+{
+  DebugLoc DL = Op.getDebugLoc();
+  EVT VT = Op.getValueType();
+  SDValue LogBase = DAG.getNode(ISD::FLOG2, DL, VT, Op.getOperand(0));
+  SDValue MulLogBase = DAG.getNode(ISD::FMUL, DL, VT, Op.getOperand(1), LogBase);
+  return DAG.getNode(ISD::FEXP2, DL, VT, MulLogBase);
+}
+
 // XXX Only kernel functions are supporte, so we can assume for now that
 // every function is a kernel function, but in the future we should use
 // separate calling conventions for kernel and non-kernel functions.

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.h?rev=166319&r1=166318&r2=166319&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.h (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.h Fri Oct 19 16:09:56 2012
@@ -61,6 +61,7 @@
   SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
   SDValue LowerInputFace(SDNode *Op, SelectionDAG &DAG) const;
   SDValue LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const;
+  SDValue LowerFPOW(SDValue Op, SelectionDAG &DAG) const;
   
   bool isZero(SDValue Op) const;
 };

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td?rev=166319&r1=166318&r2=166319&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td Fri Oct 19 16:09:56 2012
@@ -907,7 +907,6 @@
   def RECIP_UINT_r600 : RECIP_UINT_Common <0x78>;
 
   defm DIV_r600 : DIV_Common<RECIP_IEEE_r600>;
-  def POW_r600 : POW_Common<LOG_IEEE_r600, EXP_IEEE_r600, MUL, GPRF32>;
   def SSG_r600 : SSG_Common<CNDGT_r600, CNDGE_r600>;
   def TGSI_LIT_Z_r600 : TGSI_LIT_Z_Common<MUL_LIT_r600, LOG_CLAMPED_r600, EXP_IEEE_r600>;
 
@@ -1008,7 +1007,6 @@
   defm CUBE_eg : CUBE_Common<0xC0>;
 
   defm DIV_eg : DIV_Common<RECIP_IEEE_eg>;
-  def POW_eg : POW_Common<LOG_IEEE_eg, EXP_IEEE_eg, MUL, GPRF32>;
   def SSG_eg : SSG_Common<CNDGT_eg, CNDGE_eg>;
   def TGSI_LIT_Z_eg : TGSI_LIT_Z_Common<MUL_LIT_eg, LOG_CLAMPED_eg, EXP_IEEE_eg>;