[llvm-branch-commits] [llvm-branch] r166033 [2/2] - in /llvm/branches/R600: ./ docs/ examples/ExceptionDemo/ include/llvm-c/ include/llvm/ include/llvm/ADT/ include/llvm/Analysis/ include/llvm/Bitcode/ include/llvm/CodeGen/ include/llvm/MC/ include/llvm/MC/MCParser/ include/llvm/Object/ include/llvm/Support/ include/llvm/TableGen/ include/llvm/Target/ include/llvm/Transforms/ include/llvm/Transforms/Utils/ lib/Analysis/ lib/AsmParser/ lib/Bitcode/Reader/ lib/Bitcode/Writer/ lib/CodeGen/ lib/CodeGen/AsmPrinter/ lib/CodeGen/Sel...
Tom Stellard
thomas.stellard at amd.com
Tue Oct 16 10:52:59 PDT 2012
Modified: llvm/branches/R600/lib/VMCore/Core.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/VMCore/Core.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/lib/VMCore/Core.cpp (original)
+++ llvm/branches/R600/lib/VMCore/Core.cpp Tue Oct 16 12:52:57 2012
@@ -1381,14 +1381,20 @@
void LLVMAddFunctionAttr(LLVMValueRef Fn, LLVMAttribute PA) {
Function *Func = unwrap<Function>(Fn);
const AttrListPtr PAL = Func->getAttributes();
- const AttrListPtr PALnew = PAL.addAttr(~0U, Attributes(PA));
+ AttrBuilder B(PA);
+ const AttrListPtr PALnew =
+ PAL.addAttr(Func->getContext(), AttrListPtr::FunctionIndex,
+ Attributes::get(Func->getContext(), B));
Func->setAttributes(PALnew);
}
void LLVMRemoveFunctionAttr(LLVMValueRef Fn, LLVMAttribute PA) {
Function *Func = unwrap<Function>(Fn);
const AttrListPtr PAL = Func->getAttributes();
- const AttrListPtr PALnew = PAL.removeAttr(~0U, Attributes(PA));
+ AttrBuilder B(PA);
+ const AttrListPtr PALnew =
+ PAL.removeAttr(Func->getContext(), AttrListPtr::FunctionIndex,
+ Attributes::get(Func->getContext(), B));
Func->setAttributes(PALnew);
}
@@ -1458,11 +1464,15 @@
}
void LLVMAddAttribute(LLVMValueRef Arg, LLVMAttribute PA) {
- unwrap<Argument>(Arg)->addAttr(Attributes(PA));
+ Argument *A = unwrap<Argument>(Arg);
+ AttrBuilder B(PA);
+ A->addAttr(Attributes::get(A->getContext(), B));
}
void LLVMRemoveAttribute(LLVMValueRef Arg, LLVMAttribute PA) {
- unwrap<Argument>(Arg)->removeAttr(Attributes(PA));
+ Argument *A = unwrap<Argument>(Arg);
+ AttrBuilder B(PA);
+ A->removeAttr(Attributes::get(A->getContext(), B));
}
LLVMAttribute LLVMGetAttribute(LLVMValueRef Arg) {
@@ -1474,8 +1484,10 @@
void LLVMSetParamAlignment(LLVMValueRef Arg, unsigned align) {
- unwrap<Argument>(Arg)->addAttr(
- Attributes::constructAlignmentFromInt(align));
+ AttrBuilder B;
+ B.addAlignmentAttr(align);
+ unwrap<Argument>(Arg)->addAttr(Attributes::
+ get(unwrap<Argument>(Arg)->getContext(), B));
}
/*--.. Operations on basic blocks ..........................................--*/
@@ -1664,23 +1676,28 @@
void LLVMAddInstrAttribute(LLVMValueRef Instr, unsigned index,
LLVMAttribute PA) {
CallSite Call = CallSite(unwrap<Instruction>(Instr));
+ AttrBuilder B(PA);
Call.setAttributes(
- Call.getAttributes().addAttr(index, Attributes(PA)));
+ Call.getAttributes().addAttr(Call->getContext(), index,
+ Attributes::get(Call->getContext(), B)));
}
void LLVMRemoveInstrAttribute(LLVMValueRef Instr, unsigned index,
LLVMAttribute PA) {
CallSite Call = CallSite(unwrap<Instruction>(Instr));
+ AttrBuilder B(PA);
Call.setAttributes(
- Call.getAttributes().removeAttr(index, Attributes(PA)));
+ Call.getAttributes().removeAttr(Call->getContext(), index,
+ Attributes::get(Call->getContext(), B)));
}
void LLVMSetInstrParamAlignment(LLVMValueRef Instr, unsigned index,
unsigned align) {
CallSite Call = CallSite(unwrap<Instruction>(Instr));
- Call.setAttributes(
- Call.getAttributes().addAttr(index,
- Attributes::constructAlignmentFromInt(align)));
+ AttrBuilder B;
+ B.addAlignmentAttr(align);
+ Call.setAttributes(Call.getAttributes().addAttr(Call->getContext(), index,
+ Attributes::get(Call->getContext(), B)));
}
/*--.. Operations on call instructions (only) ..............................--*/
Modified: llvm/branches/R600/lib/VMCore/Function.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/VMCore/Function.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/lib/VMCore/Function.cpp (original)
+++ llvm/branches/R600/lib/VMCore/Function.cpp Tue Oct 16 12:52:57 2012
@@ -185,7 +185,7 @@
// Ensure intrinsics have the right parameter attributes.
if (unsigned IID = getIntrinsicID())
- setAttributes(Intrinsic::getAttributes(Intrinsic::ID(IID)));
+ setAttributes(Intrinsic::getAttributes(getContext(), Intrinsic::ID(IID)));
}
@@ -249,13 +249,13 @@
void Function::addAttribute(unsigned i, Attributes attr) {
AttrListPtr PAL = getAttributes();
- PAL = PAL.addAttr(i, attr);
+ PAL = PAL.addAttr(getContext(), i, attr);
setAttributes(PAL);
}
void Function::removeAttribute(unsigned i, Attributes attr) {
AttrListPtr PAL = getAttributes();
- PAL = PAL.removeAttr(i, attr);
+ PAL = PAL.removeAttr(getContext(), i, attr);
setAttributes(PAL);
}
Modified: llvm/branches/R600/lib/VMCore/Instructions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/VMCore/Instructions.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/lib/VMCore/Instructions.cpp (original)
+++ llvm/branches/R600/lib/VMCore/Instructions.cpp Tue Oct 16 12:52:57 2012
@@ -332,21 +332,22 @@
void CallInst::addAttribute(unsigned i, Attributes attr) {
AttrListPtr PAL = getAttributes();
- PAL = PAL.addAttr(i, attr);
+ PAL = PAL.addAttr(getContext(), i, attr);
setAttributes(PAL);
}
void CallInst::removeAttribute(unsigned i, Attributes attr) {
AttrListPtr PAL = getAttributes();
- PAL = PAL.removeAttr(i, attr);
+ PAL = PAL.removeAttr(getContext(), i, attr);
setAttributes(PAL);
}
bool CallInst::hasFnAttr(Attributes::AttrVal A) const {
- if (AttributeList.getParamAttributes(~0U).hasAttribute(A))
+ if (AttributeList.getParamAttributes(AttrListPtr::FunctionIndex)
+ .hasAttribute(A))
return true;
if (const Function *F = getCalledFunction())
- return F->getParamAttributes(~0U).hasAttribute(A);
+ return F->getParamAttributes(AttrListPtr::FunctionIndex).hasAttribute(A);
return false;
}
@@ -571,10 +572,11 @@
}
bool InvokeInst::hasFnAttr(Attributes::AttrVal A) const {
- if (AttributeList.getParamAttributes(~0U).hasAttribute(A))
+ if (AttributeList.getParamAttributes(AttrListPtr::FunctionIndex).
+ hasAttribute(A))
return true;
if (const Function *F = getCalledFunction())
- return F->getParamAttributes(~0U).hasAttribute(A);
+ return F->getParamAttributes(AttrListPtr::FunctionIndex).hasAttribute(A);
return false;
}
@@ -588,13 +590,13 @@
void InvokeInst::addAttribute(unsigned i, Attributes attr) {
AttrListPtr PAL = getAttributes();
- PAL = PAL.addAttr(i, attr);
+ PAL = PAL.addAttr(getContext(), i, attr);
setAttributes(PAL);
}
void InvokeInst::removeAttribute(unsigned i, Attributes attr) {
AttrListPtr PAL = getAttributes();
- PAL = PAL.removeAttr(i, attr);
+ PAL = PAL.removeAttr(getContext(), i, attr);
setAttributes(PAL);
}
Modified: llvm/branches/R600/lib/VMCore/LLVMContextImpl.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/VMCore/LLVMContextImpl.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/lib/VMCore/LLVMContextImpl.cpp (original)
+++ llvm/branches/R600/lib/VMCore/LLVMContextImpl.cpp Tue Oct 16 12:52:57 2012
@@ -97,9 +97,11 @@
// Destroy attributes.
for (FoldingSetIterator<AttributesImpl> I = AttrsSet.begin(),
- E = AttrsSet.end(); I != E; ++I)
- delete &*I;
-
+ E = AttrsSet.end(); I != E;) {
+ FoldingSetIterator<AttributesImpl> Elem = I++;
+ delete &*Elem;
+ }
+
// Destroy MDNodes. ~MDNode can move and remove nodes between the MDNodeSet
// and the NonUniquedMDNodes sets, so copy the values out first.
SmallVector<MDNode*, 8> MDNodes;
Modified: llvm/branches/R600/lib/VMCore/LLVMContextImpl.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/VMCore/LLVMContextImpl.h?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/lib/VMCore/LLVMContextImpl.h (original)
+++ llvm/branches/R600/lib/VMCore/LLVMContextImpl.h Tue Oct 16 12:52:57 2012
@@ -16,9 +16,9 @@
#define LLVM_LLVMCONTEXT_IMPL_H
#include "llvm/LLVMContext.h"
+#include "AttributesImpl.h"
#include "ConstantsContext.h"
#include "LeaksContext.h"
-#include "llvm/AttributesImpl.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Metadata.h"
Added: llvm/branches/R600/lib/VMCore/TargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/VMCore/TargetTransformInfo.cpp?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/lib/VMCore/TargetTransformInfo.cpp (added)
+++ llvm/branches/R600/lib/VMCore/TargetTransformInfo.cpp Tue Oct 16 12:52:57 2012
@@ -0,0 +1,27 @@
+//===- llvm/VMCore/TargetTransformInfo.cpp ----------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/TargetTransformInfo.h"
+#include "llvm/Support/ErrorHandling.h"
+
+using namespace llvm;
+
+/// Default ctor.
+///
+/// @note This has to exist, because this is a pass, but it should never be
+/// used.
+TargetTransformInfo::TargetTransformInfo() : ImmutablePass(ID) {
+ report_fatal_error("Bad TargetTransformInfo ctor used. "
+ "Tool did not specify a TargetTransformInfo to use?");
+}
+
+INITIALIZE_PASS(TargetTransformInfo, "TargetTransformInfo",
+ "Target Transform Info", false, true)
+char TargetTransformInfo::ID = 0;
+
Modified: llvm/branches/R600/lib/VMCore/Verifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/VMCore/Verifier.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/lib/VMCore/Verifier.cpp (original)
+++ llvm/branches/R600/lib/VMCore/Verifier.cpp Tue Oct 16 12:52:57 2012
@@ -567,9 +567,10 @@
Attrs.hasAttribute(Attributes::AlwaysInline)), "Attributes "
"'noinline and alwaysinline' are incompatible!", V);
- Attributes TypeI = Attrs & Attributes::typeIncompatible(Ty);
- Assert1(!TypeI, "Wrong type for attribute " +
- TypeI.getAsString(), V);
+ Assert1(!AttrBuilder(Attrs).
+ hasAttributes(Attributes::typeIncompatible(Ty)),
+ "Wrong types for attribute: " +
+ Attributes::typeIncompatible(Ty).getAsString(), V);
if (PointerType *PTy = dyn_cast<PointerType>(Ty))
Assert1(!Attrs.hasAttribute(Attributes::ByVal) ||
@@ -614,10 +615,10 @@
}
Attributes FAttrs = Attrs.getFnAttributes();
- Attributes::Builder NotFn(FAttrs);
+ AttrBuilder NotFn(FAttrs);
NotFn.removeFunctionOnlyAttrs();
Assert1(!NotFn.hasAttributes(), "Attributes '" +
- Attributes::get(NotFn).getAsString() +
+ Attributes::get(V->getContext(), NotFn).getAsString() +
"' do not apply to the function!", V);
// Check for mutually incompatible attributes.
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/Banerjee.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/Banerjee.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/Banerjee.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/Banerjee.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,595 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'Banerjee.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long int i = 1; i <= 10; i++)
+;; for (long int j = 1; j <= 10; j++) {
+;; A[10*i + j] = ...
+;; ... = A[10*i + j - 1];
+
+define void @banerjee0(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc7
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc7 ]
+ %i.03 = phi i64 [ 1, %entry ], [ %inc8, %for.inc7 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 1, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %i.03, 10
+ %add = add nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %mul4 = mul nsw i64 %i.03, 10
+ %add5 = add nsw i64 %mul4, %j.02
+ %sub = add nsw i64 %add5, -1
+ %arrayidx6 = getelementptr inbounds i64* %A, i64 %sub
+ %0 = load i64* %arrayidx6, align 8
+; CHECK: da analyze - flow [<= <>]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %0, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 11
+ br i1 %exitcond, label %for.body3, label %for.inc7
+
+for.inc7: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 10
+ %inc8 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc8, 11
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end9
+
+for.end9: ; preds = %for.inc7
+ ret void
+}
+
+
+;; for (long int i = 1; i <= n; i++)
+;; for (long int j = 1; j <= m; j++) {
+;; A[10*i + j] = ...
+;; ... = A[10*i + j - 1];
+
+define void @banerjee1(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp4 = icmp sgt i64 %n, 0
+ br i1 %cmp4, label %for.cond1.preheader.preheader, label %for.end9
+
+for.cond1.preheader.preheader: ; preds = %entry
+ %0 = add i64 %n, 1
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.cond1.preheader.preheader, %for.inc7
+ %B.addr.06 = phi i64* [ %B.addr.1.lcssa, %for.inc7 ], [ %B, %for.cond1.preheader.preheader ]
+ %i.05 = phi i64 [ %inc8, %for.inc7 ], [ 1, %for.cond1.preheader.preheader ]
+ %1 = add i64 %m, 1
+ %cmp21 = icmp sgt i64 %m, 0
+ br i1 %cmp21, label %for.body3.preheader, label %for.inc7
+
+for.body3.preheader: ; preds = %for.cond1.preheader
+ br label %for.body3
+
+for.body3: ; preds = %for.body3.preheader, %for.body3
+ %j.03 = phi i64 [ %inc, %for.body3 ], [ 1, %for.body3.preheader ]
+ %B.addr.12 = phi i64* [ %incdec.ptr, %for.body3 ], [ %B.addr.06, %for.body3.preheader ]
+ %mul = mul nsw i64 %i.05, 10
+ %add = add nsw i64 %mul, %j.03
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %mul4 = mul nsw i64 %i.05, 10
+ %add5 = add nsw i64 %mul4, %j.03
+ %sub = add nsw i64 %add5, -1
+ %arrayidx6 = getelementptr inbounds i64* %A, i64 %sub
+ %2 = load i64* %arrayidx6, align 8
+; CHECK: da analyze - flow [* <>]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.12, i64 1
+ store i64 %2, i64* %B.addr.12, align 8
+ %inc = add nsw i64 %j.03, 1
+ %exitcond = icmp eq i64 %inc, %1
+ br i1 %exitcond, label %for.inc7.loopexit, label %for.body3
+
+for.inc7.loopexit: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.06, i64 %m
+ br label %for.inc7
+
+for.inc7: ; preds = %for.inc7.loopexit, %for.cond1.preheader
+ %B.addr.1.lcssa = phi i64* [ %B.addr.06, %for.cond1.preheader ], [ %scevgep, %for.inc7.loopexit ]
+ %inc8 = add nsw i64 %i.05, 1
+ %exitcond7 = icmp eq i64 %inc8, %0
+ br i1 %exitcond7, label %for.end9.loopexit, label %for.cond1.preheader
+
+for.end9.loopexit: ; preds = %for.inc7
+ br label %for.end9
+
+for.end9: ; preds = %for.end9.loopexit, %entry
+ ret void
+}
+
+
+;; for (long int i = 0; i < 10; i++)
+;; for (long int j = 0; j < 10; j++) {
+;; A[10*i + j] = 0;
+;; *B++ = A[10*i + j + 100];
+
+define void @banerjee2(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc8
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc8 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc9, %for.inc8 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %i.03, 10
+ %add = add nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %mul4 = mul nsw i64 %i.03, 10
+ %add5 = add nsw i64 %mul4, %j.02
+ %add6 = add nsw i64 %add5, 100
+ %arrayidx7 = getelementptr inbounds i64* %A, i64 %add6
+ %0 = load i64* %arrayidx7, align 8
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %0, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 10
+ br i1 %exitcond, label %for.body3, label %for.inc8
+
+for.inc8: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 10
+ %inc9 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc9, 10
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end10
+
+for.end10: ; preds = %for.inc8
+ ret void
+}
+
+
+;; for (long int i = 0; i < 10; i++)
+;; for (long int j = 0; j < 10; j++) {
+;; A[10*i + j] = ...
+;; ... = A[10*i + j + 99];
+
+define void @banerjee3(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc8
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc8 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc9, %for.inc8 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %i.03, 10
+ %add = add nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %mul4 = mul nsw i64 %i.03, 10
+ %add5 = add nsw i64 %mul4, %j.02
+ %add6 = add nsw i64 %add5, 99
+ %arrayidx7 = getelementptr inbounds i64* %A, i64 %add6
+ %0 = load i64* %arrayidx7, align 8
+; CHECK: da analyze - flow [> >]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %0, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 10
+ br i1 %exitcond, label %for.body3, label %for.inc8
+
+for.inc8: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 10
+ %inc9 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc9, 10
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end10
+
+for.end10: ; preds = %for.inc8
+ ret void
+}
+
+
+;; for (long int i = 0; i < 10; i++)
+;; for (long int j = 0; j < 10; j++) {
+;; A[10*i + j] = ...
+;; ... = A[10*i + j - 100];
+
+define void @banerjee4(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc7
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc7 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc8, %for.inc7 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %i.03, 10
+ %add = add nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %mul4 = mul nsw i64 %i.03, 10
+ %add5 = add nsw i64 %mul4, %j.02
+ %sub = add nsw i64 %add5, -100
+ %arrayidx6 = getelementptr inbounds i64* %A, i64 %sub
+ %0 = load i64* %arrayidx6, align 8
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %0, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 10
+ br i1 %exitcond, label %for.body3, label %for.inc7
+
+for.inc7: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 10
+ %inc8 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc8, 10
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end9
+
+for.end9: ; preds = %for.inc7
+ ret void
+}
+
+
+;; for (long int i = 0; i < 10; i++)
+;; for (long int j = 0; j < 10; j++) {
+;; A[10*i + j] = ...
+;; ... = A[10*i + j - 99];
+
+define void @banerjee5(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc7
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc7 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc8, %for.inc7 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %i.03, 10
+ %add = add nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %mul4 = mul nsw i64 %i.03, 10
+ %add5 = add nsw i64 %mul4, %j.02
+ %sub = add nsw i64 %add5, -99
+ %arrayidx6 = getelementptr inbounds i64* %A, i64 %sub
+ %0 = load i64* %arrayidx6, align 8
+; CHECK: da analyze - flow [< <]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %0, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 10
+ br i1 %exitcond, label %for.body3, label %for.inc7
+
+for.inc7: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 10
+ %inc8 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc8, 10
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end9
+
+for.end9: ; preds = %for.inc7
+ ret void
+}
+
+
+;; for (long int i = 0; i < 10; i++)
+;; for (long int j = 0; j < 10; j++) {
+;; A[10*i + j] = ...
+;; ... = A[10*i + j + 9];
+
+define void @banerjee6(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc8
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc8 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc9, %for.inc8 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %i.03, 10
+ %add = add nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %mul4 = mul nsw i64 %i.03, 10
+ %add5 = add nsw i64 %mul4, %j.02
+ %add6 = add nsw i64 %add5, 9
+ %arrayidx7 = getelementptr inbounds i64* %A, i64 %add6
+ %0 = load i64* %arrayidx7, align 8
+; CHECK: da analyze - flow [=> <>]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %0, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 10
+ br i1 %exitcond, label %for.body3, label %for.inc8
+
+for.inc8: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 10
+ %inc9 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc9, 10
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end10
+
+for.end10: ; preds = %for.inc8
+ ret void
+}
+
+
+;; for (long int i = 0; i < 10; i++)
+;; for (long int j = 0; j < 10; j++) {
+;; A[10*i + j] = ...
+;; ... = A[10*i + j + 10];
+
+define void @banerjee7(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc8
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc8 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc9, %for.inc8 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %i.03, 10
+ %add = add nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %mul4 = mul nsw i64 %i.03, 10
+ %add5 = add nsw i64 %mul4, %j.02
+ %add6 = add nsw i64 %add5, 10
+ %arrayidx7 = getelementptr inbounds i64* %A, i64 %add6
+ %0 = load i64* %arrayidx7, align 8
+; CHECK: da analyze - flow [> <=]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %0, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 10
+ br i1 %exitcond, label %for.body3, label %for.inc8
+
+for.inc8: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 10
+ %inc9 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc9, 10
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end10
+
+for.end10: ; preds = %for.inc8
+ ret void
+}
+
+
+;; for (long int i = 0; i < 10; i++)
+;; for (long int j = 0; j < 10; j++) {
+;; A[10*i + j] = ...
+;; ... = A[10*i + j + 11];
+
+define void @banerjee8(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc8
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc8 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc9, %for.inc8 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %i.03, 10
+ %add = add nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %mul4 = mul nsw i64 %i.03, 10
+ %add5 = add nsw i64 %mul4, %j.02
+ %add6 = add nsw i64 %add5, 11
+ %arrayidx7 = getelementptr inbounds i64* %A, i64 %add6
+ %0 = load i64* %arrayidx7, align 8
+; CHECK: da analyze - flow [> <>]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %0, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 10
+ br i1 %exitcond, label %for.body3, label %for.inc8
+
+for.inc8: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 10
+ %inc9 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc9, 10
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end10
+
+for.end10: ; preds = %for.inc8
+ ret void
+}
+
+
+;; for (long int i = 0; i < 20; i++)
+;; for (long int j = 0; j < 20; j++) {
+;; A[30*i + 500*j] = ...
+;; ... = A[i - 500*j + 11];
+
+define void @banerjee9(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc8
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc8 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc9, %for.inc8 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %i.03, 30
+ %mul4 = mul nsw i64 %j.02, 500
+ %add = add nsw i64 %mul, %mul4
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %0 = mul i64 %j.02, -500
+ %sub = add i64 %i.03, %0
+ %add6 = add nsw i64 %sub, 11
+ %arrayidx7 = getelementptr inbounds i64* %A, i64 %add6
+ %1 = load i64* %arrayidx7, align 8
+; CHECK: da analyze - flow [<= =|<]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %1, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 20
+ br i1 %exitcond, label %for.body3, label %for.inc8
+
+for.inc8: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 20
+ %inc9 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc9, 20
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end10
+
+for.end10: ; preds = %for.inc8
+ ret void
+}
+
+
+;; for (long int i = 0; i < 20; i++)
+;; for (long int j = 0; j < 20; j++) {
+;; A[i + 500*j] = ...
+;; ... = A[i - 500*j + 11];
+
+define void @banerjee10(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc7
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc7 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc8, %for.inc7 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %j.02, 500
+ %add = add nsw i64 %i.03, %mul
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %0 = mul i64 %j.02, -500
+ %sub = add i64 %i.03, %0
+ %add5 = add nsw i64 %sub, 11
+ %arrayidx6 = getelementptr inbounds i64* %A, i64 %add5
+ %1 = load i64* %arrayidx6, align 8
+; CHECK: da analyze - flow [<> =]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %1, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 20
+ br i1 %exitcond, label %for.body3, label %for.inc7
+
+for.inc7: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 20
+ %inc8 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc8, 20
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end9
+
+for.end9: ; preds = %for.inc7
+ ret void
+}
+
+
+;; for (long int i = 0; i < 20; i++)
+;; for (long int j = 0; j < 20; j++) {
+;; A[300*i + j] = ...
+;; ... = A[250*i - j + 11];
+
+define void @banerjee11(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc7
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc7 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc8, %for.inc7 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %i.03, 300
+ %add = add nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %mul4 = mul nsw i64 %i.03, 250
+ %sub = sub nsw i64 %mul4, %j.02
+ %add5 = add nsw i64 %sub, 11
+ %arrayidx6 = getelementptr inbounds i64* %A, i64 %add5
+ %0 = load i64* %arrayidx6, align 8
+; CHECK: da analyze - flow [<= <>]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %0, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 20
+ br i1 %exitcond, label %for.body3, label %for.inc7
+
+for.inc7: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 20
+ %inc8 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc8, 20
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end9
+
+for.end9: ; preds = %for.inc7
+ ret void
+}
+
+
+;; for (long int i = 0; i < 20; i++)
+;; for (long int j = 0; j < 20; j++) {
+;; A[100*i + j] = ...
+;; ... = A[100*i - j + 11];
+
+define void @banerjee12(i64* %A, i64* %B, i64 %m, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc7
+ %B.addr.04 = phi i64* [ %B, %entry ], [ %scevgep, %for.inc7 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc8, %for.inc7 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i64* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %mul = mul nsw i64 %i.03, 100
+ %add = add nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i64* %A, i64 %add
+ store i64 0, i64* %arrayidx, align 8
+ %mul4 = mul nsw i64 %i.03, 100
+ %sub = sub nsw i64 %mul4, %j.02
+ %add5 = add nsw i64 %sub, 11
+ %arrayidx6 = getelementptr inbounds i64* %A, i64 %add5
+ %0 = load i64* %arrayidx6, align 8
+; CHECK: da analyze - flow [= <>]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.11, i64 1
+ store i64 %0, i64* %B.addr.11, align 8
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 20
+ br i1 %exitcond, label %for.body3, label %for.inc7
+
+for.inc7: ; preds = %for.body3
+ %scevgep = getelementptr i64* %B.addr.04, i64 20
+ %inc8 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc8, 20
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end9
+
+for.end9: ; preds = %for.inc7
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/Coupled.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/Coupled.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/Coupled.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/Coupled.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,509 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'Coupled.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long int i = 0; i < 50; i++)
+;; A[i][i] = ...
+;; ... = A[i + 10][i + 9]
+
+define void @couple0([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %arrayidx1 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ store i32 %conv, i32* %arrayidx1, align 4
+ %add = add nsw i64 %i.02, 9
+ %add2 = add nsw i64 %i.02, 10
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 %add2, i64 %add
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 50
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i < 50; i++)
+;; A[i][i] = ...
+;; ... = A[i + 9][i + 9]
+
+define void @couple1([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %arrayidx1 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ store i32 %conv, i32* %arrayidx1, align 4
+ %add = add nsw i64 %i.02, 9
+ %add2 = add nsw i64 %i.02, 9
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 %add2, i64 %add
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - consistent flow [-9]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 50
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i < 50; i++)
+;; A[3*i - 6][3*i - 6] = ...
+;; ... = A[i][i]
+
+define void @couple2([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul nsw i64 %i.02, 3
+ %sub = add nsw i64 %mul, -6
+ %mul1 = mul nsw i64 %i.02, 3
+ %sub2 = add nsw i64 %mul1, -6
+ %arrayidx3 = getelementptr inbounds [100 x i32]* %A, i64 %sub2, i64 %sub
+ store i32 %conv, i32* %arrayidx3, align 4
+ %arrayidx5 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - flow [*|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 50
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i < 50; i++)
+;; A[3*i - 6][3*i - 5] = ...
+;; ... = A[i][i]
+
+define void @couple3([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul nsw i64 %i.02, 3
+ %sub = add nsw i64 %mul, -5
+ %mul1 = mul nsw i64 %i.02, 3
+ %sub2 = add nsw i64 %mul1, -6
+ %arrayidx3 = getelementptr inbounds [100 x i32]* %A, i64 %sub2, i64 %sub
+ store i32 %conv, i32* %arrayidx3, align 4
+ %arrayidx5 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 50
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i < 50; i++)
+;; A[3*i - 6][3*i - n] = ...
+;; ... = A[i][i]
+
+define void @couple4([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul nsw i64 %i.02, 3
+ %conv1 = sext i32 %n to i64
+ %sub = sub nsw i64 %mul, %conv1
+ %mul2 = mul nsw i64 %i.02, 3
+ %sub3 = add nsw i64 %mul2, -6
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 %sub3, i64 %sub
+ store i32 %conv, i32* %arrayidx4, align 4
+ %arrayidx6 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx6, align 4
+; CHECK: da analyze - flow [*|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 50
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i < 50; i++)
+;; A[3*i - n + 1][3*i - n] = ...
+;; ... = A[i][i]
+
+define void @couple5([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul nsw i64 %i.02, 3
+ %conv1 = sext i32 %n to i64
+ %sub = sub nsw i64 %mul, %conv1
+ %mul2 = mul nsw i64 %i.02, 3
+ %conv3 = sext i32 %n to i64
+ %sub4 = sub nsw i64 %mul2, %conv3
+ %add = add nsw i64 %sub4, 1
+ %arrayidx5 = getelementptr inbounds [100 x i32]* %A, i64 %add, i64 %sub
+ store i32 %conv, i32* %arrayidx5, align 4
+ %arrayidx7 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx7, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 50
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i < 50; i++)
+;; A[i][3*i - 6] = ...
+;; ... = A[i][i]
+
+define void @couple6([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul nsw i64 %i.02, 3
+ %sub = add nsw i64 %mul, -6
+ %arrayidx1 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %sub
+ store i32 %conv, i32* %arrayidx1, align 4
+ %arrayidx3 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx3, align 4
+; CHECK: da analyze - flow [=|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 50
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i < 50; i++)
+;; A[i][3*i - 5] = ...
+;; ... = A[i][i]
+
+define void @couple7([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul nsw i64 %i.02, 3
+ %sub = add nsw i64 %mul, -5
+ %arrayidx1 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %sub
+ store i32 %conv, i32* %arrayidx1, align 4
+ %arrayidx3 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx3, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 50
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i <= 15; i++)
+;; A[3*i - 18][3 - i] = ...
+;; ... = A[i][i]
+
+define void @couple8([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %sub = sub nsw i64 3, %i.02
+ %mul = mul nsw i64 %i.02, 3
+ %sub1 = add nsw i64 %mul, -18
+ %arrayidx2 = getelementptr inbounds [100 x i32]* %A, i64 %sub1, i64 %sub
+ store i32 %conv, i32* %arrayidx2, align 4
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 16
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i <= 15; i++)
+;; A[3*i - 18][2 - i] = ...
+;; ... = A[i][i]
+
+define void @couple9([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %sub = sub nsw i64 2, %i.02
+ %mul = mul nsw i64 %i.02, 3
+ %sub1 = add nsw i64 %mul, -18
+ %arrayidx2 = getelementptr inbounds [100 x i32]* %A, i64 %sub1, i64 %sub
+ store i32 %conv, i32* %arrayidx2, align 4
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 16
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i <= 15; i++)
+;; A[3*i - 18][6 - i] = ...
+;; ... = A[i][i]
+
+define void @couple10([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %sub = sub nsw i64 6, %i.02
+ %mul = mul nsw i64 %i.02, 3
+ %sub1 = add nsw i64 %mul, -18
+ %arrayidx2 = getelementptr inbounds [100 x i32]* %A, i64 %sub1, i64 %sub
+ store i32 %conv, i32* %arrayidx2, align 4
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - flow [>] splitable!
+; CHECK: da analyze - split level = 1, iteration = 3!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 16
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i <= 15; i++)
+;; A[3*i - 18][18 - i] = ...
+;; ... = A[i][i]
+
+define void @couple11([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %sub = sub nsw i64 18, %i.02
+ %mul = mul nsw i64 %i.02, 3
+ %sub1 = add nsw i64 %mul, -18
+ %arrayidx2 = getelementptr inbounds [100 x i32]* %A, i64 %sub1, i64 %sub
+ store i32 %conv, i32* %arrayidx2, align 4
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - flow [=|<] splitable!
+; CHECK: da analyze - split level = 1, iteration = 9!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 16
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i <= 12; i++)
+;; A[3*i - 18][22 - i] = ...
+;; ... = A[i][i]
+
+define void @couple12([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %sub = sub nsw i64 22, %i.02
+ %mul = mul nsw i64 %i.02, 3
+ %sub1 = add nsw i64 %mul, -18
+ %arrayidx2 = getelementptr inbounds [100 x i32]* %A, i64 %sub1, i64 %sub
+ store i32 %conv, i32* %arrayidx2, align 4
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - flow [<] splitable!
+; CHECK: da analyze - split level = 1, iteration = 11!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 13
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i < 12; i++)
+;; A[3*i - 18][22 - i] = ...
+;; ... = A[i][i]
+
+define void @couple13([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %sub = sub nsw i64 22, %i.02
+ %mul = mul nsw i64 %i.02, 3
+ %sub1 = add nsw i64 %mul, -18
+ %arrayidx2 = getelementptr inbounds [100 x i32]* %A, i64 %sub1, i64 %sub
+ store i32 %conv, i32* %arrayidx2, align 4
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 12
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i < 100; i++)
+;; A[3*i - 18][18 - i][i] = ...
+;; ... = A[i][i][i]
+
+define void @couple14([100 x [100 x i32]]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %sub = sub nsw i64 18, %i.02
+ %mul = mul nsw i64 %i.02, 3
+ %sub1 = add nsw i64 %mul, -18
+ %arrayidx3 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 %sub1, i64 %sub, i64 %i.02
+ store i32 %conv, i32* %arrayidx3, align 4
+ %arrayidx6 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 %i.02, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx6, align 4
+; CHECK: da analyze - flow [=|<] splitable!
+; CHECK: da analyze - split level = 1, iteration = 9!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 100
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long int i = 0; i < 100; i++)
+;; A[3*i - 18][22 - i][i] = ...
+;; ... = A[i][i][i]
+
+define void @couple15([100 x [100 x i32]]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %sub = sub nsw i64 22, %i.02
+ %mul = mul nsw i64 %i.02, 3
+ %sub1 = add nsw i64 %mul, -18
+ %arrayidx3 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 %sub1, i64 %sub, i64 %i.02
+ store i32 %conv, i32* %arrayidx3, align 4
+ %arrayidx6 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 %i.02, i64 %i.02, i64 %i.02
+ %0 = load i32* %arrayidx6, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add nsw i64 %i.02, 1
+ %cmp = icmp slt i64 %inc, 100
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/ExactRDIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/ExactRDIV.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/ExactRDIV.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/ExactRDIV.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,508 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'ExactRDIV.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long int i = 0; i < 10; i++)
+;; A[4*i + 10] = ...
+;; for (long int j = 0; j < 10; j++)
+;; ... = A[2*j + 1];
+
+define void @rdiv0(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %i.03, 2
+ %add = add nsw i64 %mul, 10
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc, 10
+ br i1 %cmp, label %for.body, label %for.body4
+
+for.body4: ; preds = %for.body4, %for.body
+ %j.02 = phi i64 [ %inc9, %for.body4 ], [ 0, %for.body ]
+ %B.addr.01 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.body ]
+ %mul5 = shl nsw i64 %j.02, 1
+ %add64 = or i64 %mul5, 1
+ %arrayidx7 = getelementptr inbounds i32* %A, i64 %add64
+ %0 = load i32* %arrayidx7, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc9 = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc9, 10
+ br i1 %cmp2, label %for.body4, label %for.end10
+
+for.end10: ; preds = %for.body4
+ ret void
+}
+
+
+;; for (long int i = 0; i < 5; i++)
+;; A[11*i - 45] = ...
+;; for (long int j = 0; j < 10; j++)
+;; ... = A[j];
+
+define void @rdiv1(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, 11
+ %sub = add nsw i64 %mul, -45
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc, 5
+ br i1 %cmp, label %for.body, label %for.body4
+
+for.body4: ; preds = %for.body4, %for.body
+ %j.02 = phi i64 [ %inc7, %for.body4 ], [ 0, %for.body ]
+ %B.addr.01 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.body ]
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %j.02
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc7 = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc7, 10
+ br i1 %cmp2, label %for.body4, label %for.end8
+
+for.end8: ; preds = %for.body4
+ ret void
+}
+
+
+;; for (long int i = 0; i <= 5; i++)
+;; A[11*i - 45] = ...
+;; for (long int j = 0; j < 10; j++)
+;; ... = A[j];
+
+define void @rdiv2(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, 11
+ %sub = add nsw i64 %mul, -45
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc, 6
+ br i1 %cmp, label %for.body, label %for.body4
+
+for.body4: ; preds = %for.body4, %for.body
+ %j.02 = phi i64 [ %inc7, %for.body4 ], [ 0, %for.body ]
+ %B.addr.01 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.body ]
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %j.02
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc7 = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc7, 10
+ br i1 %cmp2, label %for.body4, label %for.end8
+
+for.end8: ; preds = %for.body4
+ ret void
+}
+
+
+;; for (long int i = 0; i < 5; i++)
+;; A[11*i - 45] = ...
+;; for (long int j = 0; j <= 10; j++)
+;; ... = A[j];
+
+define void @rdiv3(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, 11
+ %sub = add nsw i64 %mul, -45
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc, 5
+ br i1 %cmp, label %for.body, label %for.body4
+
+for.body4: ; preds = %for.body4, %for.body
+ %j.02 = phi i64 [ %inc7, %for.body4 ], [ 0, %for.body ]
+ %B.addr.01 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.body ]
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %j.02
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc7 = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc7, 11
+ br i1 %cmp2, label %for.body4, label %for.end8
+
+for.end8: ; preds = %for.body4
+ ret void
+}
+
+
+;; for (long int i = 0; i <= 5; i++)
+;; A[11*i - 45] = ...
+;; for (long int j = 0; j <= 10; j++)
+;; ... = A[j];
+
+define void @rdiv4(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, 11
+ %sub = add nsw i64 %mul, -45
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc, 6
+ br i1 %cmp, label %for.body, label %for.body4
+
+for.body4: ; preds = %for.body4, %for.body
+ %j.02 = phi i64 [ %inc7, %for.body4 ], [ 0, %for.body ]
+ %B.addr.01 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.body ]
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %j.02
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - flow!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc7 = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc7, 11
+ br i1 %cmp2, label %for.body4, label %for.end8
+
+for.end8: ; preds = %for.body4
+ ret void
+}
+
+
+;; for (long int i = 0; i < 5; i++)
+;; A[-11*i + 45] = ...
+;; for (long int j = 0; j < 10; j++)
+;; ... = A[-j];
+
+define void @rdiv5(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, -11
+ %add = add nsw i64 %mul, 45
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc, 5
+ br i1 %cmp, label %for.body, label %for.body4
+
+for.body4: ; preds = %for.body4, %for.body
+ %j.02 = phi i64 [ %inc7, %for.body4 ], [ 0, %for.body ]
+ %B.addr.01 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.body ]
+ %sub = sub nsw i64 0, %j.02
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc7 = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc7, 10
+ br i1 %cmp2, label %for.body4, label %for.end8
+
+for.end8: ; preds = %for.body4
+ ret void
+}
+
+
+;; for (long int i = 0; i <= 5; i++)
+;; A[-11*i + 45] = ...
+;; for (long int j = 0; j < 10; j++)
+;; ... = A[-j];
+
+define void @rdiv6(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, -11
+ %add = add nsw i64 %mul, 45
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc, 6
+ br i1 %cmp, label %for.body, label %for.body4
+
+for.body4: ; preds = %for.body4, %for.body
+ %j.02 = phi i64 [ %inc7, %for.body4 ], [ 0, %for.body ]
+ %B.addr.01 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.body ]
+ %sub = sub nsw i64 0, %j.02
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc7 = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc7, 10
+ br i1 %cmp2, label %for.body4, label %for.end8
+
+for.end8: ; preds = %for.body4
+ ret void
+}
+
+
+;; for (long int i = 0; i < 5; i++)
+;; A[-11*i + 45] = ...
+;; for (long int j = 0; j <= 10; j++)
+;; ... = A[-j];
+
+define void @rdiv7(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, -11
+ %add = add nsw i64 %mul, 45
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc, 5
+ br i1 %cmp, label %for.body, label %for.body4
+
+for.body4: ; preds = %for.body4, %for.body
+ %j.02 = phi i64 [ %inc7, %for.body4 ], [ 0, %for.body ]
+ %B.addr.01 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.body ]
+ %sub = sub nsw i64 0, %j.02
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc7 = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc7, 11
+ br i1 %cmp2, label %for.body4, label %for.end8
+
+for.end8: ; preds = %for.body4
+ ret void
+}
+
+
+;; for (long int i = 0; i <= 5; i++)
+;; A[-11*i + 45] = ...
+;; for (long int j = 0; j <= 10; j++)
+;; ... = A[-j];
+
+define void @rdiv8(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, -11
+ %add = add nsw i64 %mul, 45
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc, 6
+ br i1 %cmp, label %for.body, label %for.body4
+
+for.body4: ; preds = %for.body4, %for.body
+ %j.02 = phi i64 [ %inc7, %for.body4 ], [ 0, %for.body ]
+ %B.addr.01 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.body ]
+ %sub = sub nsw i64 0, %j.02
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - flow!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc7 = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc7, 11
+ br i1 %cmp2, label %for.body4, label %for.end8
+
+for.end8: ; preds = %for.body4
+ ret void
+}
+
+
+;; for (long int i = 0; i < 5; i++)
+;; for (long int j = 0; j < 10; j++)
+;; A[11*i - j] = ...
+;; ... = A[45];
+
+define void @rdiv9(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc5, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc5 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc6, %for.inc5 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, 11
+ %sub = sub nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx4 = getelementptr inbounds i32* %A, i64 45
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 10
+ br i1 %cmp2, label %for.body3, label %for.inc5
+
+for.inc5: ; preds = %for.body3
+ %inc6 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc6, 5
+ br i1 %cmp, label %for.cond1.preheader, label %for.end7
+
+for.end7: ; preds = %for.inc5
+ ret void
+}
+
+
+;; for (long int i = 0; i < 5; i++)
+;; for (long int j = 0; j <= 10; j++)
+;; A[11*i - j] = ...
+;; ... = A[45];
+
+define void @rdiv10(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc5, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc5 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc6, %for.inc5 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, 11
+ %sub = sub nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx4 = getelementptr inbounds i32* %A, i64 45
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 10
+ br i1 %cmp2, label %for.body3, label %for.inc5
+
+for.inc5: ; preds = %for.body3
+ %inc6 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc6, 6
+ br i1 %cmp, label %for.cond1.preheader, label %for.end7
+
+for.end7: ; preds = %for.inc5
+ ret void
+}
+
+
+;; for (long int i = 0; i <= 5; i++)
+;; for (long int j = 0; j <= 10; j++)
+;; A[11*i - j] = ...
+;; ... = A[45];
+
+define void @rdiv11(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc5, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc5 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc6, %for.inc5 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, 11
+ %sub = sub nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx4 = getelementptr inbounds i32* %A, i64 45
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 11
+ br i1 %cmp2, label %for.body3, label %for.inc5
+
+for.inc5: ; preds = %for.body3
+ %inc6 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc6, 5
+ br i1 %cmp, label %for.cond1.preheader, label %for.end7
+
+for.end7: ; preds = %for.inc5
+ ret void
+}
+
+
+;; for (long int i = 0; i < 5; i++)
+;; for (long int j = 0; j < 10; j++)
+;; A[11*i - j] = ...
+;; ... = A[45];
+
+define void @rdiv12(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc5, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc5 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc6, %for.inc5 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, 11
+ %sub = sub nsw i64 %mul, %j.02
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx4 = getelementptr inbounds i32* %A, i64 45
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - flow [* *|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 11
+ br i1 %cmp2, label %for.body3, label %for.inc5
+
+for.inc5: ; preds = %for.body3
+ %inc6 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc6, 6
+ br i1 %cmp, label %for.cond1.preheader, label %for.end7
+
+for.end7: ; preds = %for.inc5
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/ExactSIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/ExactSIV.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/ExactSIV.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/ExactSIV.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,428 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'ExactSIV.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long unsigned i = 0; i < 10; i++) {
+;; A[i + 10] = ...
+;; ... = A[2*i + 1];
+
+define void @exact0(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %add = add i64 %i.02, 10
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul = shl i64 %i.02, 1
+ %add13 = or i64 %mul, 1
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %add13
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - flow [<=|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 10
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 10; i++) {
+;; A[4*i + 10] = ...
+;; ... = A[2*i + 1];
+
+define void @exact1(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = shl i64 %i.02, 2
+ %add = add i64 %mul, 10
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul1 = shl i64 %i.02, 1
+ %add23 = or i64 %mul1, 1
+ %arrayidx3 = getelementptr inbounds i32* %A, i64 %add23
+ %0 = load i32* %arrayidx3, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 10
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 10; i++) {
+;; A[6*i] = ...
+;; ... = A[i + 60];
+
+define void @exact2(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, 6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %add = add i64 %i.02, 60
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 10
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i <= 10; i++) {
+;; A[6*i] = ...
+;; ... = A[i + 60];
+
+define void @exact3(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, 6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %add = add i64 %i.02, 60
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [>]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 11
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 12; i++) {
+;; A[6*i] = ...
+;; ... = A[i + 60];
+
+define void @exact4(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, 6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %add = add i64 %i.02, 60
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [>]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 12
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i <= 12; i++) {
+;; A[6*i] = ...
+;; ... = A[i + 60];
+
+define void @exact5(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, 6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %add = add i64 %i.02, 60
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [=>|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 13
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 18; i++) {
+;; A[6*i] = ...
+;; ... = A[i + 60];
+
+define void @exact6(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, 6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %add = add i64 %i.02, 60
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [=>|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 18
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i <= 18; i++) {
+;; A[6*i] = ...
+;; ... = A[i + 60];
+
+define void @exact7(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, 6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %add = add i64 %i.02, 60
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [*|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 19
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 10; i++) {
+;; A[-6*i] = ...
+;; ... = A[-i - 60];
+
+define void @exact8(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, -6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub1 = sub i64 -60, %i.02
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %sub1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 10
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i <= 10; i++) {
+;; A[-6*i] = ...
+;; ... = A[-i - 60];
+
+define void @exact9(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, -6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub1 = sub i64 -60, %i.02
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %sub1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - flow [>]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 11
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 12; i++) {
+;; A[-6*i] = ...
+;; ... = A[-i - 60];
+
+define void @exact10(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, -6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub1 = sub i64 -60, %i.02
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %sub1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - flow [>]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 12
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i <= 12; i++) {
+;; A[-6*i] = ...
+;; ... = A[-i - 60];
+
+define void @exact11(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, -6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub1 = sub i64 -60, %i.02
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %sub1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - flow [=>|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 13
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 18; i++) {
+;; A[-6*i] = ...
+;; ... = A[-i - 60];
+
+define void @exact12(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, -6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub1 = sub i64 -60, %i.02
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %sub1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - flow [=>|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 18
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i <= 18; i++) {
+;; A[-6*i] = ...
+;; ... = A[-i - 60];
+
+define void @exact13(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, -6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub1 = sub i64 -60, %i.02
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %sub1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - flow [*|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 19
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/GCD.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/GCD.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/GCD.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/GCD.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,597 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'GCD.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[2*i - 4*j] = ...
+;; ... = A[6*i + 8*j];
+
+define void @gcd0(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc8
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %scevgep, %for.inc8 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc9, %for.inc8 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %i.03, 1
+ %mul4 = shl nsw i64 %j.02, 2
+ %sub = sub nsw i64 %mul, %mul4
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul5 = mul nsw i64 %i.03, 6
+ %mul6 = shl nsw i64 %j.02, 3
+ %add = add nsw i64 %mul5, %mul6
+ %arrayidx7 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx7, align 4
+; CHECK: da analyze - flow [=> *|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 100
+ br i1 %exitcond, label %for.body3, label %for.inc8
+
+for.inc8: ; preds = %for.body3
+ %scevgep = getelementptr i32* %B.addr.04, i64 100
+ %inc9 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc9, 100
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end10
+
+for.end10: ; preds = %for.inc8
+ ret void
+}
+
+
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[2*i - 4*j] = ...
+;; ... = A[6*i + 8*j + 1];
+
+define void @gcd1(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc9
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %scevgep, %for.inc9 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc10, %for.inc9 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %i.03, 1
+ %mul4 = shl nsw i64 %j.02, 2
+ %sub = sub nsw i64 %mul, %mul4
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul5 = mul nsw i64 %i.03, 6
+ %mul6 = shl nsw i64 %j.02, 3
+ %add = add nsw i64 %mul5, %mul6
+ %add7 = or i64 %add, 1
+ %arrayidx8 = getelementptr inbounds i32* %A, i64 %add7
+ %0 = load i32* %arrayidx8, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 100
+ br i1 %exitcond, label %for.body3, label %for.inc9
+
+for.inc9: ; preds = %for.body3
+ %scevgep = getelementptr i32* %B.addr.04, i64 100
+ %inc10 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc10, 100
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end11
+
+for.end11: ; preds = %for.inc9
+ ret void
+}
+
+
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[2*i - 4*j + 1] = ...
+;; ... = A[6*i + 8*j];
+
+define void @gcd2(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc9
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %scevgep, %for.inc9 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc10, %for.inc9 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %i.03, 1
+ %mul4 = shl nsw i64 %j.02, 2
+ %sub = sub nsw i64 %mul, %mul4
+ %add5 = or i64 %sub, 1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add5
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul5 = mul nsw i64 %i.03, 6
+ %mul6 = shl nsw i64 %j.02, 3
+ %add7 = add nsw i64 %mul5, %mul6
+ %arrayidx8 = getelementptr inbounds i32* %A, i64 %add7
+ %0 = load i32* %arrayidx8, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 100
+ br i1 %exitcond, label %for.body3, label %for.inc9
+
+for.inc9: ; preds = %for.body3
+ %scevgep = getelementptr i32* %B.addr.04, i64 100
+ %inc10 = add nsw i64 %i.03, 1
+ %exitcond6 = icmp ne i64 %inc10, 100
+ br i1 %exitcond6, label %for.cond1.preheader, label %for.end11
+
+for.end11: ; preds = %for.inc9
+ ret void
+}
+
+
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[i + 2*j] = ...
+;; ... = A[i + 2*j - 1];
+
+define void @gcd3(i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc7
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %scevgep, %for.inc7 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc8, %for.inc7 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %j.02, 1
+ %add = add nsw i64 %i.03, %mul
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul4 = shl nsw i64 %j.02, 1
+ %add5 = add nsw i64 %i.03, %mul4
+ %sub = add nsw i64 %add5, -1
+ %arrayidx6 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx6, align 4
+; CHECK: da analyze - flow [<> *]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 100
+ br i1 %exitcond, label %for.body3, label %for.inc7
+
+for.inc7: ; preds = %for.body3
+ %scevgep = getelementptr i32* %B.addr.04, i64 100
+ %inc8 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc8, 100
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end9
+
+for.end9: ; preds = %for.inc7
+ ret void
+}
+
+
+;; void gcd4(int *A, int *B, long int M, long int N) {
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++) {
+;; A[5*i + 10*j*M + 9*M*N] = i;
+;; *B++ = A[15*i + 20*j*M - 21*N*M + 4];
+
+define void @gcd4(i32* %A, i32* %B, i64 %M, i64 %N) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc17
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %scevgep, %for.inc17 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc18, %for.inc17 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, 5
+ %mul4 = mul nsw i64 %j.02, 10
+ %mul5 = mul nsw i64 %mul4, %M
+ %add = add nsw i64 %mul, %mul5
+ %mul6 = mul nsw i64 %M, 9
+ %mul7 = mul nsw i64 %mul6, %N
+ %add8 = add nsw i64 %add, %mul7
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add8
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul9 = mul nsw i64 %i.03, 15
+ %mul10 = mul nsw i64 %j.02, 20
+ %mul11 = mul nsw i64 %mul10, %M
+ %add12 = add nsw i64 %mul9, %mul11
+ %mul13 = mul nsw i64 %N, 21
+ %mul14 = mul nsw i64 %mul13, %M
+ %sub = sub nsw i64 %add12, %mul14
+ %add15 = add nsw i64 %sub, 4
+ %arrayidx16 = getelementptr inbounds i32* %A, i64 %add15
+ %0 = load i32* %arrayidx16, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 100
+ br i1 %exitcond, label %for.body3, label %for.inc17
+
+for.inc17: ; preds = %for.body3
+ %scevgep = getelementptr i32* %B.addr.04, i64 100
+ %inc18 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc18, 100
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end19
+
+for.end19: ; preds = %for.inc17
+ ret void
+}
+
+
+;; void gcd5(int *A, int *B, long int M, long int N) {
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++) {
+;; A[5*i + 10*j*M + 9*M*N] = i;
+;; *B++ = A[15*i + 20*j*M - 21*N*M + 5];
+
+define void @gcd5(i32* %A, i32* %B, i64 %M, i64 %N) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %entry, %for.inc17
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %scevgep, %for.inc17 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc18, %for.inc17 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.cond1.preheader, %for.body3
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, 5
+ %mul4 = mul nsw i64 %j.02, 10
+ %mul5 = mul nsw i64 %mul4, %M
+ %add = add nsw i64 %mul, %mul5
+ %mul6 = mul nsw i64 %M, 9
+ %mul7 = mul nsw i64 %mul6, %N
+ %add8 = add nsw i64 %add, %mul7
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add8
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul9 = mul nsw i64 %i.03, 15
+ %mul10 = mul nsw i64 %j.02, 20
+ %mul11 = mul nsw i64 %mul10, %M
+ %add12 = add nsw i64 %mul9, %mul11
+ %mul13 = mul nsw i64 %N, 21
+ %mul14 = mul nsw i64 %mul13, %M
+ %sub = sub nsw i64 %add12, %mul14
+ %add15 = add nsw i64 %sub, 5
+ %arrayidx16 = getelementptr inbounds i32* %A, i64 %add15
+ %0 = load i32* %arrayidx16, align 4
+; CHECK: da analyze - flow [<> *]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %exitcond = icmp ne i64 %inc, 100
+ br i1 %exitcond, label %for.body3, label %for.inc17
+
+for.inc17: ; preds = %for.body3
+ %scevgep = getelementptr i32* %B.addr.04, i64 100
+ %inc18 = add nsw i64 %i.03, 1
+ %exitcond5 = icmp ne i64 %inc18, 100
+ br i1 %exitcond5, label %for.cond1.preheader, label %for.end19
+
+for.end19: ; preds = %for.inc17
+ ret void
+}
+
+
+;; void gcd6(long int n, int A[][n], int *B) {
+;; for (long int i = 0; i < n; i++)
+;; for (long int j = 0; j < n; j++) {
+;; A[2*i][4*j] = i;
+;; *B++ = A[8*i][6*j + 1];
+
+define void @gcd6(i64 %n, i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ %cmp4 = icmp sgt i64 %n, 0
+ br i1 %cmp4, label %for.cond1.preheader.preheader, label %for.end12
+
+for.cond1.preheader.preheader: ; preds = %entry
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.cond1.preheader.preheader, %for.inc10
+ %i.06 = phi i64 [ %inc11, %for.inc10 ], [ 0, %for.cond1.preheader.preheader ]
+ %B.addr.05 = phi i32* [ %B.addr.1.lcssa, %for.inc10 ], [ %B, %for.cond1.preheader.preheader ]
+ %cmp21 = icmp sgt i64 %n, 0
+ br i1 %cmp21, label %for.body3.preheader, label %for.inc10
+
+for.body3.preheader: ; preds = %for.cond1.preheader
+ br label %for.body3
+
+for.body3: ; preds = %for.body3.preheader, %for.body3
+ %j.03 = phi i64 [ %inc, %for.body3 ], [ 0, %for.body3.preheader ]
+ %B.addr.12 = phi i32* [ %incdec.ptr, %for.body3 ], [ %B.addr.05, %for.body3.preheader ]
+ %conv = trunc i64 %i.06 to i32
+ %mul = shl nsw i64 %j.03, 2
+ %mul4 = shl nsw i64 %i.06, 1
+ %0 = mul nsw i64 %mul4, %n
+ %arrayidx.sum = add i64 %0, %mul
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %arrayidx.sum
+ store i32 %conv, i32* %arrayidx5, align 4
+ %mul6 = mul nsw i64 %j.03, 6
+ %add7 = or i64 %mul6, 1
+ %mul7 = shl nsw i64 %i.06, 3
+ %1 = mul nsw i64 %mul7, %n
+ %arrayidx8.sum = add i64 %1, %add7
+ %arrayidx9 = getelementptr inbounds i32* %A, i64 %arrayidx8.sum
+ %2 = load i32* %arrayidx9, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.12, i64 1
+ store i32 %2, i32* %B.addr.12, align 4
+ %inc = add nsw i64 %j.03, 1
+ %exitcond = icmp ne i64 %inc, %n
+ br i1 %exitcond, label %for.body3, label %for.inc10.loopexit
+
+for.inc10.loopexit: ; preds = %for.body3
+ %scevgep = getelementptr i32* %B.addr.05, i64 %n
+ br label %for.inc10
+
+for.inc10: ; preds = %for.inc10.loopexit, %for.cond1.preheader
+ %B.addr.1.lcssa = phi i32* [ %B.addr.05, %for.cond1.preheader ], [ %scevgep, %for.inc10.loopexit ]
+ %inc11 = add nsw i64 %i.06, 1
+ %exitcond8 = icmp ne i64 %inc11, %n
+ br i1 %exitcond8, label %for.cond1.preheader, label %for.end12.loopexit
+
+for.end12.loopexit: ; preds = %for.inc10
+ br label %for.end12
+
+for.end12: ; preds = %for.end12.loopexit, %entry
+ ret void
+}
+
+
+;; void gcd7(int n, int A[][n], int *B) {
+;; for (int i = 0; i < n; i++)
+;; for (int j = 0; j < n; j++) {
+;; A[2*i][4*j] = i;
+;; *B++ = A[8*i][6*j + 1];
+
+define void @gcd7(i32 %n, i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ %0 = zext i32 %n to i64
+ %cmp4 = icmp sgt i32 %n, 0
+ br i1 %cmp4, label %for.cond1.preheader.preheader, label %for.end15
+
+for.cond1.preheader.preheader: ; preds = %entry
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.cond1.preheader.preheader, %for.inc13
+ %indvars.iv8 = phi i64 [ 0, %for.cond1.preheader.preheader ], [ %indvars.iv.next9, %for.inc13 ]
+ %B.addr.05 = phi i32* [ %B.addr.1.lcssa, %for.inc13 ], [ %B, %for.cond1.preheader.preheader ]
+ %1 = add i32 %n, -1
+ %2 = zext i32 %1 to i64
+ %3 = add i64 %2, 1
+ %cmp21 = icmp sgt i32 %n, 0
+ br i1 %cmp21, label %for.body3.preheader, label %for.inc13
+
+for.body3.preheader: ; preds = %for.cond1.preheader
+ br label %for.body3
+
+for.body3: ; preds = %for.body3.preheader, %for.body3
+ %indvars.iv = phi i64 [ 0, %for.body3.preheader ], [ %indvars.iv.next, %for.body3 ]
+ %B.addr.12 = phi i32* [ %incdec.ptr, %for.body3 ], [ %B.addr.05, %for.body3.preheader ]
+ %4 = trunc i64 %indvars.iv to i32
+ %mul = shl nsw i32 %4, 2
+ %idxprom = sext i32 %mul to i64
+ %5 = trunc i64 %indvars.iv8 to i32
+ %mul4 = shl nsw i32 %5, 1
+ %idxprom5 = sext i32 %mul4 to i64
+ %6 = mul nsw i64 %idxprom5, %0
+ %arrayidx.sum = add i64 %6, %idxprom
+ %arrayidx6 = getelementptr inbounds i32* %A, i64 %arrayidx.sum
+ %7 = trunc i64 %indvars.iv8 to i32
+ store i32 %7, i32* %arrayidx6, align 4
+ %8 = trunc i64 %indvars.iv to i32
+ %mul7 = mul nsw i32 %8, 6
+ %add7 = or i32 %mul7, 1
+ %idxprom8 = sext i32 %add7 to i64
+ %9 = trunc i64 %indvars.iv8 to i32
+ %mul9 = shl nsw i32 %9, 3
+ %idxprom10 = sext i32 %mul9 to i64
+ %10 = mul nsw i64 %idxprom10, %0
+ %arrayidx11.sum = add i64 %10, %idxprom8
+ %arrayidx12 = getelementptr inbounds i32* %A, i64 %arrayidx11.sum
+ %11 = load i32* %arrayidx12, align 4
+; CHECK: da analyze - flow [* *|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.12, i64 1
+ store i32 %11, i32* %B.addr.12, align 4
+ %indvars.iv.next = add i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp ne i32 %lftr.wideiv, %n
+ br i1 %exitcond, label %for.body3, label %for.inc13.loopexit
+
+for.inc13.loopexit: ; preds = %for.body3
+ %scevgep = getelementptr i32* %B.addr.05, i64 %3
+ br label %for.inc13
+
+for.inc13: ; preds = %for.inc13.loopexit, %for.cond1.preheader
+ %B.addr.1.lcssa = phi i32* [ %B.addr.05, %for.cond1.preheader ], [ %scevgep, %for.inc13.loopexit ]
+ %indvars.iv.next9 = add i64 %indvars.iv8, 1
+ %lftr.wideiv10 = trunc i64 %indvars.iv.next9 to i32
+ %exitcond11 = icmp ne i32 %lftr.wideiv10, %n
+ br i1 %exitcond11, label %for.cond1.preheader, label %for.end15.loopexit
+
+for.end15.loopexit: ; preds = %for.inc13
+ br label %for.end15
+
+for.end15: ; preds = %for.end15.loopexit, %entry
+ ret void
+}
+
+
+;; void gcd8(int n, int *A, int *B) {
+;; for (int i = 0; i < n; i++)
+;; for (int j = 0; j < n; j++) {
+;; A[n*2*i + 4*j] = i;
+;; *B++ = A[n*8*i + 6*j + 1];
+
+define void @gcd8(i32 %n, i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ %cmp4 = icmp sgt i32 %n, 0
+ br i1 %cmp4, label %for.cond1.preheader.preheader, label %for.end15
+
+for.cond1.preheader.preheader: ; preds = %entry
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.cond1.preheader.preheader, %for.inc13
+ %i.06 = phi i32 [ %inc14, %for.inc13 ], [ 0, %for.cond1.preheader.preheader ]
+ %B.addr.05 = phi i32* [ %B.addr.1.lcssa, %for.inc13 ], [ %B, %for.cond1.preheader.preheader ]
+ %0 = add i32 %n, -1
+ %1 = zext i32 %0 to i64
+ %2 = add i64 %1, 1
+ %cmp21 = icmp sgt i32 %n, 0
+ br i1 %cmp21, label %for.body3.preheader, label %for.inc13
+
+for.body3.preheader: ; preds = %for.cond1.preheader
+ br label %for.body3
+
+for.body3: ; preds = %for.body3.preheader, %for.body3
+ %indvars.iv = phi i64 [ 0, %for.body3.preheader ], [ %indvars.iv.next, %for.body3 ]
+ %B.addr.12 = phi i32* [ %incdec.ptr, %for.body3 ], [ %B.addr.05, %for.body3.preheader ]
+ %mul = shl nsw i32 %n, 1
+ %mul4 = mul nsw i32 %mul, %i.06
+ %3 = trunc i64 %indvars.iv to i32
+ %mul5 = shl nsw i32 %3, 2
+ %add = add nsw i32 %mul4, %mul5
+ %idxprom = sext i32 %add to i64
+ %arrayidx = getelementptr inbounds i32* %A, i64 %idxprom
+ store i32 %i.06, i32* %arrayidx, align 4
+ %mul6 = shl nsw i32 %n, 3
+ %mul7 = mul nsw i32 %mul6, %i.06
+ %4 = trunc i64 %indvars.iv to i32
+ %mul8 = mul nsw i32 %4, 6
+ %add9 = add nsw i32 %mul7, %mul8
+ %add10 = or i32 %add9, 1
+ %idxprom11 = sext i32 %add10 to i64
+ %arrayidx12 = getelementptr inbounds i32* %A, i64 %idxprom11
+ %5 = load i32* %arrayidx12, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.12, i64 1
+ store i32 %5, i32* %B.addr.12, align 4
+ %indvars.iv.next = add i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp ne i32 %lftr.wideiv, %n
+ br i1 %exitcond, label %for.body3, label %for.inc13.loopexit
+
+for.inc13.loopexit: ; preds = %for.body3
+ %scevgep = getelementptr i32* %B.addr.05, i64 %2
+ br label %for.inc13
+
+for.inc13: ; preds = %for.inc13.loopexit, %for.cond1.preheader
+ %B.addr.1.lcssa = phi i32* [ %B.addr.05, %for.cond1.preheader ], [ %scevgep, %for.inc13.loopexit ]
+ %inc14 = add nsw i32 %i.06, 1
+ %exitcond7 = icmp ne i32 %inc14, %n
+ br i1 %exitcond7, label %for.cond1.preheader, label %for.end15.loopexit
+
+for.end15.loopexit: ; preds = %for.inc13
+ br label %for.end15
+
+for.end15: ; preds = %for.end15.loopexit, %entry
+ ret void
+}
+
+
+;; void gcd9(unsigned n, int A[][n], int *B) {
+;; for (unsigned i = 0; i < n; i++)
+;; for (unsigned j = 0; j < n; j++) {
+;; A[2*i][4*j] = i;
+;; *B++ = A[8*i][6*j + 1];
+
+define void @gcd9(i32 %n, i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ %0 = zext i32 %n to i64
+ %cmp4 = icmp eq i32 %n, 0
+ br i1 %cmp4, label %for.end15, label %for.cond1.preheader.preheader
+
+for.cond1.preheader.preheader: ; preds = %entry
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.cond1.preheader.preheader, %for.inc13
+ %indvars.iv8 = phi i64 [ 0, %for.cond1.preheader.preheader ], [ %indvars.iv.next9, %for.inc13 ]
+ %B.addr.05 = phi i32* [ %B.addr.1.lcssa, %for.inc13 ], [ %B, %for.cond1.preheader.preheader ]
+ %1 = add i32 %n, -1
+ %2 = zext i32 %1 to i64
+ %3 = add i64 %2, 1
+ %cmp21 = icmp eq i32 %n, 0
+ br i1 %cmp21, label %for.inc13, label %for.body3.preheader
+
+for.body3.preheader: ; preds = %for.cond1.preheader
+ br label %for.body3
+
+for.body3: ; preds = %for.body3.preheader, %for.body3
+ %indvars.iv = phi i64 [ 0, %for.body3.preheader ], [ %indvars.iv.next, %for.body3 ]
+ %B.addr.12 = phi i32* [ %incdec.ptr, %for.body3 ], [ %B.addr.05, %for.body3.preheader ]
+ %4 = trunc i64 %indvars.iv to i32
+ %mul = shl i32 %4, 2
+ %idxprom = zext i32 %mul to i64
+ %5 = trunc i64 %indvars.iv8 to i32
+ %mul4 = shl i32 %5, 1
+ %idxprom5 = zext i32 %mul4 to i64
+ %6 = mul nsw i64 %idxprom5, %0
+ %arrayidx.sum = add i64 %6, %idxprom
+ %arrayidx6 = getelementptr inbounds i32* %A, i64 %arrayidx.sum
+ %7 = trunc i64 %indvars.iv8 to i32
+ store i32 %7, i32* %arrayidx6, align 4
+ %8 = trunc i64 %indvars.iv to i32
+ %mul7 = mul i32 %8, 6
+ %add7 = or i32 %mul7, 1
+ %idxprom8 = zext i32 %add7 to i64
+ %9 = trunc i64 %indvars.iv8 to i32
+ %mul9 = shl i32 %9, 3
+ %idxprom10 = zext i32 %mul9 to i64
+ %10 = mul nsw i64 %idxprom10, %0
+ %arrayidx11.sum = add i64 %10, %idxprom8
+ %arrayidx12 = getelementptr inbounds i32* %A, i64 %arrayidx11.sum
+ %11 = load i32* %arrayidx12, align 4
+; CHECK: da analyze - flow [* *|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.12, i64 1
+ store i32 %11, i32* %B.addr.12, align 4
+ %indvars.iv.next = add i64 %indvars.iv, 1
+ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
+ %exitcond = icmp ne i32 %lftr.wideiv, %n
+ br i1 %exitcond, label %for.body3, label %for.inc13.loopexit
+
+for.inc13.loopexit: ; preds = %for.body3
+ %scevgep = getelementptr i32* %B.addr.05, i64 %3
+ br label %for.inc13
+
+for.inc13: ; preds = %for.inc13.loopexit, %for.cond1.preheader
+ %B.addr.1.lcssa = phi i32* [ %B.addr.05, %for.cond1.preheader ], [ %scevgep, %for.inc13.loopexit ]
+ %indvars.iv.next9 = add i64 %indvars.iv8, 1
+ %lftr.wideiv10 = trunc i64 %indvars.iv.next9 to i32
+ %exitcond11 = icmp ne i32 %lftr.wideiv10, %n
+ br i1 %exitcond11, label %for.cond1.preheader, label %for.end15.loopexit
+
+for.end15.loopexit: ; preds = %for.inc13
+ br label %for.end15
+
+for.end15: ; preds = %for.end15.loopexit, %entry
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/Preliminary.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/Preliminary.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/Preliminary.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/Preliminary.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,469 @@
+; RUN: opt < %s -analyze -basicaa -indvars -da | FileCheck %s
+
+; This series of tests is more interesting when debugging is enabled.
+
+; ModuleID = 'Preliminary.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; may alias
+;; int p0(int n, int *A, int *B) {
+;; A[0] = n;
+;; return B[1];
+
+define i32 @p0(i32 %n, i32* %A, i32* %B) nounwind uwtable ssp {
+entry:
+ store i32 %n, i32* %A, align 4
+ %arrayidx1 = getelementptr inbounds i32* %B, i64 1
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - confused!
+ ret i32 %0
+}
+
+
+;; no alias
+;; int p1(int n, int *restrict A, int *restrict B) {
+;; A[0] = n;
+;; return B[1];
+
+define i32 @p1(i32 %n, i32* noalias %A, i32* noalias %B) nounwind uwtable ssp {
+entry:
+ store i32 %n, i32* %A, align 4
+ %arrayidx1 = getelementptr inbounds i32* %B, i64 1
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ ret i32 %0
+}
+
+;; check loop nesting levels
+;; for (long int i = 0; i < n; i++)
+;; for (long int j = 0; j < n; j++)
+;; for (long int k = 0; k < n; k++)
+;; A[i][j][k] = ...
+;; for (long int k = 0; k < n; k++)
+;; ... = A[i + 3][j + 2][k + 1];
+
+define void @p2(i64 %n, [100 x [100 x i64]]* %A, i64* %B) nounwind uwtable ssp {
+entry:
+ %cmp10 = icmp sgt i64 %n, 0
+ br i1 %cmp10, label %for.cond1.preheader, label %for.end26
+
+for.cond1.preheader: ; preds = %for.inc24, %entry
+ %B.addr.012 = phi i64* [ %B.addr.1.lcssa, %for.inc24 ], [ %B, %entry ]
+ %i.011 = phi i64 [ %inc25, %for.inc24 ], [ 0, %entry ]
+ %cmp26 = icmp sgt i64 %n, 0
+ br i1 %cmp26, label %for.cond4.preheader, label %for.inc24
+
+for.cond4.preheader: ; preds = %for.inc21, %for.cond1.preheader
+ %B.addr.18 = phi i64* [ %B.addr.2.lcssa, %for.inc21 ], [ %B.addr.012, %for.cond1.preheader ]
+ %j.07 = phi i64 [ %inc22, %for.inc21 ], [ 0, %for.cond1.preheader ]
+ %cmp51 = icmp sgt i64 %n, 0
+ br i1 %cmp51, label %for.body6, label %for.cond10.loopexit
+
+for.body6: ; preds = %for.body6, %for.cond4.preheader
+ %k.02 = phi i64 [ %inc, %for.body6 ], [ 0, %for.cond4.preheader ]
+ %arrayidx8 = getelementptr inbounds [100 x [100 x i64]]* %A, i64 %i.011, i64 %j.07, i64 %k.02
+ store i64 %i.011, i64* %arrayidx8, align 8
+ %inc = add nsw i64 %k.02, 1
+ %cmp5 = icmp slt i64 %inc, %n
+ br i1 %cmp5, label %for.body6, label %for.cond10.loopexit
+
+for.cond10.loopexit: ; preds = %for.body6, %for.cond4.preheader
+ %cmp113 = icmp sgt i64 %n, 0
+ br i1 %cmp113, label %for.body12, label %for.inc21
+
+for.body12: ; preds = %for.body12, %for.cond10.loopexit
+ %k9.05 = phi i64 [ %inc19, %for.body12 ], [ 0, %for.cond10.loopexit ]
+ %B.addr.24 = phi i64* [ %incdec.ptr, %for.body12 ], [ %B.addr.18, %for.cond10.loopexit ]
+ %add = add nsw i64 %k9.05, 1
+ %add13 = add nsw i64 %j.07, 2
+ %add14 = add nsw i64 %i.011, 3
+ %arrayidx17 = getelementptr inbounds [100 x [100 x i64]]* %A, i64 %add14, i64 %add13, i64 %add
+ %0 = load i64* %arrayidx17, align 8
+; CHECK: da analyze - flow [-3 -2]!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.24, i64 1
+ store i64 %0, i64* %B.addr.24, align 8
+ %inc19 = add nsw i64 %k9.05, 1
+ %cmp11 = icmp slt i64 %inc19, %n
+ br i1 %cmp11, label %for.body12, label %for.inc21
+
+for.inc21: ; preds = %for.body12, %for.cond10.loopexit
+ %B.addr.2.lcssa = phi i64* [ %B.addr.18, %for.cond10.loopexit ], [ %incdec.ptr, %for.body12 ]
+ %inc22 = add nsw i64 %j.07, 1
+ %cmp2 = icmp slt i64 %inc22, %n
+ br i1 %cmp2, label %for.cond4.preheader, label %for.inc24
+
+for.inc24: ; preds = %for.inc21, %for.cond1.preheader
+ %B.addr.1.lcssa = phi i64* [ %B.addr.012, %for.cond1.preheader ], [ %B.addr.2.lcssa, %for.inc21 ]
+ %inc25 = add nsw i64 %i.011, 1
+ %cmp = icmp slt i64 %inc25, %n
+ br i1 %cmp, label %for.cond1.preheader, label %for.end26
+
+for.end26: ; preds = %for.inc24, %entry
+ ret void
+}
+
+
+;; classify subscripts
+;; for (long int i = 0; i < n; i++)
+;; for (long int j = 0; j < n; j++)
+;; for (long int k = 0; k < n; k++)
+;; for (long int l = 0; l < n; l++)
+;; for (long int m = 0; m < n; m++)
+;; for (long int o = 0; o < n; o++)
+;; for (long int p = 0; p < n; p++)
+;; for (long int q = 0; q < n; q++)
+;; for (long int r = 0; r < n; r++)
+;; for (long int s = 0; s < n; s++)
+;; for (long int u = 0; u < n; u++)
+;; for (long int t = 0; t < n; t++) {
+;; A[i - 3] [j] [2] [k-1] [2*l + 1] [m] [p + q] [r + s] = ...
+;; ... = A[i + 3] [2] [u] [1-k] [3*l - 1] [o] [1 + n] [t + 2];
+
+define void @p3(i64 %n, [100 x [100 x [100 x [100 x [100 x [100 x [100 x i64]]]]]]]* %A, i64* %B) nounwind uwtable ssp {
+entry:
+ %cmp44 = icmp sgt i64 %n, 0
+ br i1 %cmp44, label %for.cond1.preheader, label %for.end90
+
+for.cond1.preheader: ; preds = %for.inc88, %entry
+ %B.addr.046 = phi i64* [ %B.addr.1.lcssa, %for.inc88 ], [ %B, %entry ]
+ %i.045 = phi i64 [ %inc89, %for.inc88 ], [ 0, %entry ]
+ %cmp240 = icmp sgt i64 %n, 0
+ br i1 %cmp240, label %for.cond4.preheader, label %for.inc88
+
+for.cond4.preheader: ; preds = %for.inc85, %for.cond1.preheader
+ %B.addr.142 = phi i64* [ %B.addr.2.lcssa, %for.inc85 ], [ %B.addr.046, %for.cond1.preheader ]
+ %j.041 = phi i64 [ %inc86, %for.inc85 ], [ 0, %for.cond1.preheader ]
+ %cmp536 = icmp sgt i64 %n, 0
+ br i1 %cmp536, label %for.cond7.preheader, label %for.inc85
+
+for.cond7.preheader: ; preds = %for.inc82, %for.cond4.preheader
+ %B.addr.238 = phi i64* [ %B.addr.3.lcssa, %for.inc82 ], [ %B.addr.142, %for.cond4.preheader ]
+ %k.037 = phi i64 [ %inc83, %for.inc82 ], [ 0, %for.cond4.preheader ]
+ %cmp832 = icmp sgt i64 %n, 0
+ br i1 %cmp832, label %for.cond10.preheader, label %for.inc82
+
+for.cond10.preheader: ; preds = %for.inc79, %for.cond7.preheader
+ %B.addr.334 = phi i64* [ %B.addr.4.lcssa, %for.inc79 ], [ %B.addr.238, %for.cond7.preheader ]
+ %l.033 = phi i64 [ %inc80, %for.inc79 ], [ 0, %for.cond7.preheader ]
+ %cmp1128 = icmp sgt i64 %n, 0
+ br i1 %cmp1128, label %for.cond13.preheader, label %for.inc79
+
+for.cond13.preheader: ; preds = %for.inc76, %for.cond10.preheader
+ %B.addr.430 = phi i64* [ %B.addr.5.lcssa, %for.inc76 ], [ %B.addr.334, %for.cond10.preheader ]
+ %m.029 = phi i64 [ %inc77, %for.inc76 ], [ 0, %for.cond10.preheader ]
+ %cmp1424 = icmp sgt i64 %n, 0
+ br i1 %cmp1424, label %for.cond16.preheader, label %for.inc76
+
+for.cond16.preheader: ; preds = %for.inc73, %for.cond13.preheader
+ %B.addr.526 = phi i64* [ %B.addr.6.lcssa, %for.inc73 ], [ %B.addr.430, %for.cond13.preheader ]
+ %o.025 = phi i64 [ %inc74, %for.inc73 ], [ 0, %for.cond13.preheader ]
+ %cmp1720 = icmp sgt i64 %n, 0
+ br i1 %cmp1720, label %for.cond19.preheader, label %for.inc73
+
+for.cond19.preheader: ; preds = %for.inc70, %for.cond16.preheader
+ %B.addr.622 = phi i64* [ %B.addr.7.lcssa, %for.inc70 ], [ %B.addr.526, %for.cond16.preheader ]
+ %p.021 = phi i64 [ %inc71, %for.inc70 ], [ 0, %for.cond16.preheader ]
+ %cmp2016 = icmp sgt i64 %n, 0
+ br i1 %cmp2016, label %for.cond22.preheader, label %for.inc70
+
+for.cond22.preheader: ; preds = %for.inc67, %for.cond19.preheader
+ %B.addr.718 = phi i64* [ %B.addr.8.lcssa, %for.inc67 ], [ %B.addr.622, %for.cond19.preheader ]
+ %q.017 = phi i64 [ %inc68, %for.inc67 ], [ 0, %for.cond19.preheader ]
+ %cmp2312 = icmp sgt i64 %n, 0
+ br i1 %cmp2312, label %for.cond25.preheader, label %for.inc67
+
+for.cond25.preheader: ; preds = %for.inc64, %for.cond22.preheader
+ %B.addr.814 = phi i64* [ %B.addr.9.lcssa, %for.inc64 ], [ %B.addr.718, %for.cond22.preheader ]
+ %r.013 = phi i64 [ %inc65, %for.inc64 ], [ 0, %for.cond22.preheader ]
+ %cmp268 = icmp sgt i64 %n, 0
+ br i1 %cmp268, label %for.cond28.preheader, label %for.inc64
+
+for.cond28.preheader: ; preds = %for.inc61, %for.cond25.preheader
+ %B.addr.910 = phi i64* [ %B.addr.10.lcssa, %for.inc61 ], [ %B.addr.814, %for.cond25.preheader ]
+ %s.09 = phi i64 [ %inc62, %for.inc61 ], [ 0, %for.cond25.preheader ]
+ %cmp294 = icmp sgt i64 %n, 0
+ br i1 %cmp294, label %for.cond31.preheader, label %for.inc61
+
+for.cond31.preheader: ; preds = %for.inc58, %for.cond28.preheader
+ %u.06 = phi i64 [ %inc59, %for.inc58 ], [ 0, %for.cond28.preheader ]
+ %B.addr.105 = phi i64* [ %B.addr.11.lcssa, %for.inc58 ], [ %B.addr.910, %for.cond28.preheader ]
+ %cmp321 = icmp sgt i64 %n, 0
+ br i1 %cmp321, label %for.body33, label %for.inc58
+
+for.body33: ; preds = %for.body33, %for.cond31.preheader
+ %t.03 = phi i64 [ %inc, %for.body33 ], [ 0, %for.cond31.preheader ]
+ %B.addr.112 = phi i64* [ %incdec.ptr, %for.body33 ], [ %B.addr.105, %for.cond31.preheader ]
+ %add = add nsw i64 %r.013, %s.09
+ %add34 = add nsw i64 %p.021, %q.017
+ %mul = shl nsw i64 %l.033, 1
+ %add3547 = or i64 %mul, 1
+ %sub = add nsw i64 %k.037, -1
+ %sub36 = add nsw i64 %i.045, -3
+ %arrayidx43 = getelementptr inbounds [100 x [100 x [100 x [100 x [100 x [100 x [100 x i64]]]]]]]* %A, i64 %sub36, i64 %j.041, i64 2, i64 %sub, i64 %add3547, i64 %m.029, i64 %add34, i64 %add
+ store i64 %i.045, i64* %arrayidx43, align 8
+ %add44 = add nsw i64 %t.03, 2
+ %add45 = add nsw i64 %n, 1
+ %mul46 = mul nsw i64 %l.033, 3
+ %sub47 = add nsw i64 %mul46, -1
+ %sub48 = sub nsw i64 1, %k.037
+ %add49 = add nsw i64 %i.045, 3
+ %arrayidx57 = getelementptr inbounds [100 x [100 x [100 x [100 x [100 x [100 x [100 x i64]]]]]]]* %A, i64 %add49, i64 2, i64 %u.06, i64 %sub48, i64 %sub47, i64 %o.025, i64 %add45, i64 %add44
+ %0 = load i64* %arrayidx57, align 8
+; CHECK: da analyze - flow [-6 * * => * * * * * * * *] splitable!
+; CHECK: da analyze - split level = 3, iteration = 1!
+ %incdec.ptr = getelementptr inbounds i64* %B.addr.112, i64 1
+ store i64 %0, i64* %B.addr.112, align 8
+ %inc = add nsw i64 %t.03, 1
+ %cmp32 = icmp slt i64 %inc, %n
+ br i1 %cmp32, label %for.body33, label %for.inc58
+
+for.inc58: ; preds = %for.body33, %for.cond31.preheader
+ %B.addr.11.lcssa = phi i64* [ %B.addr.105, %for.cond31.preheader ], [ %incdec.ptr, %for.body33 ]
+ %inc59 = add nsw i64 %u.06, 1
+ %cmp29 = icmp slt i64 %inc59, %n
+ br i1 %cmp29, label %for.cond31.preheader, label %for.inc61
+
+for.inc61: ; preds = %for.inc58, %for.cond28.preheader
+ %B.addr.10.lcssa = phi i64* [ %B.addr.910, %for.cond28.preheader ], [ %B.addr.11.lcssa, %for.inc58 ]
+ %inc62 = add nsw i64 %s.09, 1
+ %cmp26 = icmp slt i64 %inc62, %n
+ br i1 %cmp26, label %for.cond28.preheader, label %for.inc64
+
+for.inc64: ; preds = %for.inc61, %for.cond25.preheader
+ %B.addr.9.lcssa = phi i64* [ %B.addr.814, %for.cond25.preheader ], [ %B.addr.10.lcssa, %for.inc61 ]
+ %inc65 = add nsw i64 %r.013, 1
+ %cmp23 = icmp slt i64 %inc65, %n
+ br i1 %cmp23, label %for.cond25.preheader, label %for.inc67
+
+for.inc67: ; preds = %for.inc64, %for.cond22.preheader
+ %B.addr.8.lcssa = phi i64* [ %B.addr.718, %for.cond22.preheader ], [ %B.addr.9.lcssa, %for.inc64 ]
+ %inc68 = add nsw i64 %q.017, 1
+ %cmp20 = icmp slt i64 %inc68, %n
+ br i1 %cmp20, label %for.cond22.preheader, label %for.inc70
+
+for.inc70: ; preds = %for.inc67, %for.cond19.preheader
+ %B.addr.7.lcssa = phi i64* [ %B.addr.622, %for.cond19.preheader ], [ %B.addr.8.lcssa, %for.inc67 ]
+ %inc71 = add nsw i64 %p.021, 1
+ %cmp17 = icmp slt i64 %inc71, %n
+ br i1 %cmp17, label %for.cond19.preheader, label %for.inc73
+
+for.inc73: ; preds = %for.inc70, %for.cond16.preheader
+ %B.addr.6.lcssa = phi i64* [ %B.addr.526, %for.cond16.preheader ], [ %B.addr.7.lcssa, %for.inc70 ]
+ %inc74 = add nsw i64 %o.025, 1
+ %cmp14 = icmp slt i64 %inc74, %n
+ br i1 %cmp14, label %for.cond16.preheader, label %for.inc76
+
+for.inc76: ; preds = %for.inc73, %for.cond13.preheader
+ %B.addr.5.lcssa = phi i64* [ %B.addr.430, %for.cond13.preheader ], [ %B.addr.6.lcssa, %for.inc73 ]
+ %inc77 = add nsw i64 %m.029, 1
+ %cmp11 = icmp slt i64 %inc77, %n
+ br i1 %cmp11, label %for.cond13.preheader, label %for.inc79
+
+for.inc79: ; preds = %for.inc76, %for.cond10.preheader
+ %B.addr.4.lcssa = phi i64* [ %B.addr.334, %for.cond10.preheader ], [ %B.addr.5.lcssa, %for.inc76 ]
+ %inc80 = add nsw i64 %l.033, 1
+ %cmp8 = icmp slt i64 %inc80, %n
+ br i1 %cmp8, label %for.cond10.preheader, label %for.inc82
+
+for.inc82: ; preds = %for.inc79, %for.cond7.preheader
+ %B.addr.3.lcssa = phi i64* [ %B.addr.238, %for.cond7.preheader ], [ %B.addr.4.lcssa, %for.inc79 ]
+ %inc83 = add nsw i64 %k.037, 1
+ %cmp5 = icmp slt i64 %inc83, %n
+ br i1 %cmp5, label %for.cond7.preheader, label %for.inc85
+
+for.inc85: ; preds = %for.inc82, %for.cond4.preheader
+ %B.addr.2.lcssa = phi i64* [ %B.addr.142, %for.cond4.preheader ], [ %B.addr.3.lcssa, %for.inc82 ]
+ %inc86 = add nsw i64 %j.041, 1
+ %cmp2 = icmp slt i64 %inc86, %n
+ br i1 %cmp2, label %for.cond4.preheader, label %for.inc88
+
+for.inc88: ; preds = %for.inc85, %for.cond1.preheader
+ %B.addr.1.lcssa = phi i64* [ %B.addr.046, %for.cond1.preheader ], [ %B.addr.2.lcssa, %for.inc85 ]
+ %inc89 = add nsw i64 %i.045, 1
+ %cmp = icmp slt i64 %inc89, %n
+ br i1 %cmp, label %for.cond1.preheader, label %for.end90
+
+for.end90: ; preds = %for.inc88, %entry
+ ret void
+}
+
+
+;; cleanup around chars, shorts, ints
+;;void p4(int *A, int *B, long int n)
+;; for (char i = 0; i < n; i++)
+;; A[i + 2] = ...
+;; ... = A[i];
+
+define void @p4(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp sgt i64 %n, 0
+ br i1 %cmp1, label %for.body, label %for.end
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i8 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv2 = sext i8 %i.03 to i32
+ %conv3 = sext i8 %i.03 to i64
+ %add = add i64 %conv3, 2
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv2, i32* %arrayidx, align 4
+ %idxprom4 = sext i8 %i.03 to i64
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %idxprom4
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - flow [*|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add i8 %i.03, 1
+ %conv = sext i8 %inc to i64
+ %cmp = icmp slt i64 %conv, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;;void p5(int *A, int *B, long int n)
+;; for (short i = 0; i < n; i++)
+;; A[i + 2] = ...
+;; ... = A[i];
+
+define void @p5(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp sgt i64 %n, 0
+ br i1 %cmp1, label %for.body, label %for.end
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i16 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv2 = sext i16 %i.03 to i32
+ %conv3 = sext i16 %i.03 to i64
+ %add = add i64 %conv3, 2
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv2, i32* %arrayidx, align 4
+ %idxprom4 = sext i16 %i.03 to i64
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %idxprom4
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - flow [*|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add i16 %i.03, 1
+ %conv = sext i16 %inc to i64
+ %cmp = icmp slt i64 %conv, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;;void p6(int *A, int *B, long int n)
+;; for (int i = 0; i < n; i++)
+;; A[i + 2] = ...
+;; ... = A[i];
+
+define void @p6(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp sgt i64 %n, 0
+ br i1 %cmp1, label %for.body, label %for.end
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %add = add nsw i32 %i.03, 2
+ %idxprom = sext i32 %add to i64
+ %arrayidx = getelementptr inbounds i32* %A, i64 %idxprom
+ store i32 %i.03, i32* %arrayidx, align 4
+ %idxprom2 = sext i32 %i.03 to i64
+ %arrayidx3 = getelementptr inbounds i32* %A, i64 %idxprom2
+ %0 = load i32* %arrayidx3, align 4
+; CHECK: da analyze - consistent flow [2]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add nsw i32 %i.03, 1
+ %conv = sext i32 %inc to i64
+ %cmp = icmp slt i64 %conv, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;;void p7(unsigned *A, unsigned *B, char n)
+;; A[n] = ...
+;; ... = A[n + 1];
+
+define void @p7(i32* %A, i32* %B, i8 signext %n) nounwind uwtable ssp {
+entry:
+ %idxprom = sext i8 %n to i64
+ %arrayidx = getelementptr inbounds i32* %A, i64 %idxprom
+ store i32 0, i32* %arrayidx, align 4
+ %conv = sext i8 %n to i64
+ %add = add i64 %conv, 1
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - none!
+ store i32 %0, i32* %B, align 4
+ ret void
+}
+
+
+
+;;void p8(unsigned *A, unsigned *B, short n)
+;; A[n] = ...
+;; ... = A[n + 1];
+
+define void @p8(i32* %A, i32* %B, i16 signext %n) nounwind uwtable ssp {
+entry:
+ %idxprom = sext i16 %n to i64
+ %arrayidx = getelementptr inbounds i32* %A, i64 %idxprom
+ store i32 0, i32* %arrayidx, align 4
+ %conv = sext i16 %n to i64
+ %add = add i64 %conv, 1
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - none!
+ store i32 %0, i32* %B, align 4
+ ret void
+}
+
+
+;;void p9(unsigned *A, unsigned *B, int n)
+;; A[n] = ...
+;; ... = A[n + 1];
+
+define void @p9(i32* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ %idxprom = sext i32 %n to i64
+ %arrayidx = getelementptr inbounds i32* %A, i64 %idxprom
+ store i32 0, i32* %arrayidx, align 4
+ %add = add nsw i32 %n, 1
+ %idxprom1 = sext i32 %add to i64
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %idxprom1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - none!
+ store i32 %0, i32* %B, align 4
+ ret void
+}
+
+
+;;void p10(unsigned *A, unsigned *B, unsigned n)
+;; A[n] = ...
+;; ... = A[n + 1];
+
+define void @p10(i32* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ %idxprom = zext i32 %n to i64
+ %arrayidx = getelementptr inbounds i32* %A, i64 %idxprom
+ store i32 0, i32* %arrayidx, align 4
+ %add = add i32 %n, 1
+ %idxprom1 = zext i32 %add to i64
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %idxprom1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - none!
+ store i32 %0, i32* %B, align 4
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/Propagating.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/Propagating.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/Propagating.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/Propagating.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,467 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'Propagating.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[i + 1][i + j] = i;
+;; *B++ = A[i][i + j];
+
+define void @prop0([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc9, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc9 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc10, %for.inc9 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %add = add nsw i64 %i.03, %j.02
+ %add4 = add nsw i64 %i.03, 1
+ %arrayidx5 = getelementptr inbounds [100 x i32]* %A, i64 %add4, i64 %add
+ store i32 %conv, i32* %arrayidx5, align 4
+ %add6 = add nsw i64 %i.03, %j.02
+ %arrayidx8 = getelementptr inbounds [100 x i32]* %A, i64 %i.03, i64 %add6
+ %0 = load i32* %arrayidx8, align 4
+; CHECK: da analyze - consistent flow [1 -1]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 100
+ br i1 %cmp2, label %for.body3, label %for.inc9
+
+for.inc9: ; preds = %for.body3
+ %inc10 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc10, 100
+ br i1 %cmp, label %for.cond1.preheader, label %for.end11
+
+for.end11: ; preds = %for.inc9
+ ret void
+}
+
+
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; for (long int k = 0; k < 100; k++)
+;; A[j - i][i + 1][j + k] = ...
+;; ... = A[j - i][i][j + k];
+
+define void @prop1([100 x [100 x i32]]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc18, %entry
+ %B.addr.06 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc18 ]
+ %i.05 = phi i64 [ 0, %entry ], [ %inc19, %for.inc18 ]
+ br label %for.cond4.preheader
+
+for.cond4.preheader: ; preds = %for.inc15, %for.cond1.preheader
+ %B.addr.14 = phi i32* [ %B.addr.06, %for.cond1.preheader ], [ %incdec.ptr, %for.inc15 ]
+ %j.03 = phi i64 [ 0, %for.cond1.preheader ], [ %inc16, %for.inc15 ]
+ br label %for.body6
+
+for.body6: ; preds = %for.body6, %for.cond4.preheader
+ %k.02 = phi i64 [ 0, %for.cond4.preheader ], [ %inc, %for.body6 ]
+ %B.addr.21 = phi i32* [ %B.addr.14, %for.cond4.preheader ], [ %incdec.ptr, %for.body6 ]
+ %conv = trunc i64 %i.05 to i32
+ %add = add nsw i64 %j.03, %k.02
+ %add7 = add nsw i64 %i.05, 1
+ %sub = sub nsw i64 %j.03, %i.05
+ %arrayidx9 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 %sub, i64 %add7, i64 %add
+ store i32 %conv, i32* %arrayidx9, align 4
+ %add10 = add nsw i64 %j.03, %k.02
+ %sub11 = sub nsw i64 %j.03, %i.05
+ %arrayidx14 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 %sub11, i64 %i.05, i64 %add10
+ %0 = load i32* %arrayidx14, align 4
+; CHECK: da analyze - consistent flow [1 1 -1]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.21, i64 1
+ store i32 %0, i32* %B.addr.21, align 4
+ %inc = add nsw i64 %k.02, 1
+ %cmp5 = icmp slt i64 %inc, 100
+ br i1 %cmp5, label %for.body6, label %for.inc15
+
+for.inc15: ; preds = %for.body6
+ %inc16 = add nsw i64 %j.03, 1
+ %cmp2 = icmp slt i64 %inc16, 100
+ br i1 %cmp2, label %for.cond4.preheader, label %for.inc18
+
+for.inc18: ; preds = %for.inc15
+ %inc19 = add nsw i64 %i.05, 1
+ %cmp = icmp slt i64 %inc19, 100
+ br i1 %cmp, label %for.cond1.preheader, label %for.end20
+
+for.end20: ; preds = %for.inc18
+ ret void
+}
+
+
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[i - 1][2*i] = ...
+;; ... = A[i][i + j + 110];
+
+define void @prop2([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc8, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc8 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc9, %for.inc8 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %i.03, 1
+ %sub = add nsw i64 %i.03, -1
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 %sub, i64 %mul
+ store i32 %conv, i32* %arrayidx4, align 4
+ %add = add nsw i64 %i.03, %j.02
+ %add5 = add nsw i64 %add, 110
+ %arrayidx7 = getelementptr inbounds [100 x i32]* %A, i64 %i.03, i64 %add5
+ %0 = load i32* %arrayidx7, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 100
+ br i1 %cmp2, label %for.body3, label %for.inc8
+
+for.inc8: ; preds = %for.body3
+ %inc9 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc9, 100
+ br i1 %cmp, label %for.cond1.preheader, label %for.end10
+
+for.end10: ; preds = %for.inc8
+ ret void
+}
+
+
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[i][2*j + i] = ...
+;; ... = A[i][2*j - i + 5];
+
+define void @prop3([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc9, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc9 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc10, %for.inc9 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %j.02, 1
+ %add = add nsw i64 %mul, %i.03
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 %i.03, i64 %add
+ store i32 %conv, i32* %arrayidx4, align 4
+ %mul5 = shl nsw i64 %j.02, 1
+ %sub = sub nsw i64 %mul5, %i.03
+ %add6 = add nsw i64 %sub, 5
+ %arrayidx8 = getelementptr inbounds [100 x i32]* %A, i64 %i.03, i64 %add6
+ %0 = load i32* %arrayidx8, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 100
+ br i1 %cmp2, label %for.body3, label %for.inc9
+
+for.inc9: ; preds = %for.body3
+ %inc10 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc10, 100
+ br i1 %cmp, label %for.cond1.preheader, label %for.end11
+
+for.end11: ; preds = %for.inc9
+ ret void
+}
+
+
+;; propagate Distance
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[i + 2][2*i + j + 1] = ...
+;; ... = A[i][2*i + j];
+
+define void @prop4([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc11, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc11 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc12, %for.inc11 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %i.03, 1
+ %add = add nsw i64 %mul, %j.02
+ %add4 = add nsw i64 %add, 1
+ %add5 = add nsw i64 %i.03, 2
+ %arrayidx6 = getelementptr inbounds [100 x i32]* %A, i64 %add5, i64 %add4
+ store i32 %conv, i32* %arrayidx6, align 4
+ %mul7 = shl nsw i64 %i.03, 1
+ %add8 = add nsw i64 %mul7, %j.02
+ %arrayidx10 = getelementptr inbounds [100 x i32]* %A, i64 %i.03, i64 %add8
+ %0 = load i32* %arrayidx10, align 4
+; CHECK: da analyze - consistent flow [2 -3]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 100
+ br i1 %cmp2, label %for.body3, label %for.inc11
+
+for.inc11: ; preds = %for.body3
+ %inc12 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc12, 100
+ br i1 %cmp, label %for.cond1.preheader, label %for.end13
+
+for.end13: ; preds = %for.inc11
+ ret void
+}
+
+
+;; propagate Point
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[3*i - 18][22 - i][2*i + j] = ...
+;; ... = A[i][i][3*i + j];
+
+define void @prop5([100 x [100 x i32]]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc13, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc13 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc14, %for.inc13 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %i.03, 1
+ %add = add nsw i64 %mul, %j.02
+ %sub = sub nsw i64 22, %i.03
+ %mul4 = mul nsw i64 %i.03, 3
+ %sub5 = add nsw i64 %mul4, -18
+ %arrayidx7 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 %sub5, i64 %sub, i64 %add
+ store i32 %conv, i32* %arrayidx7, align 4
+ %mul8 = mul nsw i64 %i.03, 3
+ %add9 = add nsw i64 %mul8, %j.02
+ %arrayidx12 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 %i.03, i64 %i.03, i64 %add9
+ %0 = load i32* %arrayidx12, align 4
+; CHECK: da analyze - flow [< -16] splitable!
+; CHECK: da analyze - split level = 1, iteration = 11!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 100
+ br i1 %cmp2, label %for.body3, label %for.inc13
+
+for.inc13: ; preds = %for.body3
+ %inc14 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc14, 100
+ br i1 %cmp, label %for.cond1.preheader, label %for.end15
+
+for.end15: ; preds = %for.inc13
+ ret void
+}
+
+
+;; propagate Line
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[i + 1][4*i + j + 2] = ...
+;; ... = A[2*i][8*i + j];
+
+define void @prop6([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc12, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc12 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc13, %for.inc12 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %i.03, 2
+ %add = add nsw i64 %mul, %j.02
+ %add4 = add nsw i64 %add, 2
+ %add5 = add nsw i64 %i.03, 1
+ %arrayidx6 = getelementptr inbounds [100 x i32]* %A, i64 %add5, i64 %add4
+ store i32 %conv, i32* %arrayidx6, align 4
+ %mul7 = shl nsw i64 %i.03, 3
+ %add8 = add nsw i64 %mul7, %j.02
+ %mul9 = shl nsw i64 %i.03, 1
+ %arrayidx11 = getelementptr inbounds [100 x i32]* %A, i64 %mul9, i64 %add8
+ %0 = load i32* %arrayidx11, align 4
+; CHECK: da analyze - flow [=> -2]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 100
+ br i1 %cmp2, label %for.body3, label %for.inc12
+
+for.inc12: ; preds = %for.body3
+ %inc13 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc13, 100
+ br i1 %cmp, label %for.cond1.preheader, label %for.end14
+
+for.end14: ; preds = %for.inc12
+ ret void
+}
+
+
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[2*i + 4][-5*i + j + 2] = ...
+;; ... = A[-2*i + 20][5*i + j];
+
+define void @prop7([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc14, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc14 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc15, %for.inc14 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, -5
+ %add = add nsw i64 %mul, %j.02
+ %add4 = add nsw i64 %add, 2
+ %mul5 = shl nsw i64 %i.03, 1
+ %add6 = add nsw i64 %mul5, 4
+ %arrayidx7 = getelementptr inbounds [100 x i32]* %A, i64 %add6, i64 %add4
+ store i32 %conv, i32* %arrayidx7, align 4
+ %mul8 = mul nsw i64 %i.03, 5
+ %add9 = add nsw i64 %mul8, %j.02
+ %mul10 = mul nsw i64 %i.03, -2
+ %add11 = add nsw i64 %mul10, 20
+ %arrayidx13 = getelementptr inbounds [100 x i32]* %A, i64 %add11, i64 %add9
+ %0 = load i32* %arrayidx13, align 4
+; CHECK: da analyze - flow [* -38] splitable!
+; CHECK: da analyze - split level = 1, iteration = 4!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 100
+ br i1 %cmp2, label %for.body3, label %for.inc14
+
+for.inc14: ; preds = %for.body3
+ %inc15 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc15, 100
+ br i1 %cmp, label %for.cond1.preheader, label %for.end16
+
+for.end16: ; preds = %for.inc14
+ ret void
+}
+
+
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[4][j + 2] = ...
+;; ... = A[-2*i + 4][5*i + j];
+
+define void @prop8([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc10, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc10 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc11, %for.inc10 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %add = add nsw i64 %j.02, 2
+ %arrayidx4 = getelementptr inbounds [100 x i32]* %A, i64 4, i64 %add
+ store i32 %conv, i32* %arrayidx4, align 4
+ %mul = mul nsw i64 %i.03, 5
+ %add5 = add nsw i64 %mul, %j.02
+ %mul6 = mul nsw i64 %i.03, -2
+ %add7 = add nsw i64 %mul6, 4
+ %arrayidx9 = getelementptr inbounds [100 x i32]* %A, i64 %add7, i64 %add5
+ %0 = load i32* %arrayidx9, align 4
+; CHECK: da analyze - flow [p<= 2]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 100
+ br i1 %cmp2, label %for.body3, label %for.inc10
+
+for.inc10: ; preds = %for.body3
+ %inc11 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc11, 100
+ br i1 %cmp, label %for.cond1.preheader, label %for.end12
+
+for.end12: ; preds = %for.inc10
+ ret void
+}
+
+
+;; for (long int i = 0; i < 100; i++)
+;; for (long int j = 0; j < 100; j++)
+;; A[2*i + 4][5*i + j + 2] = ...
+;; ... = A[4][j];
+
+define void @prop9([100 x i32]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc10, %entry
+ %B.addr.04 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc10 ]
+ %i.03 = phi i64 [ 0, %entry ], [ %inc11, %for.inc10 ]
+ br label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.02 = phi i64 [ 0, %for.cond1.preheader ], [ %inc, %for.body3 ]
+ %B.addr.11 = phi i32* [ %B.addr.04, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, 5
+ %add = add nsw i64 %mul, %j.02
+ %add4 = add nsw i64 %add, 2
+ %mul5 = shl nsw i64 %i.03, 1
+ %add6 = add nsw i64 %mul5, 4
+ %arrayidx7 = getelementptr inbounds [100 x i32]* %A, i64 %add6, i64 %add4
+ store i32 %conv, i32* %arrayidx7, align 4
+ %arrayidx9 = getelementptr inbounds [100 x i32]* %A, i64 4, i64 %j.02
+ %0 = load i32* %arrayidx9, align 4
+; CHECK: da analyze - flow [p<= 2]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.11, i64 1
+ store i32 %0, i32* %B.addr.11, align 4
+ %inc = add nsw i64 %j.02, 1
+ %cmp2 = icmp slt i64 %inc, 100
+ br i1 %cmp2, label %for.body3, label %for.inc10
+
+for.inc10: ; preds = %for.body3
+ %inc11 = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc11, 100
+ br i1 %cmp, label %for.cond1.preheader, label %for.end12
+
+for.end12: ; preds = %for.inc10
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/Separability.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/Separability.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/Separability.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/Separability.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,267 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'Separability.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long int i = 0; i < 50; i++)
+;; for (long int j = 0; j < 50; j++)
+;; for (long int k = 0; k < 50; k++)
+;; for (long int l = 0; l < 50; l++)
+;; A[n][i][j + k] = ...
+;; ... = A[10][i + 10][2*j - l];
+
+define void @sep0([100 x [100 x i32]]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc22, %entry
+ %B.addr.08 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc22 ]
+ %i.07 = phi i64 [ 0, %entry ], [ %inc23, %for.inc22 ]
+ br label %for.cond4.preheader
+
+for.cond4.preheader: ; preds = %for.inc19, %for.cond1.preheader
+ %B.addr.16 = phi i32* [ %B.addr.08, %for.cond1.preheader ], [ %incdec.ptr, %for.inc19 ]
+ %j.05 = phi i64 [ 0, %for.cond1.preheader ], [ %inc20, %for.inc19 ]
+ br label %for.cond7.preheader
+
+for.cond7.preheader: ; preds = %for.inc16, %for.cond4.preheader
+ %B.addr.24 = phi i32* [ %B.addr.16, %for.cond4.preheader ], [ %incdec.ptr, %for.inc16 ]
+ %k.03 = phi i64 [ 0, %for.cond4.preheader ], [ %inc17, %for.inc16 ]
+ br label %for.body9
+
+for.body9: ; preds = %for.body9, %for.cond7.preheader
+ %l.02 = phi i64 [ 0, %for.cond7.preheader ], [ %inc, %for.body9 ]
+ %B.addr.31 = phi i32* [ %B.addr.24, %for.cond7.preheader ], [ %incdec.ptr, %for.body9 ]
+ %conv = trunc i64 %i.07 to i32
+ %add = add nsw i64 %j.05, %k.03
+ %idxprom = sext i32 %n to i64
+ %arrayidx11 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 %idxprom, i64 %i.07, i64 %add
+ store i32 %conv, i32* %arrayidx11, align 4
+ %mul = shl nsw i64 %j.05, 1
+ %sub = sub nsw i64 %mul, %l.02
+ %add12 = add nsw i64 %i.07, 10
+ %arrayidx15 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 10, i64 %add12, i64 %sub
+ %0 = load i32* %arrayidx15, align 4
+; CHECK: da analyze - flow [-10 * * *]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.31, i64 1
+ store i32 %0, i32* %B.addr.31, align 4
+ %inc = add nsw i64 %l.02, 1
+ %cmp8 = icmp slt i64 %inc, 50
+ br i1 %cmp8, label %for.body9, label %for.inc16
+
+for.inc16: ; preds = %for.body9
+ %inc17 = add nsw i64 %k.03, 1
+ %cmp5 = icmp slt i64 %inc17, 50
+ br i1 %cmp5, label %for.cond7.preheader, label %for.inc19
+
+for.inc19: ; preds = %for.inc16
+ %inc20 = add nsw i64 %j.05, 1
+ %cmp2 = icmp slt i64 %inc20, 50
+ br i1 %cmp2, label %for.cond4.preheader, label %for.inc22
+
+for.inc22: ; preds = %for.inc19
+ %inc23 = add nsw i64 %i.07, 1
+ %cmp = icmp slt i64 %inc23, 50
+ br i1 %cmp, label %for.cond1.preheader, label %for.end24
+
+for.end24: ; preds = %for.inc22
+ ret void
+}
+
+
+;; for (long int i = 0; i < 50; i++)
+;; for (long int j = 0; j < 50; j++)
+;; for (long int k = 0; k < 50; k++)
+;; for (long int l = 0; l < 50; l++)
+;; A[i][i][j + k] = ...
+;; ... = A[10][i + 10][2*j - l];
+
+define void @sep1([100 x [100 x i32]]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc22, %entry
+ %B.addr.08 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc22 ]
+ %i.07 = phi i64 [ 0, %entry ], [ %inc23, %for.inc22 ]
+ br label %for.cond4.preheader
+
+for.cond4.preheader: ; preds = %for.inc19, %for.cond1.preheader
+ %B.addr.16 = phi i32* [ %B.addr.08, %for.cond1.preheader ], [ %incdec.ptr, %for.inc19 ]
+ %j.05 = phi i64 [ 0, %for.cond1.preheader ], [ %inc20, %for.inc19 ]
+ br label %for.cond7.preheader
+
+for.cond7.preheader: ; preds = %for.inc16, %for.cond4.preheader
+ %B.addr.24 = phi i32* [ %B.addr.16, %for.cond4.preheader ], [ %incdec.ptr, %for.inc16 ]
+ %k.03 = phi i64 [ 0, %for.cond4.preheader ], [ %inc17, %for.inc16 ]
+ br label %for.body9
+
+for.body9: ; preds = %for.body9, %for.cond7.preheader
+ %l.02 = phi i64 [ 0, %for.cond7.preheader ], [ %inc, %for.body9 ]
+ %B.addr.31 = phi i32* [ %B.addr.24, %for.cond7.preheader ], [ %incdec.ptr, %for.body9 ]
+ %conv = trunc i64 %i.07 to i32
+ %add = add nsw i64 %j.05, %k.03
+ %arrayidx11 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 %i.07, i64 %i.07, i64 %add
+ store i32 %conv, i32* %arrayidx11, align 4
+ %mul = shl nsw i64 %j.05, 1
+ %sub = sub nsw i64 %mul, %l.02
+ %add12 = add nsw i64 %i.07, 10
+ %arrayidx15 = getelementptr inbounds [100 x [100 x i32]]* %A, i64 10, i64 %add12, i64 %sub
+ %0 = load i32* %arrayidx15, align 4
+; CHECK: da analyze - flow [> * * *]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.31, i64 1
+ store i32 %0, i32* %B.addr.31, align 4
+ %inc = add nsw i64 %l.02, 1
+ %cmp8 = icmp slt i64 %inc, 50
+ br i1 %cmp8, label %for.body9, label %for.inc16
+
+for.inc16: ; preds = %for.body9
+ %inc17 = add nsw i64 %k.03, 1
+ %cmp5 = icmp slt i64 %inc17, 50
+ br i1 %cmp5, label %for.cond7.preheader, label %for.inc19
+
+for.inc19: ; preds = %for.inc16
+ %inc20 = add nsw i64 %j.05, 1
+ %cmp2 = icmp slt i64 %inc20, 50
+ br i1 %cmp2, label %for.cond4.preheader, label %for.inc22
+
+for.inc22: ; preds = %for.inc19
+ %inc23 = add nsw i64 %i.07, 1
+ %cmp = icmp slt i64 %inc23, 50
+ br i1 %cmp, label %for.cond1.preheader, label %for.end24
+
+for.end24: ; preds = %for.inc22
+ ret void
+}
+
+
+;; for (long int i = 0; i < 50; i++)
+;; for (long int j = 0; j < 50; j++)
+;; for (long int k = 0; k < 50; k++)
+;; for (long int l = 0; l < 50; l++)
+;; A[i][i][i + k][l] = ...
+;; ... = A[10][i + 10][j + k][l + 10];
+
+define void @sep2([100 x [100 x [100 x i32]]]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc26, %entry
+ %B.addr.08 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc26 ]
+ %i.07 = phi i64 [ 0, %entry ], [ %inc27, %for.inc26 ]
+ br label %for.cond4.preheader
+
+for.cond4.preheader: ; preds = %for.inc23, %for.cond1.preheader
+ %B.addr.16 = phi i32* [ %B.addr.08, %for.cond1.preheader ], [ %incdec.ptr, %for.inc23 ]
+ %j.05 = phi i64 [ 0, %for.cond1.preheader ], [ %inc24, %for.inc23 ]
+ br label %for.cond7.preheader
+
+for.cond7.preheader: ; preds = %for.inc20, %for.cond4.preheader
+ %B.addr.24 = phi i32* [ %B.addr.16, %for.cond4.preheader ], [ %incdec.ptr, %for.inc20 ]
+ %k.03 = phi i64 [ 0, %for.cond4.preheader ], [ %inc21, %for.inc20 ]
+ br label %for.body9
+
+for.body9: ; preds = %for.body9, %for.cond7.preheader
+ %l.02 = phi i64 [ 0, %for.cond7.preheader ], [ %inc, %for.body9 ]
+ %B.addr.31 = phi i32* [ %B.addr.24, %for.cond7.preheader ], [ %incdec.ptr, %for.body9 ]
+ %conv = trunc i64 %i.07 to i32
+ %add = add nsw i64 %i.07, %k.03
+ %arrayidx12 = getelementptr inbounds [100 x [100 x [100 x i32]]]* %A, i64 %i.07, i64 %i.07, i64 %add, i64 %l.02
+ store i32 %conv, i32* %arrayidx12, align 4
+ %add13 = add nsw i64 %l.02, 10
+ %add14 = add nsw i64 %j.05, %k.03
+ %add15 = add nsw i64 %i.07, 10
+ %arrayidx19 = getelementptr inbounds [100 x [100 x [100 x i32]]]* %A, i64 10, i64 %add15, i64 %add14, i64 %add13
+ %0 = load i32* %arrayidx19, align 4
+; CHECK: da analyze - flow [> * * -10]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.31, i64 1
+ store i32 %0, i32* %B.addr.31, align 4
+ %inc = add nsw i64 %l.02, 1
+ %cmp8 = icmp slt i64 %inc, 50
+ br i1 %cmp8, label %for.body9, label %for.inc20
+
+for.inc20: ; preds = %for.body9
+ %inc21 = add nsw i64 %k.03, 1
+ %cmp5 = icmp slt i64 %inc21, 50
+ br i1 %cmp5, label %for.cond7.preheader, label %for.inc23
+
+for.inc23: ; preds = %for.inc20
+ %inc24 = add nsw i64 %j.05, 1
+ %cmp2 = icmp slt i64 %inc24, 50
+ br i1 %cmp2, label %for.cond4.preheader, label %for.inc26
+
+for.inc26: ; preds = %for.inc23
+ %inc27 = add nsw i64 %i.07, 1
+ %cmp = icmp slt i64 %inc27, 50
+ br i1 %cmp, label %for.cond1.preheader, label %for.end28
+
+for.end28: ; preds = %for.inc26
+ ret void
+}
+
+
+;; for (long int i = 0; i < 50; i++)
+;; for (long int j = 0; j < 50; j++)
+;; for (long int k = 0; k < 50; k++)
+;; for (long int l = 0; l < 50; l++)
+;; A[i][i][i + k][l + k] = ...
+;; ... = A[10][i + 10][j + k][l + 10];
+
+define void @sep3([100 x [100 x [100 x i32]]]* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ br label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc27, %entry
+ %B.addr.08 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.inc27 ]
+ %i.07 = phi i64 [ 0, %entry ], [ %inc28, %for.inc27 ]
+ br label %for.cond4.preheader
+
+for.cond4.preheader: ; preds = %for.inc24, %for.cond1.preheader
+ %B.addr.16 = phi i32* [ %B.addr.08, %for.cond1.preheader ], [ %incdec.ptr, %for.inc24 ]
+ %j.05 = phi i64 [ 0, %for.cond1.preheader ], [ %inc25, %for.inc24 ]
+ br label %for.cond7.preheader
+
+for.cond7.preheader: ; preds = %for.inc21, %for.cond4.preheader
+ %B.addr.24 = phi i32* [ %B.addr.16, %for.cond4.preheader ], [ %incdec.ptr, %for.inc21 ]
+ %k.03 = phi i64 [ 0, %for.cond4.preheader ], [ %inc22, %for.inc21 ]
+ br label %for.body9
+
+for.body9: ; preds = %for.body9, %for.cond7.preheader
+ %l.02 = phi i64 [ 0, %for.cond7.preheader ], [ %inc, %for.body9 ]
+ %B.addr.31 = phi i32* [ %B.addr.24, %for.cond7.preheader ], [ %incdec.ptr, %for.body9 ]
+ %conv = trunc i64 %i.07 to i32
+ %add = add nsw i64 %l.02, %k.03
+ %add10 = add nsw i64 %i.07, %k.03
+ %arrayidx13 = getelementptr inbounds [100 x [100 x [100 x i32]]]* %A, i64 %i.07, i64 %i.07, i64 %add10, i64 %add
+ store i32 %conv, i32* %arrayidx13, align 4
+ %add14 = add nsw i64 %l.02, 10
+ %add15 = add nsw i64 %j.05, %k.03
+ %add16 = add nsw i64 %i.07, 10
+ %arrayidx20 = getelementptr inbounds [100 x [100 x [100 x i32]]]* %A, i64 10, i64 %add16, i64 %add15, i64 %add14
+ %0 = load i32* %arrayidx20, align 4
+; CHECK: da analyze - flow [> * * *]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.31, i64 1
+ store i32 %0, i32* %B.addr.31, align 4
+ %inc = add nsw i64 %l.02, 1
+ %cmp8 = icmp slt i64 %inc, 50
+ br i1 %cmp8, label %for.body9, label %for.inc21
+
+for.inc21: ; preds = %for.body9
+ %inc22 = add nsw i64 %k.03, 1
+ %cmp5 = icmp slt i64 %inc22, 50
+ br i1 %cmp5, label %for.cond7.preheader, label %for.inc24
+
+for.inc24: ; preds = %for.inc21
+ %inc25 = add nsw i64 %j.05, 1
+ %cmp2 = icmp slt i64 %inc25, 50
+ br i1 %cmp2, label %for.cond4.preheader, label %for.inc27
+
+for.inc27: ; preds = %for.inc24
+ %inc28 = add nsw i64 %i.07, 1
+ %cmp = icmp slt i64 %inc28, 50
+ br i1 %cmp, label %for.cond1.preheader, label %for.end29
+
+for.end29: ; preds = %for.inc27
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/StrongSIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/StrongSIV.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/StrongSIV.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/StrongSIV.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,342 @@
+; RUN: opt < %s -analyze -basicaa -indvars -da | FileCheck %s
+
+; ModuleID = 'StrongSIV.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (int i = 0; i < n; i++)
+;; A[i + 2] = ...
+;; ... = A[i];
+
+define void @strong0(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp sgt i64 %n, 0
+ br i1 %cmp1, label %for.body, label %for.end
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %add = add nsw i32 %i.03, 2
+ %idxprom = sext i32 %add to i64
+ %arrayidx = getelementptr inbounds i32* %A, i64 %idxprom
+ store i32 %i.03, i32* %arrayidx, align 4
+ %idxprom2 = sext i32 %i.03 to i64
+ %arrayidx3 = getelementptr inbounds i32* %A, i64 %idxprom2
+ %0 = load i32* %arrayidx3, align 4
+; CHECK: da analyze - consistent flow [2]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add nsw i32 %i.03, 1
+ %conv = sext i32 %inc to i64
+ %cmp = icmp slt i64 %conv, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long int i = 0; i < n; i++)
+;; A[i + 2] = ...
+;; ... = A[i];
+
+define void @strong1(i32* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ %conv = sext i32 %n to i64
+ %cmp1 = icmp sgt i32 %n, 0
+ br i1 %cmp1, label %for.body, label %for.end
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv2 = trunc i64 %i.03 to i32
+ %add = add nsw i64 %i.03, 2
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv2, i32* %arrayidx, align 4
+ %arrayidx3 = getelementptr inbounds i32* %A, i64 %i.03
+ %0 = load i32* %arrayidx3, align 4
+; CHECK: da analyze - consistent flow [2]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp slt i64 %inc, %conv
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < n; i++)
+;; A[i + 2] = ...
+;; ... = A[i];
+
+define void @strong2(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %add = add i64 %i.03, 2
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %i.03
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - consistent flow [2]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (int i = 0; i < n; i++)
+;; A[i + 2] = ...
+;; ... = A[i];
+
+define void @strong3(i32* %A, i32* %B, i32 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp sgt i32 %n, 0
+ br i1 %cmp1, label %for.body, label %for.end
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %add = add nsw i32 %i.03, 2
+ %idxprom = sext i32 %add to i64
+ %arrayidx = getelementptr inbounds i32* %A, i64 %idxprom
+ store i32 %i.03, i32* %arrayidx, align 4
+ %idxprom1 = sext i32 %i.03 to i64
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %idxprom1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - consistent flow [2]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add nsw i32 %i.03, 1
+ %cmp = icmp slt i32 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 19; i++)
+;; A[i + 19] = ...
+;; ... = A[i];
+
+define void @strong4(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %add = add i64 %i.02, 19
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %i.02
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 19
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 20; i++)
+;; A[i + 19] = ...
+;; ... = A[i];
+
+define void @strong5(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %add = add i64 %i.02, 19
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %i.02
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - consistent flow [19]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 20
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 20; i++)
+;; A[2*i + 6] = ...
+;; ... = A[2*i];
+
+define void @strong6(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = shl i64 %i.02, 1
+ %add = add i64 %mul, 6
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul1 = shl i64 %i.02, 1
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %mul1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - consistent flow [3]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 20
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 20; i++)
+;; A[2*i + 7] = ...
+;; ... = A[2*i];
+
+define void @strong7(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = shl i64 %i.02, 1
+ %add = add i64 %mul, 7
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul1 = shl i64 %i.02, 1
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %mul1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 20
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 20; i++)
+;; A[i + n] = ...
+;; ... = A[i];
+
+define void @strong8(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %add = add i64 %i.02, %n
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %i.02
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - consistent flow [%n|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 20
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < n; i++)
+;; A[i + n] = ...
+;; ... = A[i + 2*n];
+
+define void @strong9(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %add = add i64 %i.03, %n
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul = shl i64 %n, 1
+ %add1 = add i64 %i.03, %mul
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %add1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 1000; i++)
+;; A[n*i + 5] = ...
+;; ... = A[n*i + 5];
+
+define void @strong10(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = mul i64 %i.02, %n
+ %add = add i64 %mul, 5
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul1 = mul i64 %i.02, %n
+ %add2 = add i64 %mul1, 5
+ %arrayidx3 = getelementptr inbounds i32* %A, i64 %add2
+ %0 = load i32* %arrayidx3, align 4
+; CHECK: da analyze - consistent flow [0|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 1000
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/SymbolicRDIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/SymbolicRDIV.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/SymbolicRDIV.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/SymbolicRDIV.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,312 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'SymbolicRDIV.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long int i = 0; i < n1; i++)
+;; A[2*i + n1] = ...
+;; for (long int j = 0; j < n2; j++)
+;; ... = A[3*j + 3*n1];
+
+define void @symbolicrdiv0(i32* %A, i32* %B, i64 %n1, i64 %n2) nounwind uwtable ssp {
+entry:
+ %cmp4 = icmp eq i64 %n1, 0
+ br i1 %cmp4, label %for.cond1.preheader, label %for.body
+
+for.cond1.preheader: ; preds = %for.body, %entry
+ %cmp21 = icmp eq i64 %n2, 0
+ br i1 %cmp21, label %for.end11, label %for.body4
+
+for.body: ; preds = %for.body, %entry
+ %i.05 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %conv = trunc i64 %i.05 to i32
+ %mul = shl nsw i64 %i.05, 1
+ %add = add i64 %mul, %n1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.05, 1
+ %cmp = icmp ult i64 %inc, %n1
+ br i1 %cmp, label %for.body, label %for.cond1.preheader
+
+for.body4: ; preds = %for.body4, %for.cond1.preheader
+ %j.03 = phi i64 [ %inc10, %for.body4 ], [ 0, %for.cond1.preheader ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.cond1.preheader ]
+ %mul56 = add i64 %j.03, %n1
+ %add7 = mul i64 %mul56, 3
+ %arrayidx8 = getelementptr inbounds i32* %A, i64 %add7
+ %0 = load i32* %arrayidx8, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc10 = add nsw i64 %j.03, 1
+ %cmp2 = icmp ult i64 %inc10, %n2
+ br i1 %cmp2, label %for.body4, label %for.end11
+
+for.end11: ; preds = %for.body4, %for.cond1.preheader
+ ret void
+}
+
+
+;; for (long int i = 0; i < n1; i++)
+;; A[2*i + 5*n2] = ...
+;; for (long int j = 0; j < n2; j++)
+;; ... = A[3*j + 2*n2];
+
+define void @symbolicrdiv1(i32* %A, i32* %B, i64 %n1, i64 %n2) nounwind uwtable ssp {
+entry:
+ %cmp4 = icmp eq i64 %n1, 0
+ br i1 %cmp4, label %for.cond2.preheader, label %for.body
+
+for.cond2.preheader: ; preds = %for.body, %entry
+ %cmp31 = icmp eq i64 %n2, 0
+ br i1 %cmp31, label %for.end12, label %for.body5
+
+for.body: ; preds = %for.body, %entry
+ %i.05 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %conv = trunc i64 %i.05 to i32
+ %mul = shl nsw i64 %i.05, 1
+ %mul1 = mul i64 %n2, 5
+ %add = add i64 %mul, %mul1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.05, 1
+ %cmp = icmp ult i64 %inc, %n1
+ br i1 %cmp, label %for.body, label %for.cond2.preheader
+
+for.body5: ; preds = %for.body5, %for.cond2.preheader
+ %j.03 = phi i64 [ %inc11, %for.body5 ], [ 0, %for.cond2.preheader ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body5 ], [ %B, %for.cond2.preheader ]
+ %mul6 = mul nsw i64 %j.03, 3
+ %mul7 = shl i64 %n2, 1
+ %add8 = add i64 %mul6, %mul7
+ %arrayidx9 = getelementptr inbounds i32* %A, i64 %add8
+ %0 = load i32* %arrayidx9, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc11 = add nsw i64 %j.03, 1
+ %cmp3 = icmp ult i64 %inc11, %n2
+ br i1 %cmp3, label %for.body5, label %for.end12
+
+for.end12: ; preds = %for.body5, %for.cond2.preheader
+ ret void
+}
+
+
+;; for (long int i = 0; i < n1; i++)
+;; A[2*i - n2] = ...
+;; for (long int j = 0; j < n2; j++)
+;; ... = A[-j + 2*n1];
+
+define void @symbolicrdiv2(i32* %A, i32* %B, i64 %n1, i64 %n2) nounwind uwtable ssp {
+entry:
+ %cmp4 = icmp eq i64 %n1, 0
+ br i1 %cmp4, label %for.cond1.preheader, label %for.body
+
+for.cond1.preheader: ; preds = %for.body, %entry
+ %cmp21 = icmp eq i64 %n2, 0
+ br i1 %cmp21, label %for.end10, label %for.body4
+
+for.body: ; preds = %for.body, %entry
+ %i.05 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %conv = trunc i64 %i.05 to i32
+ %mul = shl nsw i64 %i.05, 1
+ %sub = sub i64 %mul, %n2
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.05, 1
+ %cmp = icmp ult i64 %inc, %n1
+ br i1 %cmp, label %for.body, label %for.cond1.preheader
+
+for.body4: ; preds = %for.body4, %for.cond1.preheader
+ %j.03 = phi i64 [ %inc9, %for.body4 ], [ 0, %for.cond1.preheader ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.cond1.preheader ]
+ %mul6 = shl i64 %n1, 1
+ %add = sub i64 %mul6, %j.03
+ %arrayidx7 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx7, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc9 = add nsw i64 %j.03, 1
+ %cmp2 = icmp ult i64 %inc9, %n2
+ br i1 %cmp2, label %for.body4, label %for.end10
+
+for.end10: ; preds = %for.body4, %for.cond1.preheader
+ ret void
+}
+
+
+;; for (long int i = 0; i < n1; i++)
+;; A[-i + n2] = ...
+;; for (long int j = 0; j < n2; j++)
+;; ... = A[j - n1];
+
+define void @symbolicrdiv3(i32* %A, i32* %B, i64 %n1, i64 %n2) nounwind uwtable ssp {
+entry:
+ %cmp4 = icmp eq i64 %n1, 0
+ br i1 %cmp4, label %for.cond1.preheader, label %for.body
+
+for.cond1.preheader: ; preds = %for.body, %entry
+ %cmp21 = icmp eq i64 %n2, 0
+ br i1 %cmp21, label %for.end9, label %for.body4
+
+for.body: ; preds = %for.body, %entry
+ %i.05 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %conv = trunc i64 %i.05 to i32
+ %add = sub i64 %n2, %i.05
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.05, 1
+ %cmp = icmp ult i64 %inc, %n1
+ br i1 %cmp, label %for.body, label %for.cond1.preheader
+
+for.body4: ; preds = %for.body4, %for.cond1.preheader
+ %j.03 = phi i64 [ %inc8, %for.body4 ], [ 0, %for.cond1.preheader ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.cond1.preheader ]
+ %sub5 = sub i64 %j.03, %n1
+ %arrayidx6 = getelementptr inbounds i32* %A, i64 %sub5
+ %0 = load i32* %arrayidx6, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc8 = add nsw i64 %j.03, 1
+ %cmp2 = icmp ult i64 %inc8, %n2
+ br i1 %cmp2, label %for.body4, label %for.end9
+
+for.end9: ; preds = %for.body4, %for.cond1.preheader
+ ret void
+}
+
+
+;; for (long int i = 0; i < n1; i++)
+;; A[-i + 2*n1] = ...
+;; for (long int j = 0; j < n2; j++)
+;; ... = A[-j + n1];
+
+define void @symbolicrdiv4(i32* %A, i32* %B, i64 %n1, i64 %n2) nounwind uwtable ssp {
+entry:
+ %cmp4 = icmp eq i64 %n1, 0
+ br i1 %cmp4, label %for.cond1.preheader, label %for.body
+
+for.cond1.preheader: ; preds = %for.body, %entry
+ %cmp21 = icmp eq i64 %n2, 0
+ br i1 %cmp21, label %for.end10, label %for.body4
+
+for.body: ; preds = %for.body, %entry
+ %i.05 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %conv = trunc i64 %i.05 to i32
+ %mul = shl i64 %n1, 1
+ %add = sub i64 %mul, %i.05
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.05, 1
+ %cmp = icmp ult i64 %inc, %n1
+ br i1 %cmp, label %for.body, label %for.cond1.preheader
+
+for.body4: ; preds = %for.body4, %for.cond1.preheader
+ %j.03 = phi i64 [ %inc9, %for.body4 ], [ 0, %for.cond1.preheader ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.cond1.preheader ]
+ %add6 = sub i64 %n1, %j.03
+ %arrayidx7 = getelementptr inbounds i32* %A, i64 %add6
+ %0 = load i32* %arrayidx7, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc9 = add nsw i64 %j.03, 1
+ %cmp2 = icmp ult i64 %inc9, %n2
+ br i1 %cmp2, label %for.body4, label %for.end10
+
+for.end10: ; preds = %for.body4, %for.cond1.preheader
+ ret void
+}
+
+
+;; for (long int i = 0; i < n1; i++)
+;; A[-i + n2] = ...
+;; for (long int j = 0; j < n2; j++)
+;; ... = A[-j + 2*n2];
+
+define void @symbolicrdiv5(i32* %A, i32* %B, i64 %n1, i64 %n2) nounwind uwtable ssp {
+entry:
+ %cmp4 = icmp eq i64 %n1, 0
+ br i1 %cmp4, label %for.cond1.preheader, label %for.body
+
+for.cond1.preheader: ; preds = %for.body, %entry
+ %cmp21 = icmp eq i64 %n2, 0
+ br i1 %cmp21, label %for.end10, label %for.body4
+
+for.body: ; preds = %for.body, %entry
+ %i.05 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %conv = trunc i64 %i.05 to i32
+ %add = sub i64 %n2, %i.05
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %inc = add nsw i64 %i.05, 1
+ %cmp = icmp ult i64 %inc, %n1
+ br i1 %cmp, label %for.body, label %for.cond1.preheader
+
+for.body4: ; preds = %for.body4, %for.cond1.preheader
+ %j.03 = phi i64 [ %inc9, %for.body4 ], [ 0, %for.cond1.preheader ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body4 ], [ %B, %for.cond1.preheader ]
+ %mul = shl i64 %n2, 1
+ %add6 = sub i64 %mul, %j.03
+ %arrayidx7 = getelementptr inbounds i32* %A, i64 %add6
+ %0 = load i32* %arrayidx7, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc9 = add nsw i64 %j.03, 1
+ %cmp2 = icmp ult i64 %inc9, %n2
+ br i1 %cmp2, label %for.body4, label %for.end10
+
+for.end10: ; preds = %for.body4, %for.cond1.preheader
+ ret void
+}
+
+
+;; for (long int i = 0; i < n1; i++)
+;; for (long int j = 0; j < n2; j++)
+;; A[j -i + n2] = ...
+;; ... = A[2*n2];
+
+define void @symbolicrdiv6(i32* %A, i32* %B, i64 %n1, i64 %n2) nounwind uwtable ssp {
+entry:
+ %cmp4 = icmp eq i64 %n1, 0
+ br i1 %cmp4, label %for.end7, label %for.cond1.preheader
+
+for.cond1.preheader: ; preds = %for.inc5, %entry
+ %B.addr.06 = phi i32* [ %B.addr.1.lcssa, %for.inc5 ], [ %B, %entry ]
+ %i.05 = phi i64 [ %inc6, %for.inc5 ], [ 0, %entry ]
+ %cmp21 = icmp eq i64 %n2, 0
+ br i1 %cmp21, label %for.inc5, label %for.body3
+
+for.body3: ; preds = %for.body3, %for.cond1.preheader
+ %j.03 = phi i64 [ %inc, %for.body3 ], [ 0, %for.cond1.preheader ]
+ %B.addr.12 = phi i32* [ %incdec.ptr, %for.body3 ], [ %B.addr.06, %for.cond1.preheader ]
+ %conv = trunc i64 %i.05 to i32
+ %sub = sub nsw i64 %j.03, %i.05
+ %add = add i64 %sub, %n2
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul = shl i64 %n2, 1
+ %arrayidx4 = getelementptr inbounds i32* %A, i64 %mul
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.12, i64 1
+ store i32 %0, i32* %B.addr.12, align 4
+ %inc = add nsw i64 %j.03, 1
+ %cmp2 = icmp ult i64 %inc, %n2
+ br i1 %cmp2, label %for.body3, label %for.inc5
+
+for.inc5: ; preds = %for.body3, %for.cond1.preheader
+ %B.addr.1.lcssa = phi i32* [ %B.addr.06, %for.cond1.preheader ], [ %incdec.ptr, %for.body3 ]
+ %inc6 = add nsw i64 %i.05, 1
+ %cmp = icmp ult i64 %inc6, %n1
+ br i1 %cmp, label %for.cond1.preheader, label %for.end7
+
+for.end7: ; preds = %for.inc5, %entry
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/SymbolicSIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/SymbolicSIV.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/SymbolicSIV.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/SymbolicSIV.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,330 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'SymbolicSIV.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long int i = 0; i < n; i++)
+;; A[2*i + n] = ...
+;; ... = A[3*i + 3*n];
+
+define void @symbolicsiv0(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %i.03, 1
+ %add = add i64 %mul, %n
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul14 = add i64 %i.03, %n
+ %add3 = mul i64 %mul14, 3
+ %arrayidx4 = getelementptr inbounds i32* %A, i64 %add3
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long int i = 0; i < n; i++)
+;; A[2*i + 5*n] = ...
+;; ... = A[3*i + 2*n];
+
+define void @symbolicsiv1(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %i.03, 1
+ %mul1 = mul i64 %n, 5
+ %add = add i64 %mul, %mul1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul2 = mul nsw i64 %i.03, 3
+ %mul3 = shl i64 %n, 1
+ %add4 = add i64 %mul2, %mul3
+ %arrayidx5 = getelementptr inbounds i32* %A, i64 %add4
+ %0 = load i32* %arrayidx5, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long int i = 0; i < n; i++)
+;; A[2*i - n] = ...
+;; ... = A[-i + 2*n];
+
+define void @symbolicsiv2(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl nsw i64 %i.03, 1
+ %sub = sub i64 %mul, %n
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul2 = shl i64 %n, 1
+ %add = sub i64 %mul2, %i.03
+ %arrayidx3 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx3, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long int i = 0; i < n; i++)
+;; A[-2*i + n + 1] = ...
+;; ... = A[i - 2*n];
+
+define void @symbolicsiv3(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, -2
+ %add = add i64 %mul, %n
+ %add1 = add i64 %add, 1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add1
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul2 = shl i64 %n, 1
+ %sub = sub i64 %i.03, %mul2
+ %arrayidx3 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx3, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long int i = 0; i < n; i++)
+;; A[-2*i + 3*n] = ...
+;; ... = A[-i + n];
+
+define void @symbolicsiv4(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, -2
+ %mul1 = mul i64 %n, 3
+ %add = add i64 %mul, %mul1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %add2 = sub i64 %n, %i.03
+ %arrayidx3 = getelementptr inbounds i32* %A, i64 %add2
+ %0 = load i32* %arrayidx3, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long int i = 0; i < n; i++)
+;; A[-2*i - 2*n] = ...
+;; ... = A[-i - n];
+
+define void @symbolicsiv5(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul nsw i64 %i.03, -2
+ %mul1 = shl i64 %n, 1
+ %sub = sub i64 %mul, %mul1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %sub
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub2 = sub nsw i64 0, %i.03
+ %sub3 = sub i64 %sub2, %n
+ %arrayidx4 = getelementptr inbounds i32* %A, i64 %sub3
+ %0 = load i32* %arrayidx4, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add nsw i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; why doesn't SCEV package understand that n >= 0?
+;;void weaktest(int *A, int *B, long unsigned n)
+;; for (long unsigned i = 0; i < n; i++)
+;; A[i + n + 1] = ...
+;; ... = A[-i];
+
+define void @weaktest(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %add = add i64 %i.03, %n
+ %add1 = add i64 %add, 1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add1
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub = sub i64 0, %i.03
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - flow [*|<] splitable!
+; CHECK: da analyze - split level = 1, iteration = ((0 smax (-1 + (-1 * %n))) /u 2)!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; void symbolicsiv6(int *A, int *B, long unsigned n, long unsigned N, long unsigned M) {
+;; for (long int i = 0; i < n; i++) {
+;; A[4*N*i + M] = i;
+;; *B++ = A[4*N*i + 3*M + 1];
+
+define void @symbolicsiv6(i32* %A, i32* %B, i64 %n, i64 %N, i64 %M) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body.preheader
+
+for.body.preheader: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.preheader, %for.body
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %for.body.preheader ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %for.body.preheader ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl i64 %N, 2
+ %mul1 = mul i64 %mul, %i.03
+ %add = add i64 %mul1, %M
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul2 = shl i64 %N, 2
+ %mul3 = mul i64 %mul2, %i.03
+ %mul4 = mul i64 %M, 3
+ %add5 = add i64 %mul3, %mul4
+ %add6 = add i64 %add5, 1
+ %arrayidx7 = getelementptr inbounds i32* %A, i64 %add6
+ %0 = load i32* %arrayidx7, align 4
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+; CHECK: da analyze - none!
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add nsw i64 %i.03, 1
+ %exitcond = icmp ne i64 %inc, %n
+ br i1 %exitcond, label %for.body, label %for.end.loopexit
+
+for.end.loopexit: ; preds = %for.body
+ br label %for.end
+
+for.end: ; preds = %for.end.loopexit, %entry
+ ret void
+}
+
+
+;; void symbolicsiv7(int *A, int *B, long unsigned n, long unsigned N, long unsigned M) {
+;; for (long int i = 0; i < n; i++) {
+;; A[2*N*i + M] = i;
+;; *B++ = A[2*N*i - 3*M + 2];
+
+define void @symbolicsiv7(i32* %A, i32* %B, i64 %n, i64 %N, i64 %M) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body.preheader
+
+for.body.preheader: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.preheader, %for.body
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %for.body.preheader ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %for.body.preheader ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = shl i64 %N, 1
+ %mul1 = mul i64 %mul, %i.03
+ %add = add i64 %mul1, %M
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul2 = shl i64 %N, 1
+ %mul3 = mul i64 %mul2, %i.03
+ %0 = mul i64 %M, -3
+ %sub = add i64 %mul3, %0
+ %add5 = add i64 %sub, 2
+ %arrayidx6 = getelementptr inbounds i32* %A, i64 %add5
+ %1 = load i32* %arrayidx6, align 4
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+; CHECK: da analyze - flow [<>]!
+ store i32 %1, i32* %B.addr.02, align 4
+ %inc = add nsw i64 %i.03, 1
+ %exitcond = icmp ne i64 %inc, %n
+ br i1 %exitcond, label %for.body, label %for.end.loopexit
+
+for.end.loopexit: ; preds = %for.body
+ br label %for.end
+
+for.end: ; preds = %for.end.loopexit, %entry
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakCrossingSIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakCrossingSIV.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakCrossingSIV.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakCrossingSIV.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,220 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'WeakCrossingSIV.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long unsigned i = 0; i < n; i++)
+;; A[1 + n*i] = ...
+;; ... = A[1 - n*i];
+
+define void @weakcrossing0(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul i64 %i.03, %n
+ %add = add i64 %mul, 1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul1 = mul i64 %i.03, %n
+ %sub = sub i64 1, %mul1
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - flow [0|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < n; i++)
+;; A[n + i] = ...
+;; ... = A[1 + n - i];
+
+define void @weakcrossing1(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %add = add i64 %i.03, %n
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %add1 = add i64 %n, 1
+ %sub = sub i64 %add1, %i.03
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - flow [<>] splitable!
+; CHECK: da analyze - split level = 1, iteration = 0!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 3; i++)
+;; A[i] = ...
+;; ... = A[6 - i];
+
+define void @weakcrossing2(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %arrayidx = getelementptr inbounds i32* %A, i64 %i.02
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub = sub i64 6, %i.02
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 3
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 4; i++)
+;; A[i] = ...
+;; ... = A[6 - i];
+
+define void @weakcrossing3(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %arrayidx = getelementptr inbounds i32* %A, i64 %i.02
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub = sub i64 6, %i.02
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [0|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 4
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 10; i++)
+;; A[i] = ...
+;; ... = A[-6 - i];
+
+define void @weakcrossing4(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %arrayidx = getelementptr inbounds i32* %A, i64 %i.02
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub = sub i64 -6, %i.02
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 10
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < n; i++)
+;; A[3*i] = ...
+;; ... = A[5 - 3*i];
+
+define void @weakcrossing5(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul i64 %i.03, 3
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %0 = mul i64 %i.03, -3
+ %sub = add i64 %0, 5
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %sub
+ %1 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %1, i32* %B.addr.02, align 4
+ %inc = add i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 4; i++)
+;; A[i] = ...
+;; ... = A[5 - i];
+
+define void @weakcrossing6(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %arrayidx = getelementptr inbounds i32* %A, i64 %i.02
+ store i32 %conv, i32* %arrayidx, align 4
+ %sub = sub i64 5, %i.02
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %sub
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [<>] splitable!
+; CHECK: da analyze - split level = 1, iteration = 2!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 4
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakZeroDstSIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakZeroDstSIV.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakZeroDstSIV.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakZeroDstSIV.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,212 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'WeakZeroDstSIV.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long unsigned i = 0; i < 30; i++)
+;; A[2*i + 10] = ...
+;; ... = A[10];
+
+define void @weakzerodst0(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = shl i64 %i.02, 1
+ %add = add i64 %mul, 10
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 10
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [p<=|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 30
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < n; i++)
+;; A[n*i + 10] = ...
+;; ... = A[10];
+
+define void @weakzerodst1(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul i64 %i.03, %n
+ %add = add i64 %mul, 10
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 10
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [p<=|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 5; i++)
+;; A[2*i] = ...
+;; ... = A[10];
+
+define void @weakzerodst2(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = shl i64 %i.02, 1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 10
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 5
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 6; i++)
+;; A[2*i] = ...
+;; ... = A[10];
+
+define void @weakzerodst3(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = shl i64 %i.02, 1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 10
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [=>p|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 6
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 7; i++)
+;; A[2*i] = ...
+;; ... = A[10];
+
+define void @weakzerodst4(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = shl i64 %i.02, 1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 10
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [*|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 7
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 7; i++)
+;; A[2*i] = ...
+;; ... = A[-10];
+
+define void @weakzerodst5(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %mul = shl i64 %i.02, 1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 -10
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 7
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < n; i++)
+;; A[3*i] = ...
+;; ... = A[10];
+
+define void @weakzerodst6(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %mul = mul i64 %i.03, 3
+ %arrayidx = getelementptr inbounds i32* %A, i64 %mul
+ store i32 %conv, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 10
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakZeroSrcSIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakZeroSrcSIV.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakZeroSrcSIV.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/WeakZeroSrcSIV.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,212 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'WeakZeroSrcSIV.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; for (long unsigned i = 0; i < 30; i++)
+;; A[10] = ...
+;; ... = A[2*i + 10];
+
+define void @weakzerosrc0(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %arrayidx = getelementptr inbounds i32* %A, i64 10
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul = shl i64 %i.02, 1
+ %add = add i64 %mul, 10
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [p<=|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 30
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < n; i++)
+;; A[10] = ...
+;; ... = A[n*i + 10];
+
+define void @weakzerosrc1(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %arrayidx = getelementptr inbounds i32* %A, i64 10
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul = mul i64 %i.03, %n
+ %add = add i64 %mul, 10
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [p<=|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 5; i++)
+;; A[10] = ...
+;; ... = A[2*i];
+
+define void @weakzerosrc2(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %arrayidx = getelementptr inbounds i32* %A, i64 10
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul = shl i64 %i.02, 1
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %mul
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 5
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 6; i++)
+;; A[10] = ...
+;; ... = A[2*i];
+
+define void @weakzerosrc3(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %arrayidx = getelementptr inbounds i32* %A, i64 10
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul = shl i64 %i.02, 1
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %mul
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [=>p|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 6
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 7; i++)
+;; A[10] = ...
+;; ... = A[2*i];
+
+define void @weakzerosrc4(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %arrayidx = getelementptr inbounds i32* %A, i64 10
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul = shl i64 %i.02, 1
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %mul
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow [*|<]!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 7
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < 7; i++)
+;; A[-10] = ...
+;; ... = A[2*i];
+
+define void @weakzerosrc5(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
+ %B.addr.01 = phi i32* [ %B, %entry ], [ %incdec.ptr, %for.body ]
+ %conv = trunc i64 %i.02 to i32
+ %arrayidx = getelementptr inbounds i32* %A, i64 -10
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul = shl i64 %i.02, 1
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %mul
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.01, i64 1
+ store i32 %0, i32* %B.addr.01, align 4
+ %inc = add i64 %i.02, 1
+ %cmp = icmp ult i64 %inc, 7
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
+;; for (long unsigned i = 0; i < n; i++)
+;; A[10] = ...
+;; ... = A[3*i];
+
+define void @weakzerosrc6(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %cmp1 = icmp eq i64 %n, 0
+ br i1 %cmp1, label %for.end, label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %i.03 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
+ %B.addr.02 = phi i32* [ %incdec.ptr, %for.body ], [ %B, %entry ]
+ %conv = trunc i64 %i.03 to i32
+ %arrayidx = getelementptr inbounds i32* %A, i64 10
+ store i32 %conv, i32* %arrayidx, align 4
+ %mul = mul i64 %i.03, 3
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %mul
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ %incdec.ptr = getelementptr inbounds i32* %B.addr.02, i64 1
+ store i32 %0, i32* %B.addr.02, align 4
+ %inc = add i64 %i.03, 1
+ %cmp = icmp ult i64 %inc, %n
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/ZIV.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/ZIV.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/ZIV.ll (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/ZIV.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,53 @@
+; RUN: opt < %s -analyze -basicaa -da | FileCheck %s
+
+; ModuleID = 'ZIV.bc'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.6.0"
+
+
+;; A[n + 1] = ...
+;; ... = A[1 + n];
+
+define void @z0(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %add = add i64 %n, 1
+ %arrayidx = getelementptr inbounds i32* %A, i64 %add
+ store i32 0, i32* %arrayidx, align 4
+ %add1 = add i64 %n, 1
+ %arrayidx2 = getelementptr inbounds i32* %A, i64 %add1
+ %0 = load i32* %arrayidx2, align 4
+; CHECK: da analyze - consistent flow!
+ store i32 %0, i32* %B, align 4
+ ret void
+}
+
+
+;; A[n] = ...
+;; ... = A[n + 1];
+
+define void @z1(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
+entry:
+ %arrayidx = getelementptr inbounds i32* %A, i64 %n
+ store i32 0, i32* %arrayidx, align 4
+ %add = add i64 %n, 1
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %add
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - none!
+ store i32 %0, i32* %B, align 4
+ ret void
+}
+
+
+;; A[n] = ...
+;; ... = A[m];
+
+define void @z2(i32* %A, i32* %B, i64 %n, i64 %m) nounwind uwtable ssp {
+entry:
+ %arrayidx = getelementptr inbounds i32* %A, i64 %n
+ store i32 0, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32* %A, i64 %m
+ %0 = load i32* %arrayidx1, align 4
+; CHECK: da analyze - flow!
+ store i32 %0, i32* %B, align 4
+ ret void
+}
Added: llvm/branches/R600/test/Analysis/DependenceAnalysis/lit.local.cfg
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Analysis/DependenceAnalysis/lit.local.cfg?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Analysis/DependenceAnalysis/lit.local.cfg (added)
+++ llvm/branches/R600/test/Analysis/DependenceAnalysis/lit.local.cfg Tue Oct 16 12:52:57 2012
@@ -0,0 +1 @@
+config.suffixes = ['.ll']
Added: llvm/branches/R600/test/Assembler/invalid-fwdref1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Assembler/invalid-fwdref1.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Assembler/invalid-fwdref1.ll (added)
+++ llvm/branches/R600/test/Assembler/invalid-fwdref1.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,4 @@
+; RUN: not llvm-as %s -disable-output 2>&1 | grep "invalid forward reference to function as global value!"
+
+define i8* @test1() { ret i8* @test1a }
+define void @test1a() { }
Added: llvm/branches/R600/test/Bitcode/function-encoding-rel-operands.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Bitcode/function-encoding-rel-operands.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Bitcode/function-encoding-rel-operands.ll (added)
+++ llvm/branches/R600/test/Bitcode/function-encoding-rel-operands.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,49 @@
+; Basic sanity test to check that instruction operands are encoded with
+; relative IDs.
+; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s
+
+; CHECK: FUNCTION_BLOCK
+; CHECK: INST_BINOP {{.*}}op0=1 op1=1
+; CHECK: INST_BINOP {{.*}}op0=1 op1=1
+; CHECK: INST_BINOP {{.*}}op0=1 op1=1
+; CHECK: INST_RET {{.*}}op0=1
+define i32 @test_int_binops(i32 %a) nounwind {
+entry:
+ %0 = add i32 %a, %a
+ %1 = sub i32 %0, %0
+ %2 = mul i32 %1, %1
+ ret i32 %2
+}
+
+
+; CHECK: FUNCTION_BLOCK
+; CHECK: INST_CAST {{.*}}op0=1
+; CHECK: INST_BINOP {{.*}}op0=1 op1=1
+; CHECK: INST_BINOP {{.*}}op0=1 op1=1
+; CHECK: INST_BINOP {{.*}}op0=1 op1=1
+; CHECK: INST_BINOP {{.*}}op0=1 op1=1
+; CHECK: INST_RET {{.*}}op0=1
+define double @test_float_binops(i32 %a) nounwind {
+ %1 = sitofp i32 %a to double
+ %2 = fadd double %1, %1
+ %3 = fsub double %2, %2
+ %4 = fmul double %3, %3
+ %5 = fdiv double %4, %4
+ ret double %5
+}
+
+
+; CHECK: FUNCTION_BLOCK
+; skip checking operands of INST_INBOUNDS_GEP since that depends on ordering
+; between literals and the formal parameters.
+; CHECK: INST_INBOUNDS_GEP {{.*}}
+; CHECK: INST_LOAD {{.*}}op0=1 {{.*}}
+; CHECK: INST_CMP2 op0=1 {{.*}}
+; CHECK: INST_RET {{.*}}op0=1
+define i1 @test_load(i32 %a, {i32, i32}* %ptr) nounwind {
+entry:
+ %0 = getelementptr inbounds {i32, i32}* %ptr, i32 %a, i32 0
+ %1 = load i32* %0
+ %2 = icmp eq i32 %1, %a
+ ret i1 %2
+}
Modified: llvm/branches/R600/test/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CMakeLists.txt?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CMakeLists.txt (original)
+++ llvm/branches/R600/test/CMakeLists.txt Tue Oct 16 12:52:57 2012
@@ -19,7 +19,7 @@
DEPENDS UnitTests
BugpointPasses LLVMHello
llc lli llvm-ar llvm-as
- llvm-diff
+ llvm-bcanalyzer llvm-diff
llvm-dis llvm-extract llvm-dwarfdump
llvm-link llvm-mc llvm-nm llvm-objdump llvm-readobj
macho-dump opt
Modified: llvm/branches/R600/test/CodeGen/ARM/2011-06-16-TailCallByVal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/ARM/2011-06-16-TailCallByVal.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/ARM/2011-06-16-TailCallByVal.ll (original)
+++ llvm/branches/R600/test/CodeGen/ARM/2011-06-16-TailCallByVal.ll Tue Oct 16 12:52:57 2012
@@ -1,4 +1,9 @@
; RUN: llc < %s -arm-tail-calls=1 | FileCheck %s
+
+; tail call inside a function where byval argument is splitted between
+; registers and stack is currently unsupported.
+; XFAIL: *
+
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
target triple = "thumbv7-apple-ios"
Added: llvm/branches/R600/test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll (added)
+++ llvm/branches/R600/test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,56 @@
+; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi | FileCheck %s
+; Test that we correctly use registers and align elements when using va_arg
+
+%struct_t = type { double, double, double }
+ at static_val = constant %struct_t { double 1.0, double 2.0, double 3.0 }
+
+declare void @llvm.va_start(i8*) nounwind
+declare void @llvm.va_end(i8*) nounwind
+
+; CHECK: test_byval_8_bytes_alignment:
+define void @test_byval_8_bytes_alignment(i32 %i, ...) {
+entry:
+; CHECK: stm r0, {r1, r2, r3}
+ %g = alloca i8*
+ %g1 = bitcast i8** %g to i8*
+ call void @llvm.va_start(i8* %g1)
+
+; CHECK: add [[REG:(r[0-9]+)|(lr)]], {{(r[0-9]+)|(lr)}}, #7
+; CHECK: bfc [[REG]], #0, #3
+ %0 = va_arg i8** %g, double
+ call void @llvm.va_end(i8* %g1)
+
+ ret void
+}
+
+; CHECK: main:
+; CHECK: ldm r0, {r2, r3}
+define i32 @main() {
+entry:
+ call void (i32, ...)* @test_byval_8_bytes_alignment(i32 555, %struct_t* byval @static_val)
+ ret i32 0
+}
+
+declare void @f(double);
+
+; CHECK: test_byval_8_bytes_alignment_fixed_arg:
+; CHECK-NOT: str r1
+; CHECK: str r3, [sp, #12]
+; CHECK: str r2, [sp, #8]
+; CHECK-NOT: str r1
+define void @test_byval_8_bytes_alignment_fixed_arg(i32 %n1, %struct_t* byval %val) nounwind {
+entry:
+ %a = getelementptr inbounds %struct_t* %val, i32 0, i32 0
+ %0 = load double* %a
+ call void (double)* @f(double %0)
+ ret void
+}
+
+; CHECK: main_fixed_arg:
+; CHECK: ldm r0, {r2, r3}
+define i32 @main_fixed_arg() {
+entry:
+ call void (i32, %struct_t*)* @test_byval_8_bytes_alignment_fixed_arg(i32 555, %struct_t* byval @static_val)
+ ret i32 0
+}
+
Modified: llvm/branches/R600/test/CodeGen/ARM/2012-10-04-LDRB_POST_IMM-Crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/ARM/2012-10-04-LDRB_POST_IMM-Crash.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/ARM/2012-10-04-LDRB_POST_IMM-Crash.ll (original)
+++ llvm/branches/R600/test/CodeGen/ARM/2012-10-04-LDRB_POST_IMM-Crash.ll Tue Oct 16 12:52:57 2012
@@ -1,23 +1,16 @@
-; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi | FileCheck %s
+; RUN: llc < %s -mtriple=armv7-none-linux- | FileCheck %s
; Check that LDRB_POST_IMM instruction emitted properly.
-%my_struct_t = type { double, double, double }
- at main.val = private unnamed_addr constant %my_struct_t { double 1.0, double 2.0, double 3.0 }, align 8
-
-declare void @f(i32 %n1, %my_struct_t* byval %val);
+%my_struct_t = type { i8, i8, i8, i8, i8 }
+ at main.val = private unnamed_addr constant %my_struct_t { i8 1, i8 2, i8 3, i8 4, i8 5 }
+declare void @f(i32 %n1, i32 %n2, i32 %n3, %my_struct_t* byval %val);
; CHECK: main:
define i32 @main() nounwind {
entry:
- %val = alloca %my_struct_t, align 8
- %0 = bitcast %my_struct_t* %val to i8*
-
; CHECK: ldrb {{(r[0-9]+)}}, {{(\[r[0-9]+\])}}, #1
- call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* bitcast (%my_struct_t* @main.val to i8*), i32 24, i32 8, i1 false)
-
- call void @f(i32 555, %my_struct_t* byval %val)
+ call void @f(i32 555, i32 555, i32 555, %my_struct_t* byval @main.val)
ret i32 0
}
-declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
Modified: llvm/branches/R600/test/CodeGen/ARM/coalesce-subregs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/ARM/coalesce-subregs.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/ARM/coalesce-subregs.ll (original)
+++ llvm/branches/R600/test/CodeGen/ARM/coalesce-subregs.ll Tue Oct 16 12:52:57 2012
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=cortex-a9 -verify-coalescing | FileCheck %s
+; RUN: llc < %s -mcpu=cortex-a9 -verify-coalescing -verify-machineinstrs | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
target triple = "thumbv7-apple-ios0.0.0"
@@ -214,3 +214,78 @@
%d.end = phi double [ 0.0, %entry ], [ %add, %after_inner_loop ]
ret void
}
+
+; CHECK: pr14078
+define arm_aapcs_vfpcc i32 @pr14078(i8* nocapture %arg, i8* nocapture %arg1, i32 %arg2) nounwind uwtable readonly {
+bb:
+ br i1 undef, label %bb31, label %bb3
+
+bb3: ; preds = %bb12, %bb
+ %tmp = shufflevector <2 x i64> undef, <2 x i64> undef, <1 x i32> zeroinitializer
+ %tmp4 = bitcast <1 x i64> %tmp to <2 x float>
+ %tmp5 = shufflevector <2 x float> %tmp4, <2 x float> undef, <4 x i32> zeroinitializer
+ %tmp6 = bitcast <4 x float> %tmp5 to <2 x i64>
+ %tmp7 = shufflevector <2 x i64> %tmp6, <2 x i64> undef, <1 x i32> zeroinitializer
+ %tmp8 = bitcast <1 x i64> %tmp7 to <2 x float>
+ %tmp9 = tail call <2 x float> @baz(<2 x float> <float 0xFFFFFFFFE0000000, float 0.000000e+00>, <2 x float> %tmp8, <2 x float> zeroinitializer) nounwind
+ br i1 undef, label %bb10, label %bb12
+
+bb10: ; preds = %bb3
+ %tmp11 = load <4 x float>* undef, align 8
+ br label %bb12
+
+bb12: ; preds = %bb10, %bb3
+ %tmp13 = shufflevector <2 x float> %tmp9, <2 x float> zeroinitializer, <2 x i32> <i32 0, i32 2>
+ %tmp14 = bitcast <2 x float> %tmp13 to <1 x i64>
+ %tmp15 = shufflevector <1 x i64> %tmp14, <1 x i64> zeroinitializer, <2 x i32> <i32 0, i32 1>
+ %tmp16 = bitcast <2 x i64> %tmp15 to <4 x float>
+ %tmp17 = fmul <4 x float> zeroinitializer, %tmp16
+ %tmp18 = bitcast <4 x float> %tmp17 to <2 x i64>
+ %tmp19 = shufflevector <2 x i64> %tmp18, <2 x i64> undef, <1 x i32> zeroinitializer
+ %tmp20 = bitcast <1 x i64> %tmp19 to <2 x float>
+ %tmp21 = tail call <2 x float> @baz67(<2 x float> %tmp20, <2 x float> undef) nounwind
+ %tmp22 = tail call <2 x float> @baz67(<2 x float> %tmp21, <2 x float> %tmp21) nounwind
+ %tmp23 = shufflevector <2 x float> %tmp22, <2 x float> undef, <4 x i32> zeroinitializer
+ %tmp24 = bitcast <4 x float> %tmp23 to <2 x i64>
+ %tmp25 = shufflevector <2 x i64> %tmp24, <2 x i64> undef, <1 x i32> zeroinitializer
+ %tmp26 = bitcast <1 x i64> %tmp25 to <2 x float>
+ %tmp27 = extractelement <2 x float> %tmp26, i32 0
+ %tmp28 = fcmp olt float %tmp27, 0.000000e+00
+ %tmp29 = select i1 %tmp28, i32 0, i32 undef
+ %tmp30 = icmp ult i32 undef, %arg2
+ br i1 %tmp30, label %bb3, label %bb31
+
+bb31: ; preds = %bb12, %bb
+ %tmp32 = phi i32 [ 1, %bb ], [ %tmp29, %bb12 ]
+ ret i32 %tmp32
+}
+
+declare <2 x float> @baz(<2 x float>, <2 x float>, <2 x float>) nounwind readnone
+
+declare <2 x float> @baz67(<2 x float>, <2 x float>) nounwind readnone
+
+%struct.wombat.5 = type { %struct.quux, %struct.quux, %struct.quux, %struct.quux }
+%struct.quux = type { <4 x float> }
+
+; CHECK: pr14079
+define linkonce_odr arm_aapcs_vfpcc %struct.wombat.5 @pr14079(i8* nocapture %arg, i8* nocapture %arg1, i8* nocapture %arg2) nounwind uwtable inlinehint {
+bb:
+ %tmp = shufflevector <2 x i64> zeroinitializer, <2 x i64> undef, <1 x i32> zeroinitializer
+ %tmp3 = bitcast <1 x i64> %tmp to <2 x float>
+ %tmp4 = shufflevector <2 x float> %tmp3, <2 x float> zeroinitializer, <2 x i32> <i32 1, i32 3>
+ %tmp5 = shufflevector <2 x float> %tmp4, <2 x float> undef, <2 x i32> <i32 1, i32 3>
+ %tmp6 = bitcast <2 x float> %tmp5 to <1 x i64>
+ %tmp7 = shufflevector <1 x i64> undef, <1 x i64> %tmp6, <2 x i32> <i32 0, i32 1>
+ %tmp8 = bitcast <2 x i64> %tmp7 to <4 x float>
+ %tmp9 = shufflevector <2 x i64> zeroinitializer, <2 x i64> undef, <1 x i32> <i32 1>
+ %tmp10 = bitcast <1 x i64> %tmp9 to <2 x float>
+ %tmp11 = shufflevector <2 x float> %tmp10, <2 x float> undef, <2 x i32> <i32 0, i32 2>
+ %tmp12 = shufflevector <2 x float> %tmp11, <2 x float> undef, <2 x i32> <i32 0, i32 2>
+ %tmp13 = bitcast <2 x float> %tmp12 to <1 x i64>
+ %tmp14 = shufflevector <1 x i64> %tmp13, <1 x i64> undef, <2 x i32> <i32 0, i32 1>
+ %tmp15 = bitcast <2 x i64> %tmp14 to <4 x float>
+ %tmp16 = insertvalue %struct.wombat.5 undef, <4 x float> %tmp8, 1, 0
+ %tmp17 = insertvalue %struct.wombat.5 %tmp16, <4 x float> %tmp15, 2, 0
+ %tmp18 = insertvalue %struct.wombat.5 %tmp17, <4 x float> undef, 3, 0
+ ret %struct.wombat.5 %tmp18
+}
Modified: llvm/branches/R600/test/CodeGen/ARM/divmod.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/ARM/divmod.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/ARM/divmod.ll (original)
+++ llvm/branches/R600/test/CodeGen/ARM/divmod.ll Tue Oct 16 12:52:57 2012
@@ -1,10 +1,18 @@
-; RUN: llc < %s -mtriple=arm-apple-ios5.0 -mcpu=cortex-a8 | FileCheck %s
+; RUN: llc < %s -mtriple=arm-apple-ios5.0 -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8
+; RUN: llc < %s -mtriple=arm-apple-ios5.0 -mcpu=swift | FileCheck %s -check-prefix=SWIFT
+
+; rdar://12481395
define void @foo(i32 %x, i32 %y, i32* nocapture %P) nounwind ssp {
entry:
-; CHECK: foo:
-; CHECK: bl ___divmodsi4
-; CHECK-NOT: bl ___divmodsi4
+; A8: foo:
+; A8: bl ___divmodsi4
+; A8-NOT: bl ___divmodsi4
+
+; SWIFT: foo:
+; SWIFT: sdiv
+; SWIFT: mls
+; SWIFT-NOT: bl __divmodsi4
%div = sdiv i32 %x, %y
store i32 %div, i32* %P, align 4
%rem = srem i32 %x, %y
@@ -15,9 +23,14 @@
define void @bar(i32 %x, i32 %y, i32* nocapture %P) nounwind ssp {
entry:
-; CHECK: bar:
-; CHECK: bl ___udivmodsi4
-; CHECK-NOT: bl ___udivmodsi4
+; A8: bar:
+; A8: bl ___udivmodsi4
+; A8-NOT: bl ___udivmodsi4
+
+; SWIFT: bar:
+; SWIFT: udiv
+; SWIFT: mls
+; SWIFT-NOT: bl __udivmodsi4
%div = udiv i32 %x, %y
store i32 %div, i32* %P, align 4
%rem = urem i32 %x, %y
@@ -32,14 +45,18 @@
define void @do_indent(i32 %cols) nounwind {
entry:
-; CHECK: do_indent:
+; A8: do_indent:
+; SWIFT: do_indent:
%0 = load i32* @flags, align 4
%1 = and i32 %0, 67108864
%2 = icmp eq i32 %1, 0
br i1 %2, label %bb1, label %bb
bb:
-; CHECK: bl ___divmodsi4
+; A8: bl ___divmodsi4
+; SWIFT: sdiv
+; SWIFT: mls
+; SWIFT-NOT: bl __divmodsi4
%3 = load i32* @tabsize, align 4
%4 = srem i32 %cols, %3
%5 = sdiv i32 %cols, %3
@@ -60,9 +77,14 @@
; rdar://11714607
define i32 @howmany(i32 %x, i32 %y) nounwind {
entry:
-; CHECK: howmany:
-; CHECK: bl ___udivmodsi4
-; CHECK-NOT: ___udivsi3
+; A8: howmany:
+; A8: bl ___udivmodsi4
+; A8-NOT: ___udivsi3
+
+; SWIFT: howmany:
+; SWIFT: udiv
+; SWIFT: mls
+; SWIFT-NOT: bl __udivmodsi4
%rem = urem i32 %x, %y
%div = udiv i32 %x, %y
%not.cmp = icmp ne i32 %rem, 0
Modified: llvm/branches/R600/test/CodeGen/ARM/struct_byval.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/ARM/struct_byval.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/ARM/struct_byval.ll (original)
+++ llvm/branches/R600/test/CodeGen/ARM/struct_byval.ll Tue Oct 16 12:52:57 2012
@@ -44,3 +44,47 @@
declare i32 @e1(%struct.SmallStruct* nocapture byval %in) nounwind
declare i32 @e2(%struct.LargeStruct* nocapture byval %in) nounwind
declare i32 @e3(%struct.LargeStruct* nocapture byval align 16 %in) nounwind
+
+; rdar://12442472
+; We can't do tail call since address of s is passed to the callee and part of
+; s is in caller's local frame.
+define void @f3(%struct.SmallStruct* nocapture byval %s) nounwind optsize {
+; CHECK: f3
+; CHECK: bl _consumestruct
+entry:
+ %0 = bitcast %struct.SmallStruct* %s to i8*
+ tail call void @consumestruct(i8* %0, i32 80) optsize
+ ret void
+}
+
+define void @f4(%struct.SmallStruct* nocapture byval %s) nounwind optsize {
+; CHECK: f4
+; CHECK: bl _consumestruct
+entry:
+ %addr = getelementptr inbounds %struct.SmallStruct* %s, i32 0, i32 0
+ %0 = bitcast i32* %addr to i8*
+ tail call void @consumestruct(i8* %0, i32 80) optsize
+ ret void
+}
+
+; We can do tail call here since s is in the incoming argument area.
+define void @f5(i32 %a, i32 %b, i32 %c, i32 %d, %struct.SmallStruct* nocapture byval %s) nounwind optsize {
+; CHECK: f5
+; CHECK: b _consumestruct
+entry:
+ %0 = bitcast %struct.SmallStruct* %s to i8*
+ tail call void @consumestruct(i8* %0, i32 80) optsize
+ ret void
+}
+
+define void @f6(i32 %a, i32 %b, i32 %c, i32 %d, %struct.SmallStruct* nocapture byval %s) nounwind optsize {
+; CHECK: f6
+; CHECK: b _consumestruct
+entry:
+ %addr = getelementptr inbounds %struct.SmallStruct* %s, i32 0, i32 0
+ %0 = bitcast i32* %addr to i8*
+ tail call void @consumestruct(i8* %0, i32 80) optsize
+ ret void
+}
+
+declare void @consumestruct(i8* nocapture %structp, i32 %structsize) nounwind
Modified: llvm/branches/R600/test/CodeGen/ARM/vbsl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/ARM/vbsl.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/ARM/vbsl.ll (original)
+++ llvm/branches/R600/test/CodeGen/ARM/vbsl.ll Tue Oct 16 12:52:57 2012
@@ -1,5 +1,7 @@
; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+; rdar://12471808
+
define <8 x i8> @v_bsli8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
;CHECK: v_bsli8:
;CHECK: vbsl
@@ -125,6 +127,13 @@
ret <2 x i32> %vbsl3.i
}
+define <2 x float> @f4(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind readnone optsize ssp {
+; CHECK: f4:
+; CHECK: vbsl
+ %vbsl4.i = tail call <2 x float> @llvm.arm.neon.vbsl.v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind
+ ret <2 x float> %vbsl4.i
+}
+
define <16 x i8> @g1(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) nounwind readnone optsize ssp {
; CHECK: g1:
; CHECK: vbsl
@@ -146,9 +155,48 @@
ret <4 x i32> %vbsl3.i
}
+define <4 x float> @g4(<4 x float> %a, <4 x float> %b, <4 x float> %c) nounwind readnone optsize ssp {
+; CHECK: g4:
+; CHECK: vbsl
+ %vbsl4.i = tail call <4 x float> @llvm.arm.neon.vbsl.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c) nounwind
+ ret <4 x float> %vbsl4.i
+}
+
+define <1 x i64> @test_vbsl_s64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) nounwind readnone optsize ssp {
+; CHECK: test_vbsl_s64:
+; CHECK: vbsl d
+ %vbsl3.i = tail call <1 x i64> @llvm.arm.neon.vbsl.v1i64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) nounwind
+ ret <1 x i64> %vbsl3.i
+}
+
+define <1 x i64> @test_vbsl_u64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) nounwind readnone optsize ssp {
+; CHECK: test_vbsl_u64:
+; CHECK: vbsl d
+ %vbsl3.i = tail call <1 x i64> @llvm.arm.neon.vbsl.v1i64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) nounwind
+ ret <1 x i64> %vbsl3.i
+}
+
+define <2 x i64> @test_vbslq_s64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) nounwind readnone optsize ssp {
+; CHECK: test_vbslq_s64:
+; CHECK: vbsl q
+ %vbsl3.i = tail call <2 x i64> @llvm.arm.neon.vbsl.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) nounwind
+ ret <2 x i64> %vbsl3.i
+}
+
+define <2 x i64> @test_vbslq_u64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) nounwind readnone optsize ssp {
+; CHECK: test_vbslq_u64:
+; CHECK: vbsl q
+ %vbsl3.i = tail call <2 x i64> @llvm.arm.neon.vbsl.v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) nounwind
+ ret <2 x i64> %vbsl3.i
+}
+
declare <4 x i32> @llvm.arm.neon.vbsl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) nounwind readnone
declare <8 x i16> @llvm.arm.neon.vbsl.v8i16(<8 x i16>, <8 x i16>, <8 x i16>) nounwind readnone
declare <16 x i8> @llvm.arm.neon.vbsl.v16i8(<16 x i8>, <16 x i8>, <16 x i8>) nounwind readnone
declare <2 x i32> @llvm.arm.neon.vbsl.v2i32(<2 x i32>, <2 x i32>, <2 x i32>) nounwind readnone
declare <4 x i16> @llvm.arm.neon.vbsl.v4i16(<4 x i16>, <4 x i16>, <4 x i16>) nounwind readnone
declare <8 x i8> @llvm.arm.neon.vbsl.v8i8(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
+declare <2 x float> @llvm.arm.neon.vbsl.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone
+declare <4 x float> @llvm.arm.neon.vbsl.v4f32(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
+declare <2 x i64> @llvm.arm.neon.vbsl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) nounwind readnone
+declare <1 x i64> @llvm.arm.neon.vbsl.v1i64(<1 x i64>, <1 x i64>, <1 x i64>) nounwind readnone
Modified: llvm/branches/R600/test/CodeGen/ARM/vdup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/ARM/vdup.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/ARM/vdup.ll (original)
+++ llvm/branches/R600/test/CodeGen/ARM/vdup.ll Tue Oct 16 12:52:57 2012
@@ -295,3 +295,39 @@
%4 = insertelement <4 x i32> %3, i32 255, i32 3
ret <4 x i32> %4
}
+
+define <2 x float> @check_f32(<4 x float> %v) nounwind {
+;CHECK: check_f32:
+;CHECK: vdup.32 {{.*}}, d{{..}}[1]
+ %x = extractelement <4 x float> %v, i32 3
+ %1 = insertelement <2 x float> undef, float %x, i32 0
+ %2 = insertelement <2 x float> %1, float %x, i32 1
+ ret <2 x float> %2
+}
+
+define <2 x i32> @check_i32(<4 x i32> %v) nounwind {
+;CHECK: check_i32:
+;CHECK: vdup.32 {{.*}}, d{{..}}[1]
+ %x = extractelement <4 x i32> %v, i32 3
+ %1 = insertelement <2 x i32> undef, i32 %x, i32 0
+ %2 = insertelement <2 x i32> %1, i32 %x, i32 1
+ ret <2 x i32> %2
+}
+
+define <4 x i16> @check_i16(<8 x i16> %v) nounwind {
+;CHECK: check_i16:
+;CHECK: vdup.16 {{.*}}, d{{..}}[3]
+ %x = extractelement <8 x i16> %v, i32 3
+ %1 = insertelement <4 x i16> undef, i16 %x, i32 0
+ %2 = insertelement <4 x i16> %1, i16 %x, i32 1
+ ret <4 x i16> %2
+}
+
+define <8 x i8> @check_i8(<16 x i8> %v) nounwind {
+;CHECK: check_i8:
+;CHECK: vdup.8 {{.*}}, d{{..}}[3]
+ %x = extractelement <16 x i8> %v, i32 3
+ %1 = insertelement <8 x i8> undef, i8 %x, i32 0
+ %2 = insertelement <8 x i8> %1, i8 %x, i32 1
+ ret <8 x i8> %2
+}
Added: llvm/branches/R600/test/CodeGen/ARM/vselect_imax.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/ARM/vselect_imax.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/ARM/vselect_imax.ll (added)
+++ llvm/branches/R600/test/CodeGen/ARM/vselect_imax.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+; Make sure that ARM backend with NEON handles vselect.
+
+define void @vmax_v4i32(<4 x i32>* %m, <4 x i32> %a, <4 x i32> %b) {
+; CHECK: vcgt.s32 [[QR:q[0-9]+]], [[Q1:q[0-9]+]], [[Q2:q[0-9]+]]
+; CHECK: vbsl [[QR]], [[Q1]], [[Q2]]
+ %cmpres = icmp sgt <4 x i32> %a, %b
+ %maxres = select <4 x i1> %cmpres, <4 x i32> %a, <4 x i32> %b
+ store <4 x i32> %maxres, <4 x i32>* %m
+ ret void
+}
+
Added: llvm/branches/R600/test/CodeGen/Mips/div.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/Mips/div.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/Mips/div.ll (added)
+++ llvm/branches/R600/test/CodeGen/Mips/div.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,18 @@
+; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+
+ at iiii = global i32 100, align 4
+ at jjjj = global i32 -4, align 4
+ at kkkk = common global i32 0, align 4
+
+define void @test() nounwind {
+entry:
+ %0 = load i32* @iiii, align 4
+ %1 = load i32* @jjjj, align 4
+ %div = sdiv i32 %0, %1
+; 16: div $zero, ${{[0-9]+}}, ${{[0-9]+}}
+; 16: mflo ${{[0-9]+}}
+ store i32 %div, i32* @kkkk, align 4
+ ret void
+}
+
+
Added: llvm/branches/R600/test/CodeGen/Mips/div_rem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/Mips/div_rem.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/Mips/div_rem.ll (added)
+++ llvm/branches/R600/test/CodeGen/Mips/div_rem.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,21 @@
+; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+
+ at iiii = global i32 103, align 4
+ at jjjj = global i32 -4, align 4
+ at kkkk = common global i32 0, align 4
+ at llll = common global i32 0, align 4
+
+define void @test() nounwind {
+entry:
+ %0 = load i32* @iiii, align 4
+ %1 = load i32* @jjjj, align 4
+ %div = sdiv i32 %0, %1
+ store i32 %div, i32* @kkkk, align 4
+ %rem = srem i32 %0, %1
+; 16: div $zero, ${{[0-9]+}}, ${{[0-9]+}}
+; 16: mflo ${{[0-9]+}}
+; 16: mfhi ${{[0-9]+}}
+ store i32 %rem, i32* @llll, align 4
+ ret void
+}
+
Added: llvm/branches/R600/test/CodeGen/Mips/divu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/Mips/divu.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/Mips/divu.ll (added)
+++ llvm/branches/R600/test/CodeGen/Mips/divu.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,18 @@
+; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+
+ at iiii = global i32 100, align 4
+ at jjjj = global i32 4, align 4
+ at kkkk = common global i32 0, align 4
+
+define void @test() nounwind {
+entry:
+ %0 = load i32* @iiii, align 4
+ %1 = load i32* @jjjj, align 4
+ %div = udiv i32 %0, %1
+; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
+; 16: mflo ${{[0-9]+}}
+ store i32 %div, i32* @kkkk, align 4
+ ret void
+}
+
+
Added: llvm/branches/R600/test/CodeGen/Mips/divu_remu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/Mips/divu_remu.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/Mips/divu_remu.ll (added)
+++ llvm/branches/R600/test/CodeGen/Mips/divu_remu.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,23 @@
+; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+
+ at iiii = global i32 103, align 4
+ at jjjj = global i32 4, align 4
+ at kkkk = common global i32 0, align 4
+ at llll = common global i32 0, align 4
+
+
+define void @test() nounwind {
+entry:
+ %0 = load i32* @iiii, align 4
+ %1 = load i32* @jjjj, align 4
+ %div = udiv i32 %0, %1
+ store i32 %div, i32* @kkkk, align 4
+ %rem = urem i32 %0, %1
+; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
+; 16: mflo ${{[0-9]+}}
+; 16: mfhi ${{[0-9]+}}
+ store i32 %rem, i32* @llll, align 4
+ ret void
+}
+
+
Added: llvm/branches/R600/test/CodeGen/Mips/rem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/Mips/rem.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/Mips/rem.ll (added)
+++ llvm/branches/R600/test/CodeGen/Mips/rem.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,19 @@
+; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+
+ at iiii = global i32 103, align 4
+ at jjjj = global i32 -4, align 4
+ at kkkk = common global i32 0, align 4
+
+
+define void @test() nounwind {
+entry:
+ %0 = load i32* @iiii, align 4
+ %1 = load i32* @jjjj, align 4
+ %rem = srem i32 %0, %1
+; 16: div $zero, ${{[0-9]+}}, ${{[0-9]+}}
+; 16: mfhi ${{[0-9]+}}
+ store i32 %rem, i32* @kkkk, align 4
+ ret void
+}
+
+
Added: llvm/branches/R600/test/CodeGen/Mips/remu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/Mips/remu.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/Mips/remu.ll (added)
+++ llvm/branches/R600/test/CodeGen/Mips/remu.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,18 @@
+; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
+
+ at iiii = global i32 103, align 4
+ at jjjj = global i32 4, align 4
+ at kkkk = common global i32 0, align 4
+ at .str = private unnamed_addr constant [15 x i8] c"%u = %u %% %u\0A\00", align 1
+
+define void @test() nounwind {
+entry:
+ %0 = load i32* @iiii, align 4
+ %1 = load i32* @jjjj, align 4
+ %rem = urem i32 %0, %1
+; 16: divu $zero, ${{[0-9]+}}, ${{[0-9]+}}
+; 16: mfhi ${{[0-9]+}}
+ store i32 %rem, i32* @kkkk, align 4
+ ret void
+}
+
Added: llvm/branches/R600/test/CodeGen/PowerPC/2012-10-12-bitcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/PowerPC/2012-10-12-bitcast.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/PowerPC/2012-10-12-bitcast.ll (added)
+++ llvm/branches/R600/test/CodeGen/PowerPC/2012-10-12-bitcast.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,20 @@
+; RUN: llc -mattr=+altivec < %s | FileCheck %s
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+define i32 @test(<16 x i8> %v) nounwind {
+entry:
+ %0 = bitcast <16 x i8> %v to i128
+ %1 = lshr i128 %0, 96
+ %2 = trunc i128 %1 to i32
+ ret i32 %2
+}
+
+; Verify that bitcast handles big-endian platforms correctly
+; by checking we load the result from the correct offset
+
+; CHECK: addi [[REGISTER:[0-9]+]], 1, -16
+; CHECK: stvx 2, 0, [[REGISTER]]
+; CHECK: lwz 3, -16(1)
+; CHECK: blr
+
Added: llvm/branches/R600/test/CodeGen/PowerPC/floatPSA.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/PowerPC/floatPSA.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/PowerPC/floatPSA.ll (added)
+++ llvm/branches/R600/test/CodeGen/PowerPC/floatPSA.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,97 @@
+; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
+
+; This verifies that single-precision floating point values that can't
+; be passed in registers are stored in the rightmost word of the parameter
+; save area slot. There are 13 architected floating-point registers, so
+; the 14th is passed in storage. The address of the 14th argument is
+; 48 (fixed size of the linkage area) + 13 * 8 (first 13 args) + 4
+; (offset to second word) = 156.
+
+define float @bar(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, float %i, float %j, float %k, float %l, float %m, float %n) nounwind {
+entry:
+ %a.addr = alloca float, align 4
+ %b.addr = alloca float, align 4
+ %c.addr = alloca float, align 4
+ %d.addr = alloca float, align 4
+ %e.addr = alloca float, align 4
+ %f.addr = alloca float, align 4
+ %g.addr = alloca float, align 4
+ %h.addr = alloca float, align 4
+ %i.addr = alloca float, align 4
+ %j.addr = alloca float, align 4
+ %k.addr = alloca float, align 4
+ %l.addr = alloca float, align 4
+ %m.addr = alloca float, align 4
+ %n.addr = alloca float, align 4
+ store float %a, float* %a.addr, align 4
+ store float %b, float* %b.addr, align 4
+ store float %c, float* %c.addr, align 4
+ store float %d, float* %d.addr, align 4
+ store float %e, float* %e.addr, align 4
+ store float %f, float* %f.addr, align 4
+ store float %g, float* %g.addr, align 4
+ store float %h, float* %h.addr, align 4
+ store float %i, float* %i.addr, align 4
+ store float %j, float* %j.addr, align 4
+ store float %k, float* %k.addr, align 4
+ store float %l, float* %l.addr, align 4
+ store float %m, float* %m.addr, align 4
+ store float %n, float* %n.addr, align 4
+ %0 = load float* %n.addr, align 4
+ ret float %0
+}
+
+; CHECK: lfs {{[0-9]+}}, 156(1)
+
+define float @foo() nounwind {
+entry:
+ %a = alloca float, align 4
+ %b = alloca float, align 4
+ %c = alloca float, align 4
+ %d = alloca float, align 4
+ %e = alloca float, align 4
+ %f = alloca float, align 4
+ %g = alloca float, align 4
+ %h = alloca float, align 4
+ %i = alloca float, align 4
+ %j = alloca float, align 4
+ %k = alloca float, align 4
+ %l = alloca float, align 4
+ %m = alloca float, align 4
+ %n = alloca float, align 4
+ store float 1.000000e+00, float* %a, align 4
+ store float 2.000000e+00, float* %b, align 4
+ store float 3.000000e+00, float* %c, align 4
+ store float 4.000000e+00, float* %d, align 4
+ store float 5.000000e+00, float* %e, align 4
+ store float 6.000000e+00, float* %f, align 4
+ store float 7.000000e+00, float* %g, align 4
+ store float 8.000000e+00, float* %h, align 4
+ store float 9.000000e+00, float* %i, align 4
+ store float 1.000000e+01, float* %j, align 4
+ store float 1.100000e+01, float* %k, align 4
+ store float 1.200000e+01, float* %l, align 4
+ store float 1.300000e+01, float* %m, align 4
+ store float 1.400000e+01, float* %n, align 4
+ %0 = load float* %a, align 4
+ %1 = load float* %b, align 4
+ %2 = load float* %c, align 4
+ %3 = load float* %d, align 4
+ %4 = load float* %e, align 4
+ %5 = load float* %f, align 4
+ %6 = load float* %g, align 4
+ %7 = load float* %h, align 4
+ %8 = load float* %i, align 4
+ %9 = load float* %j, align 4
+ %10 = load float* %k, align 4
+ %11 = load float* %l, align 4
+ %12 = load float* %m, align 4
+ %13 = load float* %n, align 4
+ %call = call float @bar(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13)
+ ret float %call
+}
+
+; Note that stw is used instead of stfs because the value is a simple
+; constant that can be created with a load-immediate in a GPR.
+; CHECK: stw {{[0-9]+}}, 156(1)
+
Added: llvm/branches/R600/test/CodeGen/PowerPC/novrsave.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/PowerPC/novrsave.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/PowerPC/novrsave.ll (added)
+++ llvm/branches/R600/test/CodeGen/PowerPC/novrsave.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,15 @@
+; RUN: llc -O0 -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
+
+; This verifies that the code to update VRSAVE has been removed for SVR4.
+
+define <4 x float> @bar(<4 x float> %v) nounwind {
+entry:
+ %v.addr = alloca <4 x float>, align 16
+ store <4 x float> %v, <4 x float>* %v.addr, align 16
+ %0 = load <4 x float>* %v.addr, align 16
+ ret <4 x float> %0
+}
+
+; CHECK-NOT: mfspr
+; CHECK-NOT: mtspr
Copied: llvm/branches/R600/test/CodeGen/PowerPC/structsinmem.ll (from r165971, llvm/branches/R600/test/CodeGen/PowerPC/structsinregs.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/PowerPC/structsinmem.ll?p2=llvm/branches/R600/test/CodeGen/PowerPC/structsinmem.ll&p1=llvm/branches/R600/test/CodeGen/PowerPC/structsinregs.ll&r1=165971&r2=166033&rev=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/PowerPC/structsinregs.ll (original)
+++ llvm/branches/R600/test/CodeGen/PowerPC/structsinmem.ll Tue Oct 16 12:52:57 2012
@@ -1,5 +1,9 @@
; RUN: llc -mcpu=pwr7 -O0 -disable-fp-elim < %s | FileCheck %s
+; FIXME: The code generation for packed structs is very poor because the
+; PowerPC target wrongly rejects all unaligned loads. This test case will
+; need to be revised when that is fixed.
+
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
@@ -56,22 +60,38 @@
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast ({ i32, i16, [2 x i8] }* @caller1.p6 to i8*), i64 8, i32 4, i1 false)
%6 = bitcast %struct.s7* %p7 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast ({ i32, i16, i8, i8 }* @caller1.p7 to i8*), i64 8, i32 4, i1 false)
- %call = call i32 @callee1(%struct.s1* byval %p1, %struct.s2* byval %p2, %struct.s3* byval %p3, %struct.s4* byval %p4, %struct.s5* byval %p5, %struct.s6* byval %p6, %struct.s7* byval %p7)
+ %call = call i32 @callee1(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, %struct.s1* byval %p1, %struct.s2* byval %p2, %struct.s3* byval %p3, %struct.s4* byval %p4, %struct.s5* byval %p5, %struct.s6* byval %p6, %struct.s7* byval %p7)
ret i32 %call
-; CHECK: ld 9, 128(31)
-; CHECK: ld 8, 136(31)
-; CHECK: ld 7, 144(31)
-; CHECK: lwz 6, 152(31)
-; CHECK: lwz 5, 160(31)
-; CHECK: lhz 4, 168(31)
-; CHECK: lbz 3, 176(31)
+; CHECK: stb {{[0-9]+}}, 119(1)
+; CHECK: sth {{[0-9]+}}, 126(1)
+; CHECK: stw {{[0-9]+}}, 132(1)
+; CHECK: stw {{[0-9]+}}, 140(1)
+; CHECK: std {{[0-9]+}}, 144(1)
+; CHECK: std {{[0-9]+}}, 152(1)
+; CHECK: std {{[0-9]+}}, 160(1)
}
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
-define internal i32 @callee1(%struct.s1* byval %v1, %struct.s2* byval %v2, %struct.s3* byval %v3, %struct.s4* byval %v4, %struct.s5* byval %v5, %struct.s6* byval %v6, %struct.s7* byval %v7) nounwind {
+define internal i32 @callee1(i32 %z1, i32 %z2, i32 %z3, i32 %z4, i32 %z5, i32 %z6, i32 %z7, i32 %z8, %struct.s1* byval %v1, %struct.s2* byval %v2, %struct.s3* byval %v3, %struct.s4* byval %v4, %struct.s5* byval %v5, %struct.s6* byval %v6, %struct.s7* byval %v7) nounwind {
entry:
+ %z1.addr = alloca i32, align 4
+ %z2.addr = alloca i32, align 4
+ %z3.addr = alloca i32, align 4
+ %z4.addr = alloca i32, align 4
+ %z5.addr = alloca i32, align 4
+ %z6.addr = alloca i32, align 4
+ %z7.addr = alloca i32, align 4
+ %z8.addr = alloca i32, align 4
+ store i32 %z1, i32* %z1.addr, align 4
+ store i32 %z2, i32* %z2.addr, align 4
+ store i32 %z3, i32* %z3.addr, align 4
+ store i32 %z4, i32* %z4.addr, align 4
+ store i32 %z5, i32* %z5.addr, align 4
+ store i32 %z6, i32* %z6.addr, align 4
+ store i32 %z7, i32* %z7.addr, align 4
+ store i32 %z8, i32* %z8.addr, align 4
%a = getelementptr inbounds %struct.s1* %v1, i32 0, i32 0
%0 = load i8* %a, align 1
%conv = zext i8 %0 to i32
@@ -97,20 +117,13 @@
%add13 = add nsw i32 %add11, %6
ret i32 %add13
-; CHECK: std 9, 96(1)
-; CHECK: std 8, 88(1)
-; CHECK: std 7, 80(1)
-; CHECK: stw 6, 72(1)
-; CHECK: stw 5, 64(1)
-; CHECK: sth 4, 58(1)
-; CHECK: stb 3, 51(1)
-; CHECK: lha {{[0-9]+}}, 58(1)
-; CHECK: lbz {{[0-9]+}}, 51(1)
-; CHECK: lha {{[0-9]+}}, 64(1)
-; CHECK: lwz {{[0-9]+}}, 72(1)
-; CHECK: lwz {{[0-9]+}}, 80(1)
-; CHECK: lwz {{[0-9]+}}, 88(1)
-; CHECK: lwz {{[0-9]+}}, 96(1)
+; CHECK: lha {{[0-9]+}}, 126(1)
+; CHECK: lbz {{[0-9]+}}, 119(1)
+; CHECK: lha {{[0-9]+}}, 132(1)
+; CHECK: lwz {{[0-9]+}}, 140(1)
+; CHECK: lwz {{[0-9]+}}, 144(1)
+; CHECK: lwz {{[0-9]+}}, 152(1)
+; CHECK: lwz {{[0-9]+}}, 160(1)
}
define i32 @caller2() nounwind {
@@ -136,29 +149,41 @@
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast (%struct.t6* @caller2.p6 to i8*), i64 6, i32 1, i1 false)
%6 = bitcast %struct.t7* %p7 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast (%struct.t7* @caller2.p7 to i8*), i64 7, i32 1, i1 false)
- %call = call i32 @callee2(%struct.t1* byval %p1, %struct.t2* byval %p2, %struct.t3* byval %p3, %struct.t4* byval %p4, %struct.t5* byval %p5, %struct.t6* byval %p6, %struct.t7* byval %p7)
+ %call = call i32 @callee2(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, %struct.t1* byval %p1, %struct.t2* byval %p2, %struct.t3* byval %p3, %struct.t4* byval %p4, %struct.t5* byval %p5, %struct.t6* byval %p6, %struct.t7* byval %p7)
ret i32 %call
-; CHECK: stb {{[0-9]+}}, 71(1)
-; CHECK: sth {{[0-9]+}}, 69(1)
-; CHECK: stb {{[0-9]+}}, 87(1)
-; CHECK: stw {{[0-9]+}}, 83(1)
-; CHECK: sth {{[0-9]+}}, 94(1)
-; CHECK: stw {{[0-9]+}}, 90(1)
-; CHECK: stb {{[0-9]+}}, 103(1)
-; CHECK: sth {{[0-9]+}}, 101(1)
-; CHECK: stw {{[0-9]+}}, 97(1)
-; CHECK: ld 9, 96(1)
-; CHECK: ld 8, 88(1)
-; CHECK: ld 7, 80(1)
-; CHECK: lwz 6, 152(31)
-; CHECK: ld 5, 64(1)
-; CHECK: lhz 4, 168(31)
-; CHECK: lbz 3, 176(31)
+; CHECK: stb {{[0-9]+}}, 119(1)
+; CHECK: sth {{[0-9]+}}, 126(1)
+; CHECK: stb {{[0-9]+}}, 135(1)
+; CHECK: sth {{[0-9]+}}, 133(1)
+; CHECK: stw {{[0-9]+}}, 140(1)
+; CHECK: stb {{[0-9]+}}, 151(1)
+; CHECK: stw {{[0-9]+}}, 147(1)
+; CHECK: sth {{[0-9]+}}, 158(1)
+; CHECK: stw {{[0-9]+}}, 154(1)
+; CHECK: stb {{[0-9]+}}, 167(1)
+; CHECK: sth {{[0-9]+}}, 165(1)
+; CHECK: stw {{[0-9]+}}, 161(1)
}
-define internal i32 @callee2(%struct.t1* byval %v1, %struct.t2* byval %v2, %struct.t3* byval %v3, %struct.t4* byval %v4, %struct.t5* byval %v5, %struct.t6* byval %v6, %struct.t7* byval %v7) nounwind {
+define internal i32 @callee2(i32 %z1, i32 %z2, i32 %z3, i32 %z4, i32 %z5, i32 %z6, i32 %z7, i32 %z8, %struct.t1* byval %v1, %struct.t2* byval %v2, %struct.t3* byval %v3, %struct.t4* byval %v4, %struct.t5* byval %v5, %struct.t6* byval %v6, %struct.t7* byval %v7) nounwind {
entry:
+ %z1.addr = alloca i32, align 4
+ %z2.addr = alloca i32, align 4
+ %z3.addr = alloca i32, align 4
+ %z4.addr = alloca i32, align 4
+ %z5.addr = alloca i32, align 4
+ %z6.addr = alloca i32, align 4
+ %z7.addr = alloca i32, align 4
+ %z8.addr = alloca i32, align 4
+ store i32 %z1, i32* %z1.addr, align 4
+ store i32 %z2, i32* %z2.addr, align 4
+ store i32 %z3, i32* %z3.addr, align 4
+ store i32 %z4, i32* %z4.addr, align 4
+ store i32 %z5, i32* %z5.addr, align 4
+ store i32 %z6, i32* %z6.addr, align 4
+ store i32 %z7, i32* %z7.addr, align 4
+ store i32 %z8, i32* %z8.addr, align 4
%a = getelementptr inbounds %struct.t1* %v1, i32 0, i32 0
%0 = load i8* %a, align 1
%conv = zext i8 %0 to i32
@@ -184,22 +209,19 @@
%add13 = add nsw i32 %add11, %6
ret i32 %add13
-; CHECK: sldi 9, 9, 8
-; CHECK: sldi 8, 8, 16
-; CHECK: sldi 7, 7, 24
-; CHECK: sldi 5, 5, 40
-; CHECK: stw 6, 72(1)
-; CHECK: sth 4, 58(1)
-; CHECK: stb 3, 51(1)
-; CHECK: std 9, 96(1)
-; CHECK: std 8, 88(1)
-; CHECK: std 7, 80(1)
-; CHECK: std 5, 64(1)
-; CHECK: lha {{[0-9]+}}, 58(1)
-; CHECK: lbz {{[0-9]+}}, 51(1)
-; CHECK: lha {{[0-9]+}}, 64(1)
-; CHECK: lwz {{[0-9]+}}, 72(1)
-; CHECK: lwz {{[0-9]+}}, 80(1)
-; CHECK: lwz {{[0-9]+}}, 88(1)
-; CHECK: lwz {{[0-9]+}}, 96(1)
+; CHECK: lbz {{[0-9]+}}, 149(1)
+; CHECK: lbz {{[0-9]+}}, 150(1)
+; CHECK: lbz {{[0-9]+}}, 147(1)
+; CHECK: lbz {{[0-9]+}}, 148(1)
+; CHECK: lbz {{[0-9]+}}, 133(1)
+; CHECK: lbz {{[0-9]+}}, 134(1)
+; CHECK: lha {{[0-9]+}}, 126(1)
+; CHECK: lbz {{[0-9]+}}, 119(1)
+; CHECK: lwz {{[0-9]+}}, 140(1)
+; CHECK: lhz {{[0-9]+}}, 154(1)
+; CHECK: lhz {{[0-9]+}}, 156(1)
+; CHECK: lbz {{[0-9]+}}, 163(1)
+; CHECK: lbz {{[0-9]+}}, 164(1)
+; CHECK: lbz {{[0-9]+}}, 161(1)
+; CHECK: lbz {{[0-9]+}}, 162(1)
}
Modified: llvm/branches/R600/test/CodeGen/PowerPC/structsinregs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/PowerPC/structsinregs.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/PowerPC/structsinregs.ll (original)
+++ llvm/branches/R600/test/CodeGen/PowerPC/structsinregs.ll Tue Oct 16 12:52:57 2012
@@ -1,5 +1,9 @@
; RUN: llc -mcpu=pwr7 -O0 -disable-fp-elim < %s | FileCheck %s
+; FIXME: The code generation for packed structs is very poor because the
+; PowerPC target wrongly rejects all unaligned loads. This test case will
+; need to be revised when that is fixed.
+
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
@@ -100,14 +104,14 @@
; CHECK: std 9, 96(1)
; CHECK: std 8, 88(1)
; CHECK: std 7, 80(1)
-; CHECK: stw 6, 72(1)
-; CHECK: stw 5, 64(1)
-; CHECK: sth 4, 58(1)
-; CHECK: stb 3, 51(1)
-; CHECK: lha {{[0-9]+}}, 58(1)
-; CHECK: lbz {{[0-9]+}}, 51(1)
-; CHECK: lha {{[0-9]+}}, 64(1)
-; CHECK: lwz {{[0-9]+}}, 72(1)
+; CHECK: stw 6, 76(1)
+; CHECK: stw 5, 68(1)
+; CHECK: sth 4, 62(1)
+; CHECK: stb 3, 55(1)
+; CHECK: lha {{[0-9]+}}, 62(1)
+; CHECK: lbz {{[0-9]+}}, 55(1)
+; CHECK: lha {{[0-9]+}}, 68(1)
+; CHECK: lwz {{[0-9]+}}, 76(1)
; CHECK: lwz {{[0-9]+}}, 80(1)
; CHECK: lwz {{[0-9]+}}, 88(1)
; CHECK: lwz {{[0-9]+}}, 96(1)
@@ -188,18 +192,26 @@
; CHECK: sldi 8, 8, 16
; CHECK: sldi 7, 7, 24
; CHECK: sldi 5, 5, 40
-; CHECK: stw 6, 72(1)
-; CHECK: sth 4, 58(1)
-; CHECK: stb 3, 51(1)
+; CHECK: stw 6, 76(1)
+; CHECK: sth 4, 62(1)
+; CHECK: stb 3, 55(1)
; CHECK: std 9, 96(1)
; CHECK: std 8, 88(1)
; CHECK: std 7, 80(1)
; CHECK: std 5, 64(1)
-; CHECK: lha {{[0-9]+}}, 58(1)
-; CHECK: lbz {{[0-9]+}}, 51(1)
-; CHECK: lha {{[0-9]+}}, 64(1)
-; CHECK: lwz {{[0-9]+}}, 72(1)
-; CHECK: lwz {{[0-9]+}}, 80(1)
-; CHECK: lwz {{[0-9]+}}, 88(1)
-; CHECK: lwz {{[0-9]+}}, 96(1)
+; CHECK: lbz {{[0-9]+}}, 85(1)
+; CHECK: lbz {{[0-9]+}}, 86(1)
+; CHECK: lbz {{[0-9]+}}, 83(1)
+; CHECK: lbz {{[0-9]+}}, 84(1)
+; CHECK: lbz {{[0-9]+}}, 69(1)
+; CHECK: lbz {{[0-9]+}}, 70(1)
+; CHECK: lha {{[0-9]+}}, 62(1)
+; CHECK: lbz {{[0-9]+}}, 55(1)
+; CHECK: lwz {{[0-9]+}}, 76(1)
+; CHECK: lhz {{[0-9]+}}, 90(1)
+; CHECK: lhz {{[0-9]+}}, 92(1)
+; CHECK: lbz {{[0-9]+}}, 99(1)
+; CHECK: lbz {{[0-9]+}}, 100(1)
+; CHECK: lbz {{[0-9]+}}, 97(1)
+; CHECK: lbz {{[0-9]+}}, 98(1)
}
Added: llvm/branches/R600/test/CodeGen/PowerPC/vrspill.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/PowerPC/vrspill.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/PowerPC/vrspill.ll (added)
+++ llvm/branches/R600/test/CodeGen/PowerPC/vrspill.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,19 @@
+; RUN: llc -O0 -mtriple=powerpc-unknown-linux-gnu -mattr=+altivec -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mattr=+altivec -verify-machineinstrs < %s | FileCheck %s
+
+; This verifies that we generate correct spill/reload code for vector regs.
+
+define void @addrtaken(i32 %i, <4 x float> %w) nounwind {
+entry:
+ %i.addr = alloca i32, align 4
+ %w.addr = alloca <4 x float>, align 16
+ store i32 %i, i32* %i.addr, align 4
+ store <4 x float> %w, <4 x float>* %w.addr, align 16
+ call void @foo(i32* %i.addr)
+ ret void
+}
+
+; CHECK: stvx 2, 0, 0
+; CHECK: lvx 2, 0, 0
+
+declare void @foo(i32*)
Modified: llvm/branches/R600/test/CodeGen/X86/crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/X86/crash.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/X86/crash.ll (original)
+++ llvm/branches/R600/test/CodeGen/X86/crash.ll Tue Oct 16 12:52:57 2012
@@ -477,3 +477,106 @@
}
declare void @fn3(...)
+
+; Check coalescing of IMPLICIT_DEF instructions:
+;
+; %vreg1 = IMPLICIT_DEF
+; %vreg2 = MOV32r0
+;
+; When coalescing %vreg1 and %vreg2, the IMPLICIT_DEF instruction should be
+; erased along with its value number.
+;
+define void @rdar12474033() nounwind ssp {
+bb:
+ br i1 undef, label %bb21, label %bb1
+
+bb1: ; preds = %bb
+ switch i32 undef, label %bb10 [
+ i32 4, label %bb2
+ i32 1, label %bb9
+ i32 5, label %bb3
+ i32 6, label %bb3
+ i32 2, label %bb9
+ ]
+
+bb2: ; preds = %bb1
+ unreachable
+
+bb3: ; preds = %bb1, %bb1
+ br i1 undef, label %bb4, label %bb5
+
+bb4: ; preds = %bb3
+ unreachable
+
+bb5: ; preds = %bb3
+ %tmp = load <4 x float>* undef, align 1
+ %tmp6 = bitcast <4 x float> %tmp to i128
+ %tmp7 = load <4 x float>* undef, align 1
+ %tmp8 = bitcast <4 x float> %tmp7 to i128
+ br label %bb10
+
+bb9: ; preds = %bb1, %bb1
+ unreachable
+
+bb10: ; preds = %bb5, %bb1
+ %tmp11 = phi i128 [ undef, %bb1 ], [ %tmp6, %bb5 ]
+ %tmp12 = phi i128 [ 0, %bb1 ], [ %tmp8, %bb5 ]
+ switch i32 undef, label %bb21 [
+ i32 2, label %bb18
+ i32 3, label %bb13
+ i32 5, label %bb16
+ i32 6, label %bb17
+ i32 1, label %bb18
+ ]
+
+bb13: ; preds = %bb10
+ br i1 undef, label %bb15, label %bb14
+
+bb14: ; preds = %bb13
+ br label %bb21
+
+bb15: ; preds = %bb13
+ unreachable
+
+bb16: ; preds = %bb10
+ unreachable
+
+bb17: ; preds = %bb10
+ unreachable
+
+bb18: ; preds = %bb10, %bb10
+ %tmp19 = bitcast i128 %tmp11 to <4 x float>
+ %tmp20 = bitcast i128 %tmp12 to <4 x float>
+ br label %bb21
+
+bb21: ; preds = %bb18, %bb14, %bb10, %bb
+ %tmp22 = phi <4 x float> [ undef, %bb ], [ undef, %bb10 ], [ undef, %bb14 ], [ %tmp20, %bb18 ]
+ %tmp23 = phi <4 x float> [ undef, %bb ], [ undef, %bb10 ], [ undef, %bb14 ], [ %tmp19, %bb18 ]
+ store <4 x float> %tmp23, <4 x float>* undef, align 16
+ store <4 x float> %tmp22, <4 x float>* undef, align 16
+ switch i32 undef, label %bb29 [
+ i32 5, label %bb27
+ i32 1, label %bb24
+ i32 2, label %bb25
+ i32 14, label %bb28
+ i32 4, label %bb26
+ ]
+
+bb24: ; preds = %bb21
+ unreachable
+
+bb25: ; preds = %bb21
+ br label %bb29
+
+bb26: ; preds = %bb21
+ br label %bb29
+
+bb27: ; preds = %bb21
+ unreachable
+
+bb28: ; preds = %bb21
+ br label %bb29
+
+bb29: ; preds = %bb28, %bb26, %bb25, %bb21
+ unreachable
+}
Added: llvm/branches/R600/test/CodeGen/X86/early-ifcvt-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/X86/early-ifcvt-crash.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/X86/early-ifcvt-crash.ll (added)
+++ llvm/branches/R600/test/CodeGen/X86/early-ifcvt-crash.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,32 @@
+; RUN: llc < %s -x86-early-ifcvt -verify-machineinstrs
+; RUN: llc < %s -x86-early-ifcvt -stress-early-ifcvt -verify-machineinstrs
+;
+; Run these tests with and without -stress-early-ifcvt to exercise heuristics.
+;
+target triple = "x86_64-apple-macosx10.8.0"
+
+; MachineTraceMetrics::Ensemble::addLiveIns crashes because the first operand
+; on an inline asm instruction is not a vreg def.
+; <rdar://problem/12472811>
+define void @f1() nounwind {
+entry:
+ br i1 undef, label %if.then6.i, label %if.end.i
+
+if.then6.i:
+ br label %if.end.i
+
+if.end.i:
+ br i1 undef, label %if.end25.i, label %if.else17.i
+
+if.else17.i:
+ %shl24.i = shl i32 undef, undef
+ br label %if.end25.i
+
+if.end25.i:
+ %storemerge31.i = phi i32 [ %shl24.i, %if.else17.i ], [ 0, %if.end.i ]
+ store i32 %storemerge31.i, i32* undef, align 4
+ %0 = tail call i32 asm sideeffect "", "=r,r,i,i"(i32 undef, i32 15, i32 1) nounwind
+ %conv = trunc i32 %0 to i8
+ store i8 %conv, i8* undef, align 1
+ unreachable
+}
Added: llvm/branches/R600/test/CodeGen/X86/fp-load-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/X86/fp-load-trunc.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/X86/fp-load-trunc.ll (added)
+++ llvm/branches/R600/test/CodeGen/X86/fp-load-trunc.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,61 @@
+; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -march=x86 -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
+
+define <1 x float> @test1(<1 x double>* %p) nounwind {
+; CHECK: test1
+; CHECK: cvtsd2ss
+; CHECK: ret
+; AVX: test1
+; AVX: vcvtsd2ss
+; AVX: ret
+ %x = load <1 x double>* %p
+ %y = fptrunc <1 x double> %x to <1 x float>
+ ret <1 x float> %y
+}
+
+define <2 x float> @test2(<2 x double>* %p) nounwind {
+; CHECK: test2
+; CHECK: cvtpd2ps {{[0-9]*}}(%{{.*}})
+; CHECK: ret
+; AVX: test2
+; AVX: vcvtpd2psx {{[0-9]*}}(%{{.*}})
+; AVX: ret
+ %x = load <2 x double>* %p
+ %y = fptrunc <2 x double> %x to <2 x float>
+ ret <2 x float> %y
+}
+
+define <4 x float> @test3(<4 x double>* %p) nounwind {
+; CHECK: test3
+; CHECK: cvtpd2ps {{[0-9]*}}(%{{.*}})
+; CHECK: cvtpd2ps {{[0-9]*}}(%{{.*}})
+; CHECK: movlhps
+; CHECK: ret
+; AVX: test3
+; AVX: vcvtpd2psy {{[0-9]*}}(%{{.*}})
+; AVX: ret
+ %x = load <4 x double>* %p
+ %y = fptrunc <4 x double> %x to <4 x float>
+ ret <4 x float> %y
+}
+
+define <8 x float> @test4(<8 x double>* %p) nounwind {
+; CHECK: test4
+; CHECK: cvtpd2ps {{[0-9]*}}(%{{.*}})
+; CHECK: cvtpd2ps {{[0-9]*}}(%{{.*}})
+; CHECK: movlhps
+; CHECK: cvtpd2ps {{[0-9]*}}(%{{.*}})
+; CHECK: cvtpd2ps {{[0-9]*}}(%{{.*}})
+; CHECK: movlhps
+; CHECK: ret
+; AVX: test4
+; AVX: vcvtpd2psy {{[0-9]*}}(%{{.*}})
+; AVX: vcvtpd2psy {{[0-9]*}}(%{{.*}})
+; AVX: vinsertf128
+; AVX: ret
+ %x = load <8 x double>* %p
+ %y = fptrunc <8 x double> %x to <8 x float>
+ ret <8 x float> %y
+}
+
+
Modified: llvm/branches/R600/test/CodeGen/X86/fp-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/X86/fp-trunc.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/X86/fp-trunc.ll (original)
+++ llvm/branches/R600/test/CodeGen/X86/fp-trunc.ll Tue Oct 16 12:52:57 2012
@@ -1,33 +1,56 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2,-avx | FileCheck %s
+; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s
+; RUN: llc < %s -march=x86 -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
define <1 x float> @test1(<1 x double> %x) nounwind {
+; CHECK: test1
; CHECK: cvtsd2ss
; CHECK: ret
+; AVX: test1
+; AVX: vcvtsd2ss
+; AVX: ret
%y = fptrunc <1 x double> %x to <1 x float>
ret <1 x float> %y
}
-
define <2 x float> @test2(<2 x double> %x) nounwind {
-; FIXME: It would be nice if this compiled down to a cvtpd2ps
-; CHECK: cvtsd2ss
-; CHECK: cvtsd2ss
+; CHECK: test2
+; CHECK: cvtpd2ps
; CHECK: ret
+; AVX: test2
+; AVX-NOT: vcvtpd2psy
+; AVX: vcvtpd2ps
+; AVX: ret
%y = fptrunc <2 x double> %x to <2 x float>
ret <2 x float> %y
}
-define <8 x float> @test3(<8 x double> %x) nounwind {
-; FIXME: It would be nice if this compiled down to a series of cvtpd2ps
-; CHECK: cvtsd2ss
-; CHECK: cvtsd2ss
-; CHECK: cvtsd2ss
-; CHECK: cvtsd2ss
-; CHECK: cvtsd2ss
-; CHECK: cvtsd2ss
-; CHECK: cvtsd2ss
-; CHECK: cvtsd2ss
+define <4 x float> @test3(<4 x double> %x) nounwind {
+; CHECK: test3
+; CHECK: cvtpd2ps
+; CHECK: cvtpd2ps
+; CHECK: movlhps
+; CHECK: ret
+; AVX: test3
+; AVX: vcvtpd2psy
+; AVX: ret
+ %y = fptrunc <4 x double> %x to <4 x float>
+ ret <4 x float> %y
+}
+
+define <8 x float> @test4(<8 x double> %x) nounwind {
+; CHECK: test4
+; CHECK: cvtpd2ps
+; CHECK: cvtpd2ps
+; CHECK: movlhps
+; CHECK: cvtpd2ps
+; CHECK: cvtpd2ps
+; CHECK: movlhps
; CHECK: ret
+; AVX: test4
+; AVX: vcvtpd2psy
+; AVX: vcvtpd2psy
+; AVX: vinsertf128
+; AVX: ret
%y = fptrunc <8 x double> %x to <8 x float>
ret <8 x float> %y
}
Added: llvm/branches/R600/test/CodeGen/X86/handle-move.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/X86/handle-move.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/X86/handle-move.ll (added)
+++ llvm/branches/R600/test/CodeGen/X86/handle-move.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,74 @@
+; RUN: llc -march=x86-64 -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-bottomup -verify-machineinstrs < %s
+; RUN: llc -march=x86-64 -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-topdown -verify-machineinstrs < %s
+; REQUIRES: asserts
+;
+; Test the LiveIntervals::handleMove() function.
+;
+; Moving the DIV32r instruction exercises the regunit update code because
+; %EDX has a live range into the function and is used by the DIV32r.
+;
+; Here sinking a kill + dead def:
+; 144B -> 180B: DIV32r %vreg4, %EAX<imp-def>, %EDX<imp-def,dead>, %EFLAGS<imp-def,dead>, %EAX<imp-use,kill>, %EDX<imp-use>
+; %vreg4: [48r,144r:0) 0 at 48r
+; --> [48r,180r:0) 0 at 48r
+; DH: [0B,16r:0)[128r,144r:2)[144r,144d:1) 0 at 0B-phi 1 at 144r 2 at 128r
+; --> [0B,16r:0)[128r,180r:2)[180r,180d:1) 0 at 0B-phi 1 at 180r 2 at 128r
+; DL: [0B,16r:0)[128r,144r:2)[144r,144d:1) 0 at 0B-phi 1 at 144r 2 at 128r
+; --> [0B,16r:0)[128r,180r:2)[180r,180d:1) 0 at 0B-phi 1 at 180r 2 at 128r
+;
+define i32 @f1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind uwtable readnone ssp {
+entry:
+ %y = add i32 %c, 1
+ %x = udiv i32 %b, %a
+ %add = add nsw i32 %y, %x
+ ret i32 %add
+}
+
+; Same as above, but moving a kill + live def:
+; 144B -> 180B: DIV32r %vreg4, %EAX<imp-def,dead>, %EDX<imp-def>, %EFLAGS<imp-def,dead>, %EAX<imp-use,kill>, %EDX<imp-use>
+; %vreg4: [48r,144r:0) 0 at 48r
+; --> [48r,180r:0) 0 at 48r
+; DH: [0B,16r:0)[128r,144r:2)[144r,184r:1) 0 at 0B-phi 1 at 144r 2 at 128r
+; --> [0B,16r:0)[128r,180r:2)[180r,184r:1) 0 at 0B-phi 1 at 180r 2 at 128r
+; DL: [0B,16r:0)[128r,144r:2)[144r,184r:1) 0 at 0B-phi 1 at 144r 2 at 128r
+; --> [0B,16r:0)[128r,180r:2)[180r,184r:1) 0 at 0B-phi 1 at 180r 2 at 128r
+;
+define i32 @f2(i32 %a, i32 %b, i32 %c, i32 %d) nounwind uwtable readnone ssp {
+entry:
+ %y = sub i32 %c, %d
+ %x = urem i32 %b, %a
+ %add = add nsw i32 %x, %y
+ ret i32 %add
+}
+
+; Moving a use below the existing kill (%vreg5):
+; Moving a tied virtual register def (%vreg11):
+;
+; 96B -> 120B: %vreg11<def,tied1> = SUB32rr %vreg11<tied0>, %vreg5
+; %vreg11: [80r,96r:1)[96r,144r:0) 0 at 96r 1 at 80r
+; --> [80r,120r:1)[120r,144r:0) 0 at 120r 1 at 80r
+; %vreg5: [16r,112r:0) 0 at 16r
+; --> [16r,120r:0) 0 at 16r
+;
+define i32 @f3(i32 %a, i32 %b, i32 %c, i32 %d) nounwind uwtable readnone ssp {
+entry:
+ %y = sub i32 %a, %b
+ %x = add i32 %a, %b
+ %r = mul i32 %x, %y
+ ret i32 %r
+}
+
+; Move EFLAGS dead def across another def:
+; handleMove 208B -> 36B: %EDX<def> = MOV32r0 %EFLAGS<imp-def,dead>
+; EFLAGS: [20r,20d:4)[160r,160d:3)[208r,208d:0)[224r,224d:1)[272r,272d:2)[304r,304d:5) 0 at 208r 1 at 224r 2 at 272r 3 at 160r 4 at 20r 5 at 304r
+; --> [20r,20d:4)[36r,36d:0)[160r,160d:3)[224r,224d:1)[272r,272d:2)[304r,304d:5) 0 at 36r 1 at 224r 2 at 272r 3 at 160r 4 at 20r 5 at 304r
+;
+define i32 @f4(i32 %a, i32 %b, i32 %c, i32 %d) nounwind uwtable readnone ssp {
+entry:
+ %x = sub i32 %a, %b
+ %y = sub i32 %b, %c
+ %z = sub i32 %c, %d
+ %r1 = udiv i32 %x, %y
+ %r2 = mul i32 %z, %r1
+ ret i32 %r2
+}
Added: llvm/branches/R600/test/CodeGen/X86/misched-ilp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/X86/misched-ilp.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/X86/misched-ilp.ll (added)
+++ llvm/branches/R600/test/CodeGen/X86/misched-ilp.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,25 @@
+; RUN: llc < %s -mtriple=x86_64-apple-macosx -mcpu=core2 -enable-misched -misched=ilpmax | FileCheck -check-prefix=MAX %s
+; RUN: llc < %s -mtriple=x86_64-apple-macosx -mcpu=core2 -enable-misched -misched=ilpmin | FileCheck -check-prefix=MIN %s
+;
+; Basic verification of the ScheduleDAGILP metric.
+;
+; MAX: addss
+; MAX: addss
+; MAX: addss
+; MAX: subss
+; MAX: addss
+;
+; MIN: addss
+; MIN: addss
+; MIN: subss
+; MIN: addss
+; MIN: addss
+define float @ilpsched(float %a, float %b, float %c, float %d, float %e, float %f) nounwind uwtable readnone ssp {
+entry:
+ %add = fadd float %a, %b
+ %add1 = fadd float %c, %d
+ %add2 = fadd float %e, %f
+ %add3 = fsub float %add1, %add2
+ %add4 = fadd float %add, %add3
+ ret float %add4
+}
Modified: llvm/branches/R600/test/CodeGen/X86/misched-new.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/X86/misched-new.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/X86/misched-new.ll (original)
+++ llvm/branches/R600/test/CodeGen/X86/misched-new.ll Tue Oct 16 12:52:57 2012
@@ -1,4 +1,6 @@
-; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup < %s
+; RUN: llc < %s -march=x86-64 -mcpu=core2 -x86-early-ifcvt -enable-misched \
+; RUN: -misched=shuffle -misched-bottomup -verify-machineinstrs \
+; RUN: | FileCheck %s
; REQUIRES: asserts
;
; Interesting MachineScheduler cases.
@@ -25,3 +27,27 @@
if.end: ; preds = %entry
ret void
}
+
+; The machine verifier checks that EFLAGS kill flags are updated when
+; the scheduler reorders cmovel instructions.
+;
+; CHECK: test
+; CHECK: cmovel
+; CHECK: cmovel
+; CHECK: call
+define void @foo(i32 %b) nounwind uwtable ssp {
+entry:
+ %tobool = icmp ne i32 %b, 0
+ br i1 %tobool, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ br label %if.end
+
+if.end: ; preds = %if.then, %entry
+ %v1 = phi i32 [1, %entry], [2, %if.then]
+ %v2 = phi i32 [3, %entry], [4, %if.then]
+ call void @bar(i32 %v1, i32 %v2)
+ ret void
+}
+
+declare void @bar(i32,i32)
Added: llvm/branches/R600/test/CodeGen/X86/pr14088.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/X86/pr14088.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/X86/pr14088.ll (added)
+++ llvm/branches/R600/test/CodeGen/X86/pr14088.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,25 @@
+; RUN: llc -mtriple x86_64-linux -mcpu core2 -verify-machineinstrs %s -o - | FileCheck %s
+define i32 @f(i1 %foo, i16* %tm_year2, i8* %bar, i16 %zed, i32 %zed2) {
+entry:
+ br i1 %foo, label %return, label %if.end
+
+if.end:
+ %rem = srem i32 %zed2, 100
+ %conv3 = trunc i32 %rem to i16
+ store i16 %conv3, i16* %tm_year2
+ %sext = shl i32 %rem, 16
+ %conv5 = ashr exact i32 %sext, 16
+ %div = sdiv i32 %conv5, 10
+ %conv6 = trunc i32 %div to i8
+ store i8 %conv6, i8* %bar
+ br label %return
+
+return:
+ %retval.0 = phi i32 [ 0, %if.end ], [ -1, %entry ]
+ ret i32 %retval.0
+}
+
+; We were miscompiling this and using %ax instead of %cx in the movw.
+; CHECK: movswl %cx, %ecx
+; CHECK: movw %cx, (%rsi)
+; CHECK: movslq %ecx, %rcx
Modified: llvm/branches/R600/test/CodeGen/X86/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/X86/select.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/X86/select.ll (original)
+++ llvm/branches/R600/test/CodeGen/X86/select.ll Tue Oct 16 12:52:57 2012
@@ -344,3 +344,16 @@
; ATOM: negw
; ATOM: sbbw
}
+
+define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind {
+ %cmp = icmp slt i32 %x, 15
+ %sel = select i1 %cmp, i8 %a, i8 %b
+ ret i8 %sel
+; CHECK: test18:
+; CHECK: cmpl $15, %edi
+; CHECK: cmovgel %edx
+
+; ATOM: test18:
+; ATOM: cmpl $15, %edi
+; ATOM: cmovgel %edx
+}
Added: llvm/branches/R600/test/CodeGen/X86/select_const.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/X86/select_const.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/X86/select_const.ll (added)
+++ llvm/branches/R600/test/CodeGen/X86/select_const.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,16 @@
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=corei7 | FileCheck %s
+
+define i64 @test1(i64 %x) nounwind {
+entry:
+ %cmp = icmp eq i64 %x, 2
+ %add = add i64 %x, 1
+ %retval.0 = select i1 %cmp, i64 2, i64 %add
+ ret i64 %retval.0
+
+; CHECK: test1:
+; CHECK: leaq 1(%rdi), %rax
+; CHECK: cmpq $2, %rdi
+; CHECK: cmoveq %rdi, %rax
+; CHECK: ret
+
+}
Added: llvm/branches/R600/test/CodeGen/X86/sjlj.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/X86/sjlj.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/X86/sjlj.ll (added)
+++ llvm/branches/R600/test/CodeGen/X86/sjlj.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,46 @@
+; RUN: llc < %s -mtriple=i386-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X86 %s
+; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7 | FileCheck --check-prefix=X64 %s
+
+ at buf = internal global [5 x i8*] zeroinitializer
+
+declare i8* @llvm.frameaddress(i32) nounwind readnone
+
+declare i8* @llvm.stacksave() nounwind
+
+declare i32 @llvm.eh.sjlj.setjmp(i8*) nounwind
+
+declare void @llvm.eh.sjlj.longjmp(i8*) nounwind
+
+define i32 @sj0() nounwind {
+ %fp = tail call i8* @llvm.frameaddress(i32 0)
+ store i8* %fp, i8** getelementptr inbounds ([5 x i8*]* @buf, i64 0, i64 0), align 16
+ %sp = tail call i8* @llvm.stacksave()
+ store i8* %sp, i8** getelementptr inbounds ([5 x i8*]* @buf, i64 0, i64 2), align 16
+ %r = tail call i32 @llvm.eh.sjlj.setjmp(i8* bitcast ([5 x i8*]* @buf to i8*))
+ ret i32 %r
+; X86: sj0
+; x86: movl %ebp, buf
+; x86: movl ${{.*LBB.*}}, buf+4
+; X86: movl %esp, buf+8
+; X86: ret
+; X64: sj0
+; x64: movq %rbp, buf(%rip)
+; x64: movq ${{.*LBB.*}}, buf+8(%rip)
+; X64: movq %rsp, buf+16(%rip)
+; X64: ret
+}
+
+define void @lj0() nounwind {
+ tail call void @llvm.eh.sjlj.longjmp(i8* bitcast ([5 x i8*]* @buf to i8*))
+ unreachable
+; X86: lj0
+; X86: movl buf, %ebp
+; X86: movl buf+4, %[[REG32:.*]]
+; X86: movl buf+8, %esp
+; X86: jmpl *%[[REG32]]
+; X64: lj0
+; X64: movq buf(%rip), %rbp
+; X64: movq buf+8(%rip), %[[REG64:.*]]
+; X64: movq buf+16(%rip), %rsp
+; X64: jmpq *%[[REG64]]
+}
Modified: llvm/branches/R600/test/Instrumentation/AddressSanitizer/instrument_global.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Instrumentation/AddressSanitizer/instrument_global.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/Instrumentation/AddressSanitizer/instrument_global.ll (original)
+++ llvm/branches/R600/test/Instrumentation/AddressSanitizer/instrument_global.ll Tue Oct 16 12:52:57 2012
@@ -6,8 +6,8 @@
; If a global is present, __asan_[un]register_globals should be called from
; module ctor/dtor
-; CHECK: llvm.global_dtors
; CHECK: llvm.global_ctors
+; CHECK: llvm.global_dtors
; CHECK: define internal void @asan.module_ctor
; CHECK-NOT: ret
Added: llvm/branches/R600/test/MC/Mips/mips-coprocessor-encodings.s
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/MC/Mips/mips-coprocessor-encodings.s?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/MC/Mips/mips-coprocessor-encodings.s (added)
+++ llvm/branches/R600/test/MC/Mips/mips-coprocessor-encodings.s Tue Oct 16 12:52:57 2012
@@ -0,0 +1,37 @@
+# RUN: llvm-mc %s -triple=mips64-unknown-freebsd -show-encoding | FileCheck --check-prefix=MIPS64 %s
+
+# MIPS64: dmtc0 $12, $16, 2 # encoding: [0x40,0xac,0x80,0x02]
+# MIPS64: dmtc0 $12, $16, 0 # encoding: [0x40,0xac,0x80,0x00]
+# MIPS64: mtc0 $12, $16, 2 # encoding: [0x40,0x8c,0x80,0x02]
+# MIPS64: mtc0 $12, $16, 0 # encoding: [0x40,0x8c,0x80,0x00]
+# MIPS64: dmfc0 $12, $16, 2 # encoding: [0x40,0x2c,0x80,0x02]
+# MIPS64: dmfc0 $12, $16, 0 # encoding: [0x40,0x2c,0x80,0x00]
+# MIPS64: mfc0 $12, $16, 2 # encoding: [0x40,0x0c,0x80,0x02]
+# MIPS64: mfc0 $12, $16, 0 # encoding: [0x40,0x0c,0x80,0x00]
+
+ dmtc0 $12, $16, 2
+ dmtc0 $12, $16
+ mtc0 $12, $16, 2
+ mtc0 $12, $16
+ dmfc0 $12, $16, 2
+ dmfc0 $12, $16
+ mfc0 $12, $16, 2
+ mfc0 $12, $16
+
+# MIPS64: dmtc2 $12, $16, 2 # encoding: [0x48,0xac,0x80,0x02]
+# MIPS64: dmtc2 $12, $16, 0 # encoding: [0x48,0xac,0x80,0x00]
+# MIPS64: mtc2 $12, $16, 2 # encoding: [0x48,0x8c,0x80,0x02]
+# MIPS64: mtc2 $12, $16, 0 # encoding: [0x48,0x8c,0x80,0x00]
+# MIPS64: dmfc2 $12, $16, 2 # encoding: [0x48,0x2c,0x80,0x02]
+# MIPS64: dmfc2 $12, $16, 0 # encoding: [0x48,0x2c,0x80,0x00]
+# MIPS64: mfc2 $12, $16, 2 # encoding: [0x48,0x0c,0x80,0x02]
+# MIPS64: mfc2 $12, $16, 0 # encoding: [0x48,0x0c,0x80,0x00]
+
+ dmtc2 $12, $16, 2
+ dmtc2 $12, $16
+ mtc2 $12, $16, 2
+ mtc2 $12, $16
+ dmfc2 $12, $16, 2
+ dmfc2 $12, $16
+ mfc2 $12, $16, 2
+ mfc2 $12, $16
Added: llvm/branches/R600/test/MC/Mips/mips-register-names.s
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/MC/Mips/mips-register-names.s?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/MC/Mips/mips-register-names.s (added)
+++ llvm/branches/R600/test/MC/Mips/mips-register-names.s Tue Oct 16 12:52:57 2012
@@ -0,0 +1,71 @@
+# RUN: llvm-mc %s -triple=mips-unknown-freebsd -show-encoding | FileCheck %s
+
+# Check that the register names are mapped to their correct numbers for o32
+# Second byte of addiu with $zero at rt contains the number of the source
+# register.
+
+# CHECK: encoding: [0x24,0x00,0x00,0x00]
+# CHECK: encoding: [0x24,0x01,0x00,0x00]
+# CHECK: encoding: [0x24,0x02,0x00,0x00]
+# CHECK: encoding: [0x24,0x03,0x00,0x00]
+# CHECK: encoding: [0x24,0x04,0x00,0x00]
+# CHECK: encoding: [0x24,0x05,0x00,0x00]
+# CHECK: encoding: [0x24,0x06,0x00,0x00]
+# CHECK: encoding: [0x24,0x07,0x00,0x00]
+# CHECK: encoding: [0x24,0x08,0x00,0x00]
+# CHECK: encoding: [0x24,0x09,0x00,0x00]
+# CHECK: encoding: [0x24,0x0a,0x00,0x00]
+# CHECK: encoding: [0x24,0x0b,0x00,0x00]
+# CHECK: encoding: [0x24,0x0c,0x00,0x00]
+# CHECK: encoding: [0x24,0x0d,0x00,0x00]
+# CHECK: encoding: [0x24,0x0e,0x00,0x00]
+# CHECK: encoding: [0x24,0x0f,0x00,0x00]
+# CHECK: encoding: [0x24,0x10,0x00,0x00]
+# CHECK: encoding: [0x24,0x11,0x00,0x00]
+# CHECK: encoding: [0x24,0x12,0x00,0x00]
+# CHECK: encoding: [0x24,0x13,0x00,0x00]
+# CHECK: encoding: [0x24,0x14,0x00,0x00]
+# CHECK: encoding: [0x24,0x15,0x00,0x00]
+# CHECK: encoding: [0x24,0x16,0x00,0x00]
+# CHECK: encoding: [0x24,0x17,0x00,0x00]
+# CHECK: encoding: [0x24,0x18,0x00,0x00]
+# CHECK: encoding: [0x24,0x19,0x00,0x00]
+# CHECK: encoding: [0x24,0x1a,0x00,0x00]
+# CHECK: encoding: [0x24,0x1b,0x00,0x00]
+# CHECK: encoding: [0x24,0x1c,0x00,0x00]
+# CHECK: encoding: [0x24,0x1d,0x00,0x00]
+# CHECK: encoding: [0x24,0x1e,0x00,0x00]
+# CHECK: encoding: [0x24,0x1f,0x00,0x00]
+addiu $zero, $zero, 0
+addiu $at, $zero, 0
+addiu $v0, $zero, 0
+addiu $v1, $zero, 0
+addiu $a0, $zero, 0
+addiu $a1, $zero, 0
+addiu $a2, $zero, 0
+addiu $a3, $zero, 0
+addiu $t0, $zero, 0
+addiu $t1, $zero, 0
+addiu $t2, $zero, 0
+addiu $t3, $zero, 0
+addiu $t4, $zero, 0
+addiu $t5, $zero, 0
+addiu $t6, $zero, 0
+addiu $t7, $zero, 0
+addiu $s0, $zero, 0
+addiu $s1, $zero, 0
+addiu $s2, $zero, 0
+addiu $s3, $zero, 0
+addiu $s4, $zero, 0
+addiu $s5, $zero, 0
+addiu $s6, $zero, 0
+addiu $s7, $zero, 0
+addiu $t8, $zero, 0
+addiu $t9, $zero, 0
+addiu $k0, $zero, 0
+addiu $k1, $zero, 0
+addiu $gp, $zero, 0
+addiu $sp, $zero, 0
+addiu $fp, $zero, 0
+addiu $sp, $zero, 0
+addiu $ra, $zero, 0
Added: llvm/branches/R600/test/MC/Mips/mips64-register-names.s
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/MC/Mips/mips64-register-names.s?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/MC/Mips/mips64-register-names.s (added)
+++ llvm/branches/R600/test/MC/Mips/mips64-register-names.s Tue Oct 16 12:52:57 2012
@@ -0,0 +1,70 @@
+# RUN: llvm-mc %s -triple=mips64-unknown-freebsd -show-encoding | FileCheck %s
+
+# Check that the register names are mapped to their correct numbers for n64
+# Second byte of addiu with $zero at rt contains the number of the source
+# register.
+
+# CHECK: encoding: [0x64,0x00,0x00,0x00]
+# CHECK: encoding: [0x64,0x01,0x00,0x00]
+# CHECK: encoding: [0x64,0x02,0x00,0x00]
+# CHECK: encoding: [0x64,0x03,0x00,0x00]
+# CHECK: encoding: [0x64,0x04,0x00,0x00]
+# CHECK: encoding: [0x64,0x05,0x00,0x00]
+# CHECK: encoding: [0x64,0x06,0x00,0x00]
+# CHECK: encoding: [0x64,0x07,0x00,0x00]
+# CHECK: encoding: [0x64,0x08,0x00,0x00]
+# CHECK: encoding: [0x64,0x09,0x00,0x00]
+# CHECK: encoding: [0x64,0x0a,0x00,0x00]
+# CHECK: encoding: [0x64,0x0b,0x00,0x00]
+# CHECK: encoding: [0x64,0x0c,0x00,0x00]
+# CHECK: encoding: [0x64,0x0d,0x00,0x00]
+# CHECK: encoding: [0x64,0x0e,0x00,0x00]
+# CHECK: encoding: [0x64,0x0f,0x00,0x00]
+# CHECK: encoding: [0x64,0x10,0x00,0x00]
+# CHECK: encoding: [0x64,0x11,0x00,0x00]
+# CHECK: encoding: [0x64,0x12,0x00,0x00]
+# CHECK: encoding: [0x64,0x13,0x00,0x00]
+# CHECK: encoding: [0x64,0x14,0x00,0x00]
+# CHECK: encoding: [0x64,0x15,0x00,0x00]
+# CHECK: encoding: [0x64,0x16,0x00,0x00]
+# CHECK: encoding: [0x64,0x17,0x00,0x00]
+# CHECK: encoding: [0x64,0x18,0x00,0x00]
+# CHECK: encoding: [0x64,0x19,0x00,0x00]
+# CHECK: encoding: [0x64,0x1a,0x00,0x00]
+# CHECK: encoding: [0x64,0x1b,0x00,0x00]
+# CHECK: encoding: [0x64,0x1c,0x00,0x00]
+# CHECK: encoding: [0x64,0x1d,0x00,0x00]
+# CHECK: encoding: [0x64,0x1e,0x00,0x00]
+# CHECK: encoding: [0x64,0x1f,0x00,0x00]
+daddiu $zero, $zero, 0
+daddiu $at, $zero, 0
+daddiu $v0, $zero, 0
+daddiu $v1, $zero, 0
+daddiu $a0, $zero, 0
+daddiu $a1, $zero, 0
+daddiu $a2, $zero, 0
+daddiu $a3, $zero, 0
+daddiu $a4, $zero, 0
+daddiu $a5, $zero, 0
+daddiu $a6, $zero, 0
+daddiu $a7, $zero, 0
+daddiu $t4, $zero, 0
+daddiu $t5, $zero, 0
+daddiu $t6, $zero, 0
+daddiu $t7, $zero, 0
+daddiu $s0, $zero, 0
+daddiu $s1, $zero, 0
+daddiu $s2, $zero, 0
+daddiu $s3, $zero, 0
+daddiu $s4, $zero, 0
+daddiu $s5, $zero, 0
+daddiu $s6, $zero, 0
+daddiu $s7, $zero, 0
+daddiu $t8, $zero, 0
+daddiu $t9, $zero, 0
+daddiu $kt0, $zero, 0
+daddiu $kt1, $zero, 0
+daddiu $gp, $zero, 0
+daddiu $sp, $zero, 0
+daddiu $s8, $zero, 0
+daddiu $ra, $zero, 0
Modified: llvm/branches/R600/test/MC/X86/x86_nop.s
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/MC/X86/x86_nop.s?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/MC/X86/x86_nop.s (original)
+++ llvm/branches/R600/test/MC/X86/x86_nop.s Tue Oct 16 12:52:57 2012
@@ -1,7 +1,13 @@
-# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=geode %s -o %t
-# RUN: llvm-objdump -disassemble %t | FileCheck %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=generic %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=i386 %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=i486 %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=i586 %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=pentium %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=pentium-mmx %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=geode %s | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -mcpu=i686 %s | llvm-objdump -d - | not FileCheck %s
-# CHECK-NOT: nopw
+# CHECK-NOT: nop{{[lw]}}
inc %eax
.align 8
inc %eax
Added: llvm/branches/R600/test/Transforms/InstCombine/strcat-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strcat-1.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strcat-1.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strcat-1.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,38 @@
+; Test that the strcat libcall simplifier works correctly per the
+; bug found in PR3661.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [6 x i8] c"hello\00"
+ at null = constant [1 x i8] zeroinitializer
+ at null_hello = constant [7 x i8] c"\00hello\00"
+
+declare i8* @strcat(i8*, i8*)
+declare i32 @puts(i8*)
+
+define i32 @main() {
+; CHECK: @main
+; CHECK-NOT: call i8* @strcat
+; CHECK: call i32 @puts
+
+ %target = alloca [1024 x i8]
+ %arg1 = getelementptr [1024 x i8]* %target, i32 0, i32 0
+ store i8 0, i8* %arg1
+
+ ; rslt1 = strcat(target, "hello\00")
+ %arg2 = getelementptr [6 x i8]* @hello, i32 0, i32 0
+ %rslt1 = call i8* @strcat(i8* %arg1, i8* %arg2)
+
+ ; rslt2 = strcat(rslt1, "\00")
+ %arg3 = getelementptr [1 x i8]* @null, i32 0, i32 0
+ %rslt2 = call i8* @strcat(i8* %rslt1, i8* %arg3)
+
+ ; rslt3 = strcat(rslt2, "\00hello\00")
+ %arg4 = getelementptr [7 x i8]* @null_hello, i32 0, i32 0
+ %rslt3 = call i8* @strcat(i8* %rslt2, i8* %arg4)
+
+ call i32 @puts( i8* %rslt3 )
+ ret i32 0
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strcat-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strcat-2.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strcat-2.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strcat-2.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,32 @@
+; Test that the strcat libcall simplifier works correctly.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [6 x i8] c"hello\00"
+ at empty = constant [1 x i8] c"\00"
+ at a = common global [32 x i8] zeroinitializer, align 1
+
+declare i8* @strcat(i8*, i8*)
+
+define void @test_simplify1() {
+; CHECK: @test_simplify1
+; CHECK-NOT: call i8* @strcat
+; CHECK: ret void
+
+ %dst = getelementptr [32 x i8]* @a, i32 0, i32 0
+ %src = getelementptr [6 x i8]* @hello, i32 0, i32 0
+ call i8* @strcat(i8* %dst, i8* %src)
+ ret void
+}
+
+define void @test_simplify2() {
+; CHECK: @test_simplify2
+; CHECK-NEXT: ret void
+
+ %dst = getelementptr [32 x i8]* @a, i32 0, i32 0
+ %src = getelementptr [1 x i8]* @empty, i32 0, i32 0
+ call i8* @strcat(i8* %dst, i8* %src)
+ ret void
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strcat-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strcat-3.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strcat-3.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strcat-3.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,22 @@
+; Test that the strcat libcall simplifier works correctly.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [6 x i8] c"hello\00"
+ at empty = constant [1 x i8] c"\00"
+ at a = common global [32 x i8] zeroinitializer, align 1
+
+declare i16* @strcat(i8*, i8*)
+
+define void @test_nosimplify1() {
+; CHECK: @test_nosimplify1
+; CHECK: call i16* @strcat
+; CHECK: ret void
+
+ %dst = getelementptr [32 x i8]* @a, i32 0, i32 0
+ %src = getelementptr [6 x i8]* @hello, i32 0, i32 0
+ call i16* @strcat(i8* %dst, i8* %src)
+ ret void
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strchr-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strchr-1.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strchr-1.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strchr-1.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,54 @@
+; Test that the strchr library call simplifier works correctly.
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [14 x i8] c"hello world\5Cn\00"
+ at null = constant [1 x i8] zeroinitializer
+ at chp = global i8* zeroinitializer
+
+declare i8* @strchr(i8*, i32)
+
+define void @test_simplify1() {
+; CHECK: store i8* getelementptr inbounds ([14 x i8]* @hello, i32 0, i32 6)
+; CHECK-NOT: call i8* @strchr
+; CHECK: ret void
+
+ %str = getelementptr [14 x i8]* @hello, i32 0, i32 0
+ %dst = call i8* @strchr(i8* %str, i32 119)
+ store i8* %dst, i8** @chp
+ ret void
+}
+
+define void @test_simplify2() {
+; CHECK: store i8* null, i8** @chp, align 4
+; CHECK-NOT: call i8* @strchr
+; CHECK: ret void
+
+ %str = getelementptr [1 x i8]* @null, i32 0, i32 0
+ %dst = call i8* @strchr(i8* %str, i32 119)
+ store i8* %dst, i8** @chp
+ ret void
+}
+
+define void @test_simplify3() {
+; CHECK: store i8* getelementptr inbounds ([14 x i8]* @hello, i32 0, i32 13)
+; CHECK-NOT: call i8* @strchr
+; CHECK: ret void
+
+ %src = getelementptr [14 x i8]* @hello, i32 0, i32 0
+ %dst = call i8* @strchr(i8* %src, i32 0)
+ store i8* %dst, i8** @chp
+ ret void
+}
+
+define void @test_simplify4(i32 %chr) {
+; CHECK: call i8* @memchr
+; CHECK-NOT: call i8* @strchr
+; CHECK: ret void
+
+ %src = getelementptr [14 x i8]* @hello, i32 0, i32 0
+ %dst = call i8* @strchr(i8* %src, i32 %chr)
+ store i8* %dst, i8** @chp
+ ret void
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strchr-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strchr-2.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strchr-2.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strchr-2.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,21 @@
+; Test that the strchr libcall simplifier works correctly.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [14 x i8] c"hello world\5Cn\00"
+ at chr = global i8 zeroinitializer
+
+declare i8 @strchr(i8*, i32)
+
+define void @test_nosimplify1() {
+; CHECK: test_nosimplify1
+; CHECK: call i8 @strchr
+; CHECK: ret void
+
+ %str = getelementptr [14 x i8]* @hello, i32 0, i32 0
+ %dst = call i8 @strchr(i8* %str, i32 119)
+ store i8 %dst, i8* @chr
+ ret void
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strcmp-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strcmp-1.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strcmp-1.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strcmp-1.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,82 @@
+; Test that the strcmp library call simplifier works correctly.
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [6 x i8] c"hello\00"
+ at hell = constant [5 x i8] c"hell\00"
+ at bell = constant [5 x i8] c"bell\00"
+ at null = constant [1 x i8] zeroinitializer
+
+declare i32 @strcmp(i8*, i8*)
+
+; strcmp("", x) -> -*x
+define i32 @test1(i8* %str2) {
+; CHECK: @test1
+; CHECK: %strcmpload = load i8* %str
+; CHECK: %1 = zext i8 %strcmpload to i32
+; CHECK: %2 = sub i32 0, %1
+; CHECK: ret i32 %2
+
+ %str1 = getelementptr inbounds [1 x i8]* @null, i32 0, i32 0
+ %temp1 = call i32 @strcmp(i8* %str1, i8* %str2)
+ ret i32 %temp1
+
+}
+
+; strcmp(x, "") -> *x
+define i32 @test2(i8* %str1) {
+; CHECK: @test2
+; CHECK: %strcmpload = load i8* %str
+; CHECK: %1 = zext i8 %strcmpload to i32
+; CHECK: ret i32 %1
+
+ %str2 = getelementptr inbounds [1 x i8]* @null, i32 0, i32 0
+ %temp1 = call i32 @strcmp(i8* %str1, i8* %str2)
+ ret i32 %temp1
+}
+
+; strcmp(x, y) -> cnst
+define i32 @test3() {
+; CHECK: @test3
+; CHECK: ret i32 -1
+
+ %str1 = getelementptr inbounds [5 x i8]* @hell, i32 0, i32 0
+ %str2 = getelementptr inbounds [6 x i8]* @hello, i32 0, i32 0
+ %temp1 = call i32 @strcmp(i8* %str1, i8* %str2)
+ ret i32 %temp1
+}
+
+define i32 @test4() {
+; CHECK: @test4
+; CHECK: ret i32 1
+
+ %str1 = getelementptr inbounds [5 x i8]* @hell, i32 0, i32 0
+ %str2 = getelementptr inbounds [1 x i8]* @null, i32 0, i32 0
+ %temp1 = call i32 @strcmp(i8* %str1, i8* %str2)
+ ret i32 %temp1
+}
+
+; strcmp(x, y) -> memcmp(x, y, <known length>)
+; (This transform is rather difficult to trigger in a useful manner)
+define i32 @test5(i1 %b) {
+; CHECK: @test5
+; CHECK: %memcmp = call i32 @memcmp(i8* getelementptr inbounds ([6 x i8]* @hello, i32 0, i32 0), i8* %str2, i32 5)
+; CHECK: ret i32 %memcmp
+
+ %str1 = getelementptr inbounds [6 x i8]* @hello, i32 0, i32 0
+ %temp1 = getelementptr inbounds [5 x i8]* @hell, i32 0, i32 0
+ %temp2 = getelementptr inbounds [5 x i8]* @bell, i32 0, i32 0
+ %str2 = select i1 %b, i8* %temp1, i8* %temp2
+ %temp3 = call i32 @strcmp(i8* %str1, i8* %str2)
+ ret i32 %temp3
+}
+
+; strcmp(x,x) -> 0
+define i32 @test6(i8* %str) {
+; CHECK: @test6
+; CHECK: ret i32 0
+
+ %temp1 = call i32 @strcmp(i8* %str, i8* %str)
+ ret i32 %temp1
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strcmp-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strcmp-2.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strcmp-2.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strcmp-2.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,20 @@
+; Test that the strcmp library call simplifier works correctly.
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [6 x i8] c"hello\00"
+ at hell = constant [5 x i8] c"hell\00"
+
+declare i16 @strcmp(i8*, i8*)
+
+define i16 @test_nosimplify() {
+; CHECK: @test_nosimplify
+; CHECK: call i16 @strcmp
+; CHECK: ret i16 %temp1
+
+ %str1 = getelementptr inbounds [5 x i8]* @hell, i32 0, i32 0
+ %str2 = getelementptr inbounds [6 x i8]* @hello, i32 0, i32 0
+ %temp1 = call i16 @strcmp(i8* %str1, i8* %str2)
+ ret i16 %temp1
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strncat-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strncat-1.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strncat-1.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strncat-1.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,37 @@
+; Test that the strncat libcall simplifier works correctly.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [6 x i8] c"hello\00"
+ at null = constant [1 x i8] zeroinitializer
+ at null_hello = constant [7 x i8] c"\00hello\00"
+
+declare i8* @strncat(i8*, i8*, i32)
+declare i32 @puts(i8*)
+
+define i32 @main() {
+; CHECK: @main
+; CHECK-NOT: call i8* @strncat
+; CHECK: call i32 @puts
+
+ %target = alloca [1024 x i8]
+ %arg1 = getelementptr [1024 x i8]* %target, i32 0, i32 0
+ store i8 0, i8* %arg1
+
+ ; rslt1 = strncat(target, "hello\00")
+ %arg2 = getelementptr [6 x i8]* @hello, i32 0, i32 0
+ %rslt1 = call i8* @strncat(i8* %arg1, i8* %arg2, i32 6)
+
+ ; rslt2 = strncat(rslt1, "\00")
+ %arg3 = getelementptr [1 x i8]* @null, i32 0, i32 0
+ %rslt2 = call i8* @strncat(i8* %rslt1, i8* %arg3, i32 42)
+
+ ; rslt3 = strncat(rslt2, "\00hello\00")
+ %arg4 = getelementptr [7 x i8]* @null_hello, i32 0, i32 0
+ %rslt3 = call i8* @strncat(i8* %rslt2, i8* %arg4, i32 42)
+
+ call i32 @puts(i8* %rslt3)
+ ret i32 0
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strncat-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strncat-2.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strncat-2.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strncat-2.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,53 @@
+; Test that the strncat libcall simplifier works correctly.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [6 x i8] c"hello\00"
+ at empty = constant [1 x i8] c"\00"
+ at a = common global [32 x i8] zeroinitializer, align 1
+
+declare i8* @strncat(i8*, i8*, i32)
+
+define void @test_simplify1() {
+; CHECK: @test_simplify1
+; CHECK-NOT: call i8* @strncat
+; CHECK: ret void
+
+ %dst = getelementptr [32 x i8]* @a, i32 0, i32 0
+ %src = getelementptr [6 x i8]* @hello, i32 0, i32 0
+ call i8* @strncat(i8* %dst, i8* %src, i32 13)
+ ret void
+}
+
+define void @test_simplify2() {
+; CHECK: @test_simplify2
+; CHECK-NEXT: ret void
+
+ %dst = getelementptr [32 x i8]* @a, i32 0, i32 0
+ %src = getelementptr [1 x i8]* @empty, i32 0, i32 0
+ call i8* @strncat(i8* %dst, i8* %src, i32 13)
+ ret void
+}
+
+define void @test_simplify3() {
+; CHECK: @test_simplify3
+; CHECK-NEXT: ret void
+
+ %dst = getelementptr [32 x i8]* @a, i32 0, i32 0
+ %src = getelementptr [6 x i8]* @hello, i32 0, i32 0
+ call i8* @strncat(i8* %dst, i8* %src, i32 0)
+ ret void
+}
+
+define void @test_nosimplify1() {
+; CHECK: @test_nosimplify1
+; CHECK: call i8* @strncat
+; CHECK: ret void
+
+ %dst = getelementptr [32 x i8]* @a, i32 0, i32 0
+ %src = getelementptr [6 x i8]* @hello, i32 0, i32 0
+ call i8* @strncat(i8* %dst, i8* %src, i32 1)
+ ret void
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strncat-3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strncat-3.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strncat-3.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strncat-3.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,22 @@
+; Test that the strncat libcall simplifier works correctly.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [6 x i8] c"hello\00"
+ at empty = constant [1 x i8] c"\00"
+ at a = common global [32 x i8] zeroinitializer, align 1
+
+declare i16* @strncat(i8*, i8*, i32)
+
+define void @test_nosimplify1() {
+; CHECK: @test_nosimplify1
+; CHECK: call i16* @strncat
+; CHECK: ret void
+
+ %dst = getelementptr [32 x i8]* @a, i32 0, i32 0
+ %src = getelementptr [6 x i8]* @hello, i32 0, i32 0
+ call i16* @strncat(i8* %dst, i8* %src, i32 13)
+ ret void
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strncmp-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strncmp-1.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strncmp-1.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strncmp-1.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,97 @@
+; Test that the strncmp library call simplifier works correctly.
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [6 x i8] c"hello\00"
+ at hell = constant [5 x i8] c"hell\00"
+ at bell = constant [5 x i8] c"bell\00"
+ at null = constant [1 x i8] zeroinitializer
+
+declare i32 @strncmp(i8*, i8*, i32)
+
+; strncmp("", x, n) -> -*x
+define i32 @test1(i8* %str2) {
+; CHECK: @test1
+; CHECK: %strcmpload = load i8* %str
+; CHECK: %1 = zext i8 %strcmpload to i32
+; CHECK: %2 = sub i32 0, %1
+; CHECK: ret i32 %2
+
+ %str1 = getelementptr inbounds [1 x i8]* @null, i32 0, i32 0
+ %temp1 = call i32 @strncmp(i8* %str1, i8* %str2, i32 10)
+ ret i32 %temp1
+}
+
+; strncmp(x, "", n) -> *x
+define i32 @test2(i8* %str1) {
+; CHECK: @test2
+; CHECK: %strcmpload = load i8* %str1
+; CHECK: %1 = zext i8 %strcmpload to i32
+; CHECK: ret i32 %1
+
+ %str2 = getelementptr inbounds [1 x i8]* @null, i32 0, i32 0
+ %temp1 = call i32 @strncmp(i8* %str1, i8* %str2, i32 10)
+ ret i32 %temp1
+}
+
+; strncmp(x, y, n) -> cnst
+define i32 @test3() {
+; CHECK: @test3
+; CHECK: ret i32 -1
+
+ %str1 = getelementptr inbounds [5 x i8]* @hell, i32 0, i32 0
+ %str2 = getelementptr inbounds [6 x i8]* @hello, i32 0, i32 0
+ %temp1 = call i32 @strncmp(i8* %str1, i8* %str2, i32 10)
+ ret i32 %temp1
+}
+
+define i32 @test4() {
+; CHECK: @test4
+; CHECK: ret i32 1
+
+ %str1 = getelementptr inbounds [5 x i8]* @hell, i32 0, i32 0
+ %str2 = getelementptr inbounds [1 x i8]* @null, i32 0, i32 0
+ %temp1 = call i32 @strncmp(i8* %str1, i8* %str2, i32 10)
+ ret i32 %temp1
+}
+
+define i32 @test5() {
+; CHECK: @test5
+; CHECK: ret i32 0
+
+ %str1 = getelementptr inbounds [5 x i8]* @hell, i32 0, i32 0
+ %str2 = getelementptr inbounds [6 x i8]* @hello, i32 0, i32 0
+ %temp1 = call i32 @strncmp(i8* %str1, i8* %str2, i32 4)
+ ret i32 %temp1
+}
+
+; strncmp(x,y,1) -> memcmp(x,y,1)
+; TODO: Once the memcmp simplifier gets moved into the instcombine pass
+; the following memcmp will be folded into two loads and a subtract.
+define i32 @test6(i8* %str1, i8* %str2) {
+; CHECK: @test6
+; CHECK: call i32 @memcmp
+; CHECK: ret i32 %memcmp
+
+ %temp1 = call i32 @strncmp(i8* %str1, i8* %str2, i32 1)
+ ret i32 %temp1
+}
+
+; strncmp(x,y,0) -> 0
+define i32 @test7(i8* %str1, i8* %str2) {
+; CHECK: @test7
+; CHECK: ret i32 0
+
+ %temp1 = call i32 @strncmp(i8* %str1, i8* %str2, i32 0)
+ ret i32 %temp1
+}
+
+; strncmp(x,x,n) -> 0
+define i32 @test8(i8* %str, i32 %n) {
+; CHECK: @test8
+; CHECK: ret i32 0
+
+ %temp1 = call i32 @strncmp(i8* %str, i8* %str, i32 %n)
+ ret i32 %temp1
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strncmp-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strncmp-2.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strncmp-2.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strncmp-2.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,20 @@
+; Test that the strncmp library call simplifier works correctly.
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [6 x i8] c"hello\00"
+ at hell = constant [5 x i8] c"hell\00"
+
+declare i16 @strncmp(i8*, i8*, i32)
+
+define i16 @test_nosimplify() {
+; CHECK: @test_nosimplify
+; CHECK: call i16 @strncmp
+; CHECK: ret i16 %temp1
+
+ %str1 = getelementptr inbounds [5 x i8]* @hell, i32 0, i32 0
+ %str2 = getelementptr inbounds [6 x i8]* @hello, i32 0, i32 0
+ %temp1 = call i16 @strncmp(i8* %str1, i8* %str2, i32 10)
+ ret i16 %temp1
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strrchr-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strrchr-1.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strrchr-1.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strrchr-1.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,54 @@
+; Test that the strrchr library call simplifier works correctly.
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [14 x i8] c"hello world\5Cn\00"
+ at null = constant [1 x i8] zeroinitializer
+ at chp = global i8* zeroinitializer
+
+declare i8* @strrchr(i8*, i32)
+
+define void @test_simplify1() {
+; CHECK: store i8* getelementptr inbounds ([14 x i8]* @hello, i32 0, i32 6)
+; CHECK-NOT: call i8* @strrchr
+; CHECK: ret void
+
+ %str = getelementptr [14 x i8]* @hello, i32 0, i32 0
+ %dst = call i8* @strrchr(i8* %str, i32 119)
+ store i8* %dst, i8** @chp
+ ret void
+}
+
+define void @test_simplify2() {
+; CHECK: store i8* null, i8** @chp, align 4
+; CHECK-NOT: call i8* @strrchr
+; CHECK: ret void
+
+ %str = getelementptr [1 x i8]* @null, i32 0, i32 0
+ %dst = call i8* @strrchr(i8* %str, i32 119)
+ store i8* %dst, i8** @chp
+ ret void
+}
+
+define void @test_simplify3() {
+; CHECK: store i8* getelementptr inbounds ([14 x i8]* @hello, i32 0, i32 13)
+; CHECK-NOT: call i8* @strrchr
+; CHECK: ret void
+
+ %src = getelementptr [14 x i8]* @hello, i32 0, i32 0
+ %dst = call i8* @strrchr(i8* %src, i32 0)
+ store i8* %dst, i8** @chp
+ ret void
+}
+
+define void @test_nosimplify1(i32 %chr) {
+; CHECK: @test_nosimplify1
+; CHECK: call i8* @strrchr
+; CHECK: ret void
+
+ %src = getelementptr [14 x i8]* @hello, i32 0, i32 0
+ %dst = call i8* @strrchr(i8* %src, i32 %chr)
+ store i8* %dst, i8** @chp
+ ret void
+}
Added: llvm/branches/R600/test/Transforms/InstCombine/strrchr-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/strrchr-2.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/strrchr-2.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/strrchr-2.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,21 @@
+; Test that the strrchr libcall simplifier works correctly.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+ at hello = constant [14 x i8] c"hello world\5Cn\00"
+ at chr = global i8 zeroinitializer
+
+declare i8 @strrchr(i8*, i32)
+
+define void @test_nosimplify1() {
+; CHECK: test_nosimplify1
+; CHECK: call i8 @strrchr
+; CHECK: ret void
+
+ %str = getelementptr [14 x i8]* @hello, i32 0, i32 0
+ %dst = call i8 @strrchr(i8* %str, i32 119)
+ store i8 %dst, i8* @chr
+ ret void
+}
Modified: llvm/branches/R600/test/Transforms/InstCombine/struct-assign-tbaa.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/struct-assign-tbaa.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/struct-assign-tbaa.ll (original)
+++ llvm/branches/R600/test/Transforms/InstCombine/struct-assign-tbaa.ll Tue Oct 16 12:52:57 2012
@@ -2,25 +2,43 @@
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
-%struct.foo = type { float }
+declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
; Verify that instcombine preserves TBAA tags when converting a memcpy into
; a scalar load and store.
+%struct.test1 = type { float }
+
+; CHECK: @test
; CHECK: %2 = load float* %0, align 4, !tbaa !0
; CHECK: store float %2, float* %1, align 4, !tbaa !0
-; CHECK: !0 = metadata !{metadata !"float", metadata !1}
-define void @test(%struct.foo* nocapture %a, %struct.foo* nocapture %b) {
+; CHECK: ret
+define void @test1(%struct.test1* nocapture %a, %struct.test1* nocapture %b) {
entry:
- %0 = bitcast %struct.foo* %a to i8*
- %1 = bitcast %struct.foo* %b to i8*
+ %0 = bitcast %struct.test1* %a to i8*
+ %1 = bitcast %struct.test1* %b to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 4, i32 4, i1 false), !tbaa.struct !3
ret void
}
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
+%struct.test2 = type { i32 (i8*, i32*, double*)** }
+
+define i32 (i8*, i32*, double*)*** @test2() {
+; CHECK: @test2
+; CHECK-NOT: memcpy
+; CHECK: ret
+ %tmp = alloca %struct.test2, align 8
+ %tmp1 = bitcast %struct.test2* %tmp to i8*
+ call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp1, i8* undef, i64 8, i32 8, i1 false), !tbaa.struct !4
+ %tmp2 = getelementptr %struct.test2* %tmp, i32 0, i32 0
+ %tmp3 = load i32 (i8*, i32*, double*)*** %tmp2
+ ret i32 (i8*, i32*, double*)*** %tmp2
+}
+
+; CHECK: !0 = metadata !{metadata !"float", metadata !1}
!0 = metadata !{metadata !"Simple C/C++ TBAA"}
!1 = metadata !{metadata !"omnipotent char", metadata !0}
!2 = metadata !{metadata !"float", metadata !0}
!3 = metadata !{i64 0, i64 4, metadata !2}
+!4 = metadata !{i64 0, i64 8, null}
Added: llvm/branches/R600/test/Transforms/InstCombine/weak-symbols.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/InstCombine/weak-symbols.ll?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/InstCombine/weak-symbols.ll (added)
+++ llvm/branches/R600/test/Transforms/InstCombine/weak-symbols.ll Tue Oct 16 12:52:57 2012
@@ -0,0 +1,33 @@
+; PR4738 - Test that the library call simplifier doesn't assume anything about
+; weak symbols.
+;
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+ at real_init = weak_odr constant [2 x i8] c"y\00"
+ at fake_init = weak constant [2 x i8] c"y\00"
+ at .str = private constant [2 x i8] c"y\00"
+
+define i32 @foo() nounwind {
+; CHECK: define i32 @foo
+; CHECK: call i32 @strcmp
+; CHECK: ret i32 %temp1
+
+entry:
+ %str1 = getelementptr inbounds [2 x i8]* @fake_init, i64 0, i64 0
+ %str2 = getelementptr inbounds [2 x i8]* @.str, i64 0, i64 0
+ %temp1 = call i32 @strcmp(i8* %str1, i8* %str2) nounwind readonly
+ ret i32 %temp1
+}
+
+define i32 @bar() nounwind {
+; CHECK: define i32 @bar
+; CHECK: ret i32 0
+
+entry:
+ %str1 = getelementptr inbounds [2 x i8]* @real_init, i64 0, i64 0
+ %str2 = getelementptr inbounds [2 x i8]* @.str, i64 0, i64 0
+ %temp1 = call i32 @strcmp(i8* %str1, i8* %str2) nounwind readonly
+ ret i32 %temp1
+}
+
+declare i32 @strcmp(i8*, i8*) nounwind readonly
Modified: llvm/branches/R600/test/Transforms/SROA/alignment.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/SROA/alignment.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/Transforms/SROA/alignment.ll (original)
+++ llvm/branches/R600/test/Transforms/SROA/alignment.ll Tue Oct 16 12:52:57 2012
@@ -84,37 +84,6 @@
ret void
}
-%struct.S = type { i8, { i64 } }
-
-define void @test4() {
-; This test case triggered very strange alignment behavior with memcpy due to
-; strange splitting. Reported by Duncan.
-; CHECK: @test4
-
-entry:
- %D.2113 = alloca %struct.S
- %Op = alloca %struct.S
- %D.2114 = alloca %struct.S
- %gep1 = getelementptr inbounds %struct.S* %Op, i32 0, i32 0
- store i8 0, i8* %gep1, align 8
- %gep2 = getelementptr inbounds %struct.S* %Op, i32 0, i32 1, i32 0
- %cast = bitcast i64* %gep2 to double*
- store double 0.000000e+00, double* %cast, align 8
- store i64 0, i64* %gep2, align 8
- %dst1 = bitcast %struct.S* %D.2114 to i8*
- %src1 = bitcast %struct.S* %Op to i8*
- call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst1, i8* %src1, i32 16, i32 8, i1 false)
- %dst2 = bitcast %struct.S* %D.2113 to i8*
- %src2 = bitcast %struct.S* %D.2114 to i8*
- call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst2, i8* %src2, i32 16, i32 8, i1 false)
-; We get 3 memcpy calls with various reasons to shrink their alignment to 1.
-; CHECK: @llvm.memcpy.p0i8.p0i8.i32(i8* %{{.*}}, i8* %{{.*}}, i32 3, i32 1, i1 false)
-; CHECK: @llvm.memcpy.p0i8.p0i8.i32(i8* %{{.*}}, i8* %{{.*}}, i32 8, i32 1, i1 false)
-; CHECK: @llvm.memcpy.p0i8.p0i8.i32(i8* %{{.*}}, i8* %{{.*}}, i32 11, i32 1, i1 false)
-
- ret void
-}
-
define void @test5() {
; Test that we preserve underaligned loads and stores when splitting.
; CHECK: @test5
Modified: llvm/branches/R600/test/Transforms/SROA/basictest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/SROA/basictest.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/Transforms/SROA/basictest.ll (original)
+++ llvm/branches/R600/test/Transforms/SROA/basictest.ll Tue Oct 16 12:52:57 2012
@@ -409,8 +409,11 @@
define i16 @test5() {
; CHECK: @test5
-; CHECK: alloca float
-; CHECK: ret i16 %
+; CHECK-NOT: alloca float
+; CHECK: %[[cast:.*]] = bitcast float 0.0{{.*}} to i32
+; CHECK-NEXT: %[[shr:.*]] = lshr i32 %[[cast]], 16
+; CHECK-NEXT: %[[trunc:.*]] = trunc i32 %[[shr]] to i16
+; CHECK-NEXT: ret i16 %[[trunc]]
entry:
%a = alloca [4 x i8]
@@ -968,3 +971,95 @@
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast0, i8* %cast1, i32 12, i32 0, i1 false)
ret void
}
+
+define i32 @test22(i32 %x) {
+; Test that SROA and promotion is not confused by a grab bax mixture of pointer
+; types involving wrapper aggregates and zero-length aggregate members.
+; CHECK: @test22
+
+entry:
+ %a1 = alloca { { [1 x { i32 }] } }
+ %a2 = alloca { {}, { float }, [0 x i8] }
+ %a3 = alloca { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }
+; CHECK-NOT: alloca
+
+ %wrap1 = insertvalue [1 x { i32 }] undef, i32 %x, 0, 0
+ %gep1 = getelementptr { { [1 x { i32 }] } }* %a1, i32 0, i32 0, i32 0
+ store [1 x { i32 }] %wrap1, [1 x { i32 }]* %gep1
+
+ %gep2 = getelementptr { { [1 x { i32 }] } }* %a1, i32 0, i32 0
+ %ptrcast1 = bitcast { [1 x { i32 }] }* %gep2 to { [1 x { float }] }*
+ %load1 = load { [1 x { float }] }* %ptrcast1
+ %unwrap1 = extractvalue { [1 x { float }] } %load1, 0, 0
+
+ %wrap2 = insertvalue { {}, { float }, [0 x i8] } undef, { float } %unwrap1, 1
+ store { {}, { float }, [0 x i8] } %wrap2, { {}, { float }, [0 x i8] }* %a2
+
+ %gep3 = getelementptr { {}, { float }, [0 x i8] }* %a2, i32 0, i32 1, i32 0
+ %ptrcast2 = bitcast float* %gep3 to <4 x i8>*
+ %load3 = load <4 x i8>* %ptrcast2
+ %valcast1 = bitcast <4 x i8> %load3 to i32
+
+ %wrap3 = insertvalue [1 x [1 x i32]] undef, i32 %valcast1, 0, 0
+ %wrap4 = insertvalue { [1 x [1 x i32]], {} } undef, [1 x [1 x i32]] %wrap3, 0
+ %gep4 = getelementptr { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }* %a3, i32 0, i32 1
+ %ptrcast3 = bitcast { [0 x double], [1 x [1 x <4 x i8>]], {} }* %gep4 to { [1 x [1 x i32]], {} }*
+ store { [1 x [1 x i32]], {} } %wrap4, { [1 x [1 x i32]], {} }* %ptrcast3
+
+ %gep5 = getelementptr { [0 x i8], { [0 x double], [1 x [1 x <4 x i8>]], {} }, { { {} } } }* %a3, i32 0, i32 1, i32 1, i32 0
+ %ptrcast4 = bitcast [1 x <4 x i8>]* %gep5 to { {}, float, {} }*
+ %load4 = load { {}, float, {} }* %ptrcast4
+ %unwrap2 = extractvalue { {}, float, {} } %load4, 1
+ %valcast2 = bitcast float %unwrap2 to i32
+
+ ret i32 %valcast2
+; CHECK: ret i32
+}
+
+define void @PR14059.1(double* %d) {
+; In PR14059 a peculiar construct was identified as something that is used
+; pervasively in ARM's ABI-calling-convention lowering: the passing of a struct
+; of doubles via an array of i32 in order to place the data into integer
+; registers. This in turn was missed as an optimization by SROA due to the
+; partial loads and stores of integers to the double alloca we were trying to
+; form and promote. The solution is to widen the integer operations to be
+; whole-alloca operations, and perform the appropriate bitcasting on the
+; *values* rather than the pointers. When this works, partial reads and writes
+; via integers can be promoted away.
+; CHECK: @PR14059.1
+; CHECK-NOT: alloca
+; CHECK: ret void
+
+entry:
+ %X.sroa.0.i = alloca double, align 8
+ %0 = bitcast double* %X.sroa.0.i to i8*
+ call void @llvm.lifetime.start(i64 -1, i8* %0)
+
+ ; Store to the low 32-bits...
+ %X.sroa.0.0.cast2.i = bitcast double* %X.sroa.0.i to i32*
+ store i32 0, i32* %X.sroa.0.0.cast2.i, align 8
+
+ ; Also use a memset to the middle 32-bits for fun.
+ %X.sroa.0.2.raw_idx2.i = getelementptr inbounds i8* %0, i32 2
+ call void @llvm.memset.p0i8.i64(i8* %X.sroa.0.2.raw_idx2.i, i8 0, i64 4, i32 1, i1 false)
+
+ ; Or a memset of the whole thing.
+ call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 8, i32 1, i1 false)
+
+ ; Write to the high 32-bits with a memcpy.
+ %X.sroa.0.4.raw_idx4.i = getelementptr inbounds i8* %0, i32 4
+ %d.raw = bitcast double* %d to i8*
+ call void @llvm.memcpy.p0i8.p0i8.i32(i8* %X.sroa.0.4.raw_idx4.i, i8* %d.raw, i32 4, i32 1, i1 false)
+
+ ; Store to the high 32-bits...
+ %X.sroa.0.4.cast5.i = bitcast i8* %X.sroa.0.4.raw_idx4.i to i32*
+ store i32 1072693248, i32* %X.sroa.0.4.cast5.i, align 4
+
+ ; Do the actual math...
+ %X.sroa.0.0.load1.i = load double* %X.sroa.0.i, align 8
+ %accum.real.i = load double* %d, align 8
+ %add.r.i = fadd double %accum.real.i, %X.sroa.0.0.load1.i
+ store double %add.r.i, double* %d, align 8
+ call void @llvm.lifetime.end(i64 -1, i8* %0)
+ ret void
+}
Modified: llvm/branches/R600/test/Transforms/SROA/phi-and-select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/SROA/phi-and-select.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/Transforms/SROA/phi-and-select.ll (original)
+++ llvm/branches/R600/test/Transforms/SROA/phi-and-select.ll Tue Oct 16 12:52:57 2012
@@ -256,17 +256,17 @@
ret i32 %loaded
}
-define i32 @test10(i32 %b, i32* %ptr) {
+define float @test10(i32 %b, float* %ptr) {
; Don't try to promote allocas which are not elligible for it even after
; rewriting due to the necessity of inserting bitcasts when speculating a PHI
; node.
; CHECK: @test10
; CHECK: %[[alloca:.*]] = alloca
-; CHECK: %[[argvalue:.*]] = load i32* %ptr
-; CHECK: %[[cast:.*]] = bitcast double* %[[alloca]] to i32*
-; CHECK: %[[allocavalue:.*]] = load i32* %[[cast]]
-; CHECK: %[[result:.*]] = phi i32 [ %[[allocavalue]], %else ], [ %[[argvalue]], %then ]
-; CHECK-NEXT: ret i32 %[[result]]
+; CHECK: %[[argvalue:.*]] = load float* %ptr
+; CHECK: %[[cast:.*]] = bitcast double* %[[alloca]] to float*
+; CHECK: %[[allocavalue:.*]] = load float* %[[cast]]
+; CHECK: %[[result:.*]] = phi float [ %[[allocavalue]], %else ], [ %[[argvalue]], %then ]
+; CHECK-NEXT: ret float %[[result]]
entry:
%f = alloca double
@@ -278,34 +278,34 @@
br label %exit
else:
- %bitcast = bitcast double* %f to i32*
+ %bitcast = bitcast double* %f to float*
br label %exit
exit:
- %phi = phi i32* [ %bitcast, %else ], [ %ptr, %then ]
- %loaded = load i32* %phi, align 4
- ret i32 %loaded
+ %phi = phi float* [ %bitcast, %else ], [ %ptr, %then ]
+ %loaded = load float* %phi, align 4
+ ret float %loaded
}
-define i32 @test11(i32 %b, i32* %ptr) {
+define float @test11(i32 %b, float* %ptr) {
; Same as @test10 but for a select rather than a PHI node.
; CHECK: @test11
; CHECK: %[[alloca:.*]] = alloca
-; CHECK: %[[cast:.*]] = bitcast double* %[[alloca]] to i32*
-; CHECK: %[[allocavalue:.*]] = load i32* %[[cast]]
-; CHECK: %[[argvalue:.*]] = load i32* %ptr
-; CHECK: %[[result:.*]] = select i1 %{{.*}}, i32 %[[allocavalue]], i32 %[[argvalue]]
-; CHECK-NEXT: ret i32 %[[result]]
+; CHECK: %[[cast:.*]] = bitcast double* %[[alloca]] to float*
+; CHECK: %[[allocavalue:.*]] = load float* %[[cast]]
+; CHECK: %[[argvalue:.*]] = load float* %ptr
+; CHECK: %[[result:.*]] = select i1 %{{.*}}, float %[[allocavalue]], float %[[argvalue]]
+; CHECK-NEXT: ret float %[[result]]
entry:
%f = alloca double
store double 0.0, double* %f
- store i32 0, i32* %ptr
+ store float 0.0, float* %ptr
%test = icmp ne i32 %b, 0
- %bitcast = bitcast double* %f to i32*
- %select = select i1 %test, i32* %bitcast, i32* %ptr
- %loaded = load i32* %select, align 4
- ret i32 %loaded
+ %bitcast = bitcast double* %f to float*
+ %select = select i1 %test, float* %bitcast, float* %ptr
+ %loaded = load float* %select, align 4
+ ret float %loaded
}
define i32 @test12(i32 %x, i32* %p) {
Modified: llvm/branches/R600/test/Transforms/SROA/vector-promotion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/SROA/vector-promotion.ll?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/test/Transforms/SROA/vector-promotion.ll (original)
+++ llvm/branches/R600/test/Transforms/SROA/vector-promotion.ll Tue Oct 16 12:52:57 2012
@@ -189,3 +189,19 @@
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
+
+define i64 @test6(<4 x i64> %x, <4 x i64> %y, i64 %n) {
+; CHECK: @test6
+; The old scalarrepl pass would wrongly drop the store to the second alloca.
+; PR13254
+ %tmp = alloca { <4 x i64>, <4 x i64> }
+ %p0 = getelementptr inbounds { <4 x i64>, <4 x i64> }* %tmp, i32 0, i32 0
+ store <4 x i64> %x, <4 x i64>* %p0
+; CHECK: store <4 x i64> %x,
+ %p1 = getelementptr inbounds { <4 x i64>, <4 x i64> }* %tmp, i32 0, i32 1
+ store <4 x i64> %y, <4 x i64>* %p1
+; CHECK: store <4 x i64> %y,
+ %addr = getelementptr inbounds { <4 x i64>, <4 x i64> }* %tmp, i32 0, i32 0, i64 %n
+ %res = load i64* %addr, align 4
+ ret i64 %res
+}
Removed: llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrCat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrCat.ll?rev=166032&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrCat.ll (original)
+++ llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrCat.ll (removed)
@@ -1,33 +0,0 @@
-; Test that the StrCatOptimizer works correctly
-; PR3661
-; RUN: opt < %s -simplify-libcalls -S | \
-; RUN: not grep "call.*strcat"
-; RUN: opt < %s -simplify-libcalls -S | \
-; RUN: grep "puts.*%arg1"
-
-; This transformation requires the pointer size, as it assumes that size_t is
-; the size of a pointer.
-target datalayout = "-p:64:64:64"
-
- at hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
- at null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
- at null_hello = constant [7 x i8] c"\00hello\00" ; <[7 x i8]*> [#uses=1]
-
-declare i8* @strcat(i8*, i8*)
-
-declare i32 @puts(i8*)
-
-define i32 @main() {
- %target = alloca [1024 x i8] ; <[1024 x i8]*> [#uses=1]
- %arg1 = getelementptr [1024 x i8]* %target, i32 0, i32 0 ; <i8*> [#uses=2]
- store i8 0, i8* %arg1
- %arg2 = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=1]
- %rslt1 = call i8* @strcat( i8* %arg1, i8* %arg2 ) ; <i8*> [#uses=1]
- %arg3 = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1]
- %rslt2 = call i8* @strcat( i8* %rslt1, i8* %arg3 ) ; <i8*> [#uses=1]
- %arg4 = getelementptr [7 x i8]* @null_hello, i32 0, i32 0 ; <i8*> [#uses=1]
- %rslt3 = call i8* @strcat( i8* %rslt2, i8* %arg4 ) ; <i8*> [#uses=1]
- call i32 @puts( i8* %rslt3 ) ; <i32>:1 [#uses=0]
- ret i32 0
-}
-
Removed: llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrChr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrChr.ll?rev=166032&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrChr.ll (original)
+++ llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrChr.ll (removed)
@@ -1,26 +0,0 @@
-; Test that the StrChrOptimizer works correctly
-; RUN: opt < %s -simplify-libcalls -S | FileCheck %s
-
-; This transformation requires the pointer size, as it assumes that size_t is
-; the size of a pointer.
-target datalayout = "-p:64:64:64"
-
- at hello = constant [14 x i8] c"hello world\5Cn\00"
- at null = constant [1 x i8] zeroinitializer
-
-declare i8* @strchr(i8*, i32)
-
-define i32 @foo(i32 %index) {
- %hello_p = getelementptr [14 x i8]* @hello, i32 0, i32 0
- %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0
- %world = call i8* @strchr(i8* %hello_p, i32 119)
-; CHECK: getelementptr i8* %hello_p, i64 6
- %ignore = call i8* @strchr(i8* %null_p, i32 119)
-; CHECK-NOT: call i8* strchr
- %null = call i8* @strchr(i8* %hello_p, i32 0)
-; CHECK: getelementptr i8* %hello_p, i64 13
- %result = call i8* @strchr(i8* %hello_p, i32 %index)
-; CHECK: call i8* @memchr(i8* %hello_p, i32 %index, i64 14)
- ret i32 %index
-}
-
Removed: llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrCmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrCmp.ll?rev=166032&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrCmp.ll (original)
+++ llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrCmp.ll (removed)
@@ -1,65 +0,0 @@
-; Test that the StrCmpOptimizer works correctly
-; RUN: opt < %s -simplify-libcalls -S | FileCheck %s
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-
- at hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
- at hell = constant [5 x i8] c"hell\00" ; <[5 x i8]*> [#uses=1]
- at bell = constant [5 x i8] c"bell\00" ; <[5 x i8]*> [#uses=1]
- at null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
-
-declare i32 @strcmp(i8*, i8*)
-
-; strcmp("", x) -> -*x
-define i32 @test1(i8* %str) {
- %temp1 = call i32 @strcmp(i8* getelementptr inbounds ([1 x i8]* @null, i32 0, i32 0), i8* %str)
- ret i32 %temp1
- ; CHECK: @test1
- ; CHECK: %strcmpload = load i8* %str
- ; CHECK: %1 = zext i8 %strcmpload to i32
- ; CHECK: %temp1 = sub i32 0, %1
- ; CHECK: ret i32 %temp1
-}
-
-; strcmp(x, "") -> *x
-define i32 @test2(i8* %str) {
- %temp1 = call i32 @strcmp(i8* %str, i8* getelementptr inbounds ([1 x i8]* @null, i32 0, i32 0))
- ret i32 %temp1
- ; CHECK: @test2
- ; CHECK: %strcmpload = load i8* %str
- ; CHECK: %temp1 = zext i8 %strcmpload to i32
- ; CHECK: ret i32 %temp1
-}
-
-; strcmp(x, y) -> cnst
-define i32 @test3() {
- %temp1 = call i32 @strcmp(i8* getelementptr inbounds ([5 x i8]* @hell, i32 0, i32 0), i8* getelementptr inbounds ([6 x i8]* @hello, i32 0, i32 0))
- ret i32 %temp1
- ; CHECK: @test3
- ; CHECK: ret i32 -1
-}
-define i32 @test4() {
- %temp1 = call i32 @strcmp(i8* getelementptr inbounds ([5 x i8]* @hell, i32 0, i32 0), i8* getelementptr inbounds ([1 x i8]* @null, i32 0, i32 0))
- ret i32 %temp1
- ; CHECK: @test4
- ; CHECK: ret i32 1
-}
-
-; strcmp(x, y) -> memcmp(x, y, <known length>)
-; (This transform is rather difficult to trigger in a useful manner)
-define i32 @test5(i1 %b) {
- %sel = select i1 %b, i8* getelementptr inbounds ([5 x i8]* @hell, i32 0, i32 0), i8* getelementptr inbounds ([5 x i8]* @bell, i32 0, i32 0)
- %temp1 = call i32 @strcmp(i8* getelementptr inbounds ([6 x i8]* @hello, i32 0, i32 0), i8* %sel)
- ret i32 %temp1
- ; CHECK: @test5
- ; CHECK: %memcmp = call i32 @memcmp(i8* getelementptr inbounds ([6 x i8]* @hello, i32 0, i32 0), i8* %sel, i32 5)
- ; CHECK: ret i32 %memcmp
-}
-
-; strcmp(x,x) -> 0
-define i32 @test6(i8* %str) {
- %temp1 = call i32 @strcmp(i8* %str, i8* %str)
- ret i32 %temp1
- ; CHECK: @test6
- ; CHECK: ret i32 0
-}
Removed: llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrNCat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrNCat.ll?rev=166032&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrNCat.ll (original)
+++ llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrNCat.ll (removed)
@@ -1,31 +0,0 @@
-; Test that the StrNCatOptimizer works correctly
-; RUN: opt < %s -simplify-libcalls -S | \
-; RUN: not grep "call.*strncat"
-; RUN: opt < %s -simplify-libcalls -S | \
-; RUN: grep "puts.*%arg1"
-
-; This transformation requires the pointer size, as it assumes that size_t is
-; the size of a pointer.
-target datalayout = "-p:64:64:64"
-
- at hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
- at null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
- at null_hello = constant [7 x i8] c"\00hello\00" ; <[7 x i8]*> [#uses=1]
-
-declare i8* @strncat(i8*, i8*, i32)
-
-declare i32 @puts(i8*)
-
-define i32 @main() {
- %target = alloca [1024 x i8] ; <[1024 x i8]*> [#uses=1]
- %arg1 = getelementptr [1024 x i8]* %target, i32 0, i32 0 ; <i8*> [#uses=2]
- store i8 0, i8* %arg1
- %arg2 = getelementptr [6 x i8]* @hello, i32 0, i32 0 ; <i8*> [#uses=1]
- %rslt1 = call i8* @strncat( i8* %arg1, i8* %arg2, i32 6 ) ; <i8*> [#uses=1]
- %arg3 = getelementptr [1 x i8]* @null, i32 0, i32 0 ; <i8*> [#uses=1]
- %rslt2 = call i8* @strncat( i8* %rslt1, i8* %arg3, i32 42 ) ; <i8*> [#uses=1]
- %arg4 = getelementptr [7 x i8]* @null_hello, i32 0, i32 0 ; <i8*> [#uses=1]
- %rslt3 = call i8* @strncat( i8* %rslt2, i8* %arg4, i32 42 ) ; <i8*> [#uses=1]
- call i32 @puts( i8* %rslt3 ) ; <i32>:1 [#uses=0]
- ret i32 0
-}
Removed: llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrNCmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrNCmp.ll?rev=166032&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrNCmp.ll (original)
+++ llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrNCmp.ll (removed)
@@ -1,78 +0,0 @@
-; Test that the StrCmpOptimizer works correctly
-; RUN: opt < %s -simplify-libcalls -S | FileCheck %s
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-
- at hello = constant [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1]
- at hell = constant [5 x i8] c"hell\00" ; <[5 x i8]*> [#uses=1]
- at bell = constant [5 x i8] c"bell\00" ; <[5 x i8]*> [#uses=1]
- at null = constant [1 x i8] zeroinitializer ; <[1 x i8]*> [#uses=1]
-
-declare i32 @strncmp(i8*, i8*, i32)
-
-; strcmp("", x) -> -*x
-define i32 @test1(i8* %str) {
- %temp1 = call i32 @strncmp(i8* getelementptr inbounds ([1 x i8]* @null, i32 0, i32 0), i8* %str, i32 10)
- ret i32 %temp1
- ; CHECK: @test1
- ; CHECK: %strcmpload = load i8* %str
- ; CHECK: %1 = zext i8 %strcmpload to i32
- ; CHECK: %temp1 = sub i32 0, %1
- ; CHECK: ret i32 %temp1
-}
-
-; strcmp(x, "") -> *x
-define i32 @test2(i8* %str) {
- %temp1 = call i32 @strncmp(i8* %str, i8* getelementptr inbounds ([1 x i8]* @null, i32 0, i32 0), i32 10)
- ret i32 %temp1
- ; CHECK: @test2
- ; CHECK: %strcmpload = load i8* %str
- ; CHECK: %temp1 = zext i8 %strcmpload to i32
- ; CHECK: ret i32 %temp1
-}
-
-; strncmp(x, y, n) -> cnst
-define i32 @test3() {
- %temp1 = call i32 @strncmp(i8* getelementptr inbounds ([5 x i8]* @hell, i32 0, i32 0), i8* getelementptr inbounds ([6 x i8]* @hello, i32 0, i32 0), i32 10)
- ret i32 %temp1
- ; CHECK: @test3
- ; CHECK: ret i32 -1
-}
-define i32 @test4() {
- %temp1 = call i32 @strncmp(i8* getelementptr inbounds ([5 x i8]* @hell, i32 0, i32 0), i8* getelementptr inbounds ([1 x i8]* @null, i32 0, i32 0), i32 10)
- ret i32 %temp1
- ; CHECK: @test4
- ; CHECK: ret i32 1
-}
-define i32 @test5() {
- %temp1 = call i32 @strncmp(i8* getelementptr inbounds ([5 x i8]* @hell, i32 0, i32 0), i8* getelementptr inbounds ([6 x i8]* @hello, i32 0, i32 0), i32 4)
- ret i32 %temp1
- ; CHECK: @test5
- ; CHECK: ret i32 0
-}
-
-; strncmp(x,y,1) -> memcmp(x,y,1)
-define i32 @test6(i8* %str1, i8* %str2) {
- %temp1 = call i32 @strncmp(i8* %str1, i8* %str2, i32 1)
- ret i32 %temp1
- ; CHECK: @test6
- ; CHECK: load i8*
- ; CHECK: load i8*
- ; CHECK: sub i32
-}
-
-; strncmp(x,y,0) -> 0
-define i32 @test7(i8* %str1, i8* %str2) {
- %temp1 = call i32 @strncmp(i8* %str1, i8* %str2, i32 0)
- ret i32 %temp1
- ; CHECK: @test7
- ; CHECK: ret i32 0
-}
-
-; strncmp(x,x,n) -> 0
-define i32 @test8(i8* %str, i32 %n) {
- %temp1 = call i32 @strncmp(i8* %str, i8* %str, i32 %n)
- ret i32 %temp1
- ; CHECK: @test8
- ; CHECK: ret i32 0
-}
Removed: llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrRChr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrRChr.ll?rev=166032&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrRChr.ll (original)
+++ llvm/branches/R600/test/Transforms/SimplifyLibCalls/StrRChr.ll (removed)
@@ -1,23 +0,0 @@
-; Test that the StrRChrOptimizer works correctly
-; RUN: opt < %s -simplify-libcalls -S | FileCheck %s
-
-target datalayout = "-p:64:64:64"
-
- at hello = constant [14 x i8] c"hello world\5Cn\00"
- at null = constant [1 x i8] zeroinitializer
-
-declare i8* @strrchr(i8*, i32)
-
-define void @foo(i8* %bar) {
- %hello_p = getelementptr [14 x i8]* @hello, i32 0, i32 0
- %null_p = getelementptr [1 x i8]* @null, i32 0, i32 0
- %world = call i8* @strrchr(i8* %hello_p, i32 119)
-; CHECK: getelementptr i8* %hello_p, i64 6
- %ignore = call i8* @strrchr(i8* %null_p, i32 119)
-; CHECK-NOT: call i8* strrchr
- %null = call i8* @strrchr(i8* %hello_p, i32 0)
-; CHECK: getelementptr i8* %hello_p, i64 13
- %strchr = call i8* @strrchr(i8* %bar, i32 0)
-; CHECK: call i8* @strchr(i8* %bar, i32 0)
- ret void
-}
Removed: llvm/branches/R600/test/Transforms/SimplifyLibCalls/weak-symbols.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/Transforms/SimplifyLibCalls/weak-symbols.ll?rev=166032&view=auto
==============================================================================
--- llvm/branches/R600/test/Transforms/SimplifyLibCalls/weak-symbols.ll (original)
+++ llvm/branches/R600/test/Transforms/SimplifyLibCalls/weak-symbols.ll (removed)
@@ -1,26 +0,0 @@
-; RUN: opt < %s -simplify-libcalls -S | FileCheck %s
-; PR4738
-
-; SimplifyLibcalls shouldn't assume anything about weak symbols.
-
- at real_init = weak_odr constant [2 x i8] c"y\00"
- at fake_init = weak constant [2 x i8] c"y\00"
- at .str = private constant [2 x i8] c"y\00"
-
-; CHECK: define i32 @foo
-; CHECK: call i32 @strcmp
-define i32 @foo() nounwind {
-entry:
- %t0 = call i32 @strcmp(i8* getelementptr inbounds ([2 x i8]* @fake_init, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8]* @.str, i64 0, i64 0)) nounwind readonly
- ret i32 %t0
-}
-
-; CHECK: define i32 @bar
-; CHECK: ret i32 0
-define i32 @bar() nounwind {
-entry:
- %t0 = call i32 @strcmp(i8* getelementptr inbounds ([2 x i8]* @real_init, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8]* @.str, i64 0, i64 0)) nounwind readonly
- ret i32 %t0
-}
-
-declare i32 @strcmp(i8*, i8*) nounwind readonly
Modified: llvm/branches/R600/tools/bugpoint-passes/bugpoint.exports
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/tools/bugpoint-passes/bugpoint.exports?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/tools/bugpoint-passes/bugpoint.exports (original)
+++ llvm/branches/R600/tools/bugpoint-passes/bugpoint.exports Tue Oct 16 12:52:57 2012
@@ -0,0 +1 @@
+_ZN4llvm14BasicBlockPass14doFinalizationERNS_6ModuleE
Modified: llvm/branches/R600/tools/llc/llc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/tools/llc/llc.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/tools/llc/llc.cpp (original)
+++ llvm/branches/R600/tools/llc/llc.cpp Tue Oct 16 12:52:57 2012
@@ -21,6 +21,7 @@
#include "llvm/ADT/Triple.h"
#include "llvm/Assembly/PrintModulePass.h"
#include "llvm/Support/IRReader.h"
+#include "llvm/CodeGen/CommandFlags.h"
#include "llvm/CodeGen/LinkAllAsmWriterComponents.h"
#include "llvm/CodeGen/LinkAllCodegenComponents.h"
#include "llvm/MC/SubtargetFeature.h"
@@ -62,216 +63,13 @@
static cl::opt<std::string>
TargetTriple("mtriple", cl::desc("Override target triple for module"));
-static cl::opt<std::string>
-MArch("march", cl::desc("Architecture to generate code for (see --version)"));
-
-static cl::opt<std::string>
-MCPU("mcpu",
- cl::desc("Target a specific cpu type (-mcpu=help for details)"),
- cl::value_desc("cpu-name"),
- cl::init(""));
-
-static cl::list<std::string>
-MAttrs("mattr",
- cl::CommaSeparated,
- cl::desc("Target specific attributes (-mattr=help for details)"),
- cl::value_desc("a1,+a2,-a3,..."));
-
-static cl::opt<Reloc::Model>
-RelocModel("relocation-model",
- cl::desc("Choose relocation model"),
- cl::init(Reloc::Default),
- cl::values(
- clEnumValN(Reloc::Default, "default",
- "Target default relocation model"),
- clEnumValN(Reloc::Static, "static",
- "Non-relocatable code"),
- clEnumValN(Reloc::PIC_, "pic",
- "Fully relocatable, position independent code"),
- clEnumValN(Reloc::DynamicNoPIC, "dynamic-no-pic",
- "Relocatable external references, non-relocatable code"),
- clEnumValEnd));
-
-static cl::opt<llvm::CodeModel::Model>
-CMModel("code-model",
- cl::desc("Choose code model"),
- cl::init(CodeModel::Default),
- cl::values(clEnumValN(CodeModel::Default, "default",
- "Target default code model"),
- clEnumValN(CodeModel::Small, "small",
- "Small code model"),
- clEnumValN(CodeModel::Kernel, "kernel",
- "Kernel code model"),
- clEnumValN(CodeModel::Medium, "medium",
- "Medium code model"),
- clEnumValN(CodeModel::Large, "large",
- "Large code model"),
- clEnumValEnd));
-
-static cl::opt<bool>
-RelaxAll("mc-relax-all",
- cl::desc("When used with filetype=obj, "
- "relax all fixups in the emitted object file"));
-
-cl::opt<TargetMachine::CodeGenFileType>
-FileType("filetype", cl::init(TargetMachine::CGFT_AssemblyFile),
- cl::desc("Choose a file type (not all types are supported by all targets):"),
- cl::values(
- clEnumValN(TargetMachine::CGFT_AssemblyFile, "asm",
- "Emit an assembly ('.s') file"),
- clEnumValN(TargetMachine::CGFT_ObjectFile, "obj",
- "Emit a native object ('.o') file"),
- clEnumValN(TargetMachine::CGFT_Null, "null",
- "Emit nothing, for performance testing"),
- clEnumValEnd));
-
cl::opt<bool> NoVerify("disable-verify", cl::Hidden,
cl::desc("Do not verify input module"));
-cl::opt<bool> DisableDotLoc("disable-dot-loc", cl::Hidden,
- cl::desc("Do not use .loc entries"));
-
-cl::opt<bool> DisableCFI("disable-cfi", cl::Hidden,
- cl::desc("Do not use .cfi_* directives"));
-
-cl::opt<bool> EnableDwarfDirectory("enable-dwarf-directory", cl::Hidden,
- cl::desc("Use .file directives with an explicit directory."));
-
-static cl::opt<bool>
-DisableRedZone("disable-red-zone",
- cl::desc("Do not emit code that uses the red zone."),
- cl::init(false));
-
-static cl::opt<bool>
-EnableFPMAD("enable-fp-mad",
- cl::desc("Enable less precise MAD instructions to be generated"),
- cl::init(false));
-
-static cl::opt<bool>
-DisableFPElim("disable-fp-elim",
- cl::desc("Disable frame pointer elimination optimization"),
- cl::init(false));
-
-static cl::opt<bool>
-DisableFPElimNonLeaf("disable-non-leaf-fp-elim",
- cl::desc("Disable frame pointer elimination optimization for non-leaf funcs"),
- cl::init(false));
-
-static cl::opt<bool>
-EnableUnsafeFPMath("enable-unsafe-fp-math",
- cl::desc("Enable optimizations that may decrease FP precision"),
- cl::init(false));
-
-static cl::opt<bool>
-EnableNoInfsFPMath("enable-no-infs-fp-math",
- cl::desc("Enable FP math optimizations that assume no +-Infs"),
- cl::init(false));
-
-static cl::opt<bool>
-EnableNoNaNsFPMath("enable-no-nans-fp-math",
- cl::desc("Enable FP math optimizations that assume no NaNs"),
- cl::init(false));
-
-static cl::opt<bool>
-EnableHonorSignDependentRoundingFPMath("enable-sign-dependent-rounding-fp-math",
- cl::Hidden,
- cl::desc("Force codegen to assume rounding mode can change dynamically"),
- cl::init(false));
-
-static cl::opt<bool>
-GenerateSoftFloatCalls("soft-float",
- cl::desc("Generate software floating point library calls"),
- cl::init(false));
-
-static cl::opt<llvm::FloatABI::ABIType>
-FloatABIForCalls("float-abi",
- cl::desc("Choose float ABI type"),
- cl::init(FloatABI::Default),
- cl::values(
- clEnumValN(FloatABI::Default, "default",
- "Target default float ABI type"),
- clEnumValN(FloatABI::Soft, "soft",
- "Soft float ABI (implied by -soft-float)"),
- clEnumValN(FloatABI::Hard, "hard",
- "Hard float ABI (uses FP registers)"),
- clEnumValEnd));
-
-static cl::opt<llvm::FPOpFusion::FPOpFusionMode>
-FuseFPOps("fp-contract",
- cl::desc("Enable aggresive formation of fused FP ops"),
- cl::init(FPOpFusion::Standard),
- cl::values(
- clEnumValN(FPOpFusion::Fast, "fast",
- "Fuse FP ops whenever profitable"),
- clEnumValN(FPOpFusion::Standard, "on",
- "Only fuse 'blessed' FP ops."),
- clEnumValN(FPOpFusion::Strict, "off",
- "Only fuse FP ops when the result won't be effected."),
- clEnumValEnd));
-
-static cl::opt<bool>
-DontPlaceZerosInBSS("nozero-initialized-in-bss",
- cl::desc("Don't place zero-initialized symbols into bss section"),
- cl::init(false));
-
-static cl::opt<bool>
+cl::opt<bool>
DisableSimplifyLibCalls("disable-simplify-libcalls",
- cl::desc("Disable simplify-libcalls"),
- cl::init(false));
-
-static cl::opt<bool>
-EnableGuaranteedTailCallOpt("tailcallopt",
- cl::desc("Turn fastcc calls into tail calls by (potentially) changing ABI."),
- cl::init(false));
-
-static cl::opt<bool>
-DisableTailCalls("disable-tail-calls",
- cl::desc("Never emit tail calls"),
- cl::init(false));
-
-static cl::opt<unsigned>
-OverrideStackAlignment("stack-alignment",
- cl::desc("Override default stack alignment"),
- cl::init(0));
-
-static cl::opt<bool>
-EnableRealignStack("realign-stack",
- cl::desc("Realign stack if needed"),
- cl::init(true));
-
-static cl::opt<std::string>
-TrapFuncName("trap-func", cl::Hidden,
- cl::desc("Emit a call to trap function rather than a trap instruction"),
- cl::init(""));
-
-static cl::opt<bool>
-EnablePIE("enable-pie",
- cl::desc("Assume the creation of a position independent executable."),
- cl::init(false));
-
-static cl::opt<bool>
-SegmentedStacks("segmented-stacks",
- cl::desc("Use segmented stacks if possible."),
- cl::init(false));
-
-static cl::opt<bool>
-UseInitArray("use-init-array",
- cl::desc("Use .init_array instead of .ctors."),
- cl::init(false));
-
-static cl::opt<std::string> StopAfter("stop-after",
- cl::desc("Stop compilation after a specific pass"),
- cl::value_desc("pass-name"),
- cl::init(""));
-static cl::opt<std::string> StartAfter("start-after",
- cl::desc("Resume compilation after a specific pass"),
- cl::value_desc("pass-name"),
- cl::init(""));
-
-static cl::opt<unsigned>
-SSPBufferSize("stack-protector-buffer-size", cl::init(8),
- cl::desc("Lower bound for a buffer to be considered for "
- "stack protection"));
+ cl::desc("Disable simplify-libcalls"),
+ cl::init(false));
// GetFileNameRoot - Helper function to get the basename of a filename.
static inline std::string
@@ -505,6 +303,11 @@
TLI->disableAllFunctions();
PM.add(TLI);
+ if (target.get()) {
+ PM.add(new TargetTransformInfo(target->getScalarTargetTransformInfo(),
+ target->getVectorTargetTransformInfo()));
+ }
+
// Add the target data from the target machine, if it exists, or the module.
if (const DataLayout *TD = Target.getDataLayout())
PM.add(new DataLayout(*TD));
Modified: llvm/branches/R600/tools/lli/lli.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/tools/lli/lli.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/tools/lli/lli.cpp (original)
+++ llvm/branches/R600/tools/lli/lli.cpp Tue Oct 16 12:52:57 2012
@@ -171,6 +171,23 @@
cl::init(false));
cl::opt<bool>
+ GenerateSoftFloatCalls("soft-float",
+ cl::desc("Generate software floating point library calls"),
+ cl::init(false));
+
+ cl::opt<llvm::FloatABI::ABIType>
+ FloatABIForCalls("float-abi",
+ cl::desc("Choose float ABI type"),
+ cl::init(FloatABI::Default),
+ cl::values(
+ clEnumValN(FloatABI::Default, "default",
+ "Target default float ABI type"),
+ clEnumValN(FloatABI::Soft, "soft",
+ "Soft float ABI (implied by -soft-float)"),
+ clEnumValN(FloatABI::Hard, "hard",
+ "Hard float ABI (uses FP registers)"),
+ clEnumValEnd));
+ cl::opt<bool>
// In debug builds, make this default to true.
#ifdef NDEBUG
#define EMIT_DEBUG false
@@ -555,15 +572,22 @@
}
builder.setOptLevel(OLvl);
+ TargetOptions Options;
+ Options.UseSoftFloat = GenerateSoftFloatCalls;
+ if (FloatABIForCalls != FloatABI::Default)
+ Options.FloatABIType = FloatABIForCalls;
+ if (GenerateSoftFloatCalls)
+ FloatABIForCalls = FloatABI::Soft;
+
// Remote target execution doesn't handle EH or debug registration.
if (!RemoteMCJIT) {
- TargetOptions Options;
Options.JITExceptionHandling = EnableJITExceptionHandling;
Options.JITEmitDebugInfo = EmitJitDebugInfo;
Options.JITEmitDebugInfoToDisk = EmitJitDebugInfoToDisk;
- builder.setTargetOptions(Options);
}
+ builder.setTargetOptions(Options);
+
EE = builder.create();
if (!EE) {
if (!ErrorMsg.empty())
Modified: llvm/branches/R600/tools/lto/LTOCodeGenerator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/tools/lto/LTOCodeGenerator.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/tools/lto/LTOCodeGenerator.cpp (original)
+++ llvm/branches/R600/tools/lto/LTOCodeGenerator.cpp Tue Oct 16 12:52:57 2012
@@ -218,12 +218,13 @@
if (_target != NULL)
return false;
- std::string Triple = _linker.getModule()->getTargetTriple();
- if (Triple.empty())
- Triple = sys::getDefaultTargetTriple();
+ std::string TripleStr = _linker.getModule()->getTargetTriple();
+ if (TripleStr.empty())
+ TripleStr = sys::getDefaultTargetTriple();
+ llvm::Triple Triple(TripleStr);
// create target machine from info for merged modules
- const Target *march = TargetRegistry::lookupTarget(Triple, errMsg);
+ const Target *march = TargetRegistry::lookupTarget(TripleStr, errMsg);
if (march == NULL)
return true;
@@ -244,11 +245,18 @@
// construct LTOModule, hand over ownership of module and target
SubtargetFeatures Features;
- Features.getDefaultSubtargetFeatures(llvm::Triple(Triple));
+ Features.getDefaultSubtargetFeatures(Triple);
std::string FeatureStr = Features.getString();
+ // Set a default CPU for Darwin triples.
+ if (_mCpu.empty() && Triple.isOSDarwin()) {
+ if (Triple.getArch() == llvm::Triple::x86_64)
+ _mCpu = "core2";
+ else if (Triple.getArch() == llvm::Triple::x86)
+ _mCpu = "yonah";
+ }
TargetOptions Options;
LTOModule::getTargetOptions(Options);
- _target = march->createTargetMachine(Triple, _mCpu, FeatureStr, Options,
+ _target = march->createTargetMachine(TripleStr, _mCpu, FeatureStr, Options,
RelocModel, CodeModel::Default,
CodeGenOpt::Aggressive);
return false;
@@ -363,6 +371,8 @@
// Add an appropriate DataLayout instance for this module...
passes.add(new DataLayout(*_target->getDataLayout()));
+ passes.add(new TargetTransformInfo(_target->getScalarTargetTransformInfo(),
+ _target->getVectorTargetTransformInfo()));
// Enabling internalize here would use its AllButMain variant. It
// keeps only main if it exists and does nothing for libraries. Instead
Modified: llvm/branches/R600/tools/lto/LTOModule.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/tools/lto/LTOModule.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/tools/lto/LTOModule.cpp (original)
+++ llvm/branches/R600/tools/lto/LTOModule.cpp Tue Oct 16 12:52:57 2012
@@ -278,23 +278,31 @@
return NULL;
}
- std::string Triple = m->getTargetTriple();
- if (Triple.empty())
- Triple = sys::getDefaultTargetTriple();
+ std::string TripleStr = m->getTargetTriple();
+ if (TripleStr.empty())
+ TripleStr = sys::getDefaultTargetTriple();
+ llvm::Triple Triple(TripleStr);
// find machine architecture for this module
- const Target *march = TargetRegistry::lookupTarget(Triple, errMsg);
+ const Target *march = TargetRegistry::lookupTarget(TripleStr, errMsg);
if (!march)
return NULL;
// construct LTOModule, hand over ownership of module and target
SubtargetFeatures Features;
- Features.getDefaultSubtargetFeatures(llvm::Triple(Triple));
+ Features.getDefaultSubtargetFeatures(Triple);
std::string FeatureStr = Features.getString();
+ // Set a default CPU for Darwin triples.
std::string CPU;
+ if (Triple.isOSDarwin()) {
+ if (Triple.getArch() == llvm::Triple::x86_64)
+ CPU = "core2";
+ else if (Triple.getArch() == llvm::Triple::x86)
+ CPU = "yonah";
+ }
TargetOptions Options;
getTargetOptions(Options);
- TargetMachine *target = march->createTargetMachine(Triple, CPU, FeatureStr,
+ TargetMachine *target = march->createTargetMachine(TripleStr, CPU, FeatureStr,
Options);
LTOModule *Ret = new LTOModule(m.take(), target);
if (Ret->parseSymbols(errMsg)) {
Modified: llvm/branches/R600/tools/opt/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/tools/opt/CMakeLists.txt?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/tools/opt/CMakeLists.txt (original)
+++ llvm/branches/R600/tools/opt/CMakeLists.txt Tue Oct 16 12:52:57 2012
@@ -1,4 +1,4 @@
-set(LLVM_LINK_COMPONENTS bitreader asmparser bitwriter instrumentation scalaropts ipo vectorize)
+set(LLVM_LINK_COMPONENTS ${LLVM_TARGETS_TO_BUILD} bitreader asmparser bitwriter instrumentation scalaropts ipo vectorize)
add_llvm_tool(opt
AnalysisWrappers.cpp
Modified: llvm/branches/R600/tools/opt/LLVMBuild.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/tools/opt/LLVMBuild.txt?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/tools/opt/LLVMBuild.txt (original)
+++ llvm/branches/R600/tools/opt/LLVMBuild.txt Tue Oct 16 12:52:57 2012
@@ -19,4 +19,4 @@
type = Tool
name = opt
parent = Tools
-required_libraries = AsmParser BitReader BitWriter IPO Instrumentation Scalar
+required_libraries = AsmParser BitReader BitWriter IPO Instrumentation Scalar all-targets
Modified: llvm/branches/R600/tools/opt/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/tools/opt/Makefile?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/tools/opt/Makefile (original)
+++ llvm/branches/R600/tools/opt/Makefile Tue Oct 16 12:52:57 2012
@@ -9,6 +9,6 @@
LEVEL := ../..
TOOLNAME := opt
-LINK_COMPONENTS := bitreader bitwriter asmparser instrumentation scalaropts ipo vectorize
+LINK_COMPONENTS := bitreader bitwriter asmparser instrumentation scalaropts ipo vectorize all-targets
include $(LEVEL)/Makefile.common
Modified: llvm/branches/R600/tools/opt/opt.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/tools/opt/opt.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/tools/opt/opt.cpp (original)
+++ llvm/branches/R600/tools/opt/opt.cpp Tue Oct 16 12:52:57 2012
@@ -18,6 +18,7 @@
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/CallGraphSCCPass.h"
+#include "llvm/CodeGen/CommandFlags.h"
#include "llvm/Bitcode/ReaderWriter.h"
#include "llvm/Assembly/PrintModulePass.h"
#include "llvm/Analysis/Verifier.h"
@@ -36,7 +37,9 @@
#include "llvm/Support/PluginLoader.h"
#include "llvm/Support/PrettyStackTrace.h"
#include "llvm/Support/SystemUtils.h"
+#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/ToolOutputFile.h"
+#include "llvm/MC/SubtargetFeature.h"
#include "llvm/LinkAllPasses.h"
#include "llvm/LinkAllVMCore.h"
#include "llvm/Transforms/IPO/PassManagerBuilder.h"
@@ -478,6 +481,75 @@
/*RunInliner=*/ !DisableInline);
}
+//===----------------------------------------------------------------------===//
+// CodeGen-related helper functions.
+//
+static TargetOptions GetTargetOptions() {
+ TargetOptions Options;
+ Options.LessPreciseFPMADOption = EnableFPMAD;
+ Options.NoFramePointerElim = DisableFPElim;
+ Options.NoFramePointerElimNonLeaf = DisableFPElimNonLeaf;
+ Options.AllowFPOpFusion = FuseFPOps;
+ Options.UnsafeFPMath = EnableUnsafeFPMath;
+ Options.NoInfsFPMath = EnableNoInfsFPMath;
+ Options.NoNaNsFPMath = EnableNoNaNsFPMath;
+ Options.HonorSignDependentRoundingFPMathOption =
+ EnableHonorSignDependentRoundingFPMath;
+ Options.UseSoftFloat = GenerateSoftFloatCalls;
+ if (FloatABIForCalls != FloatABI::Default)
+ Options.FloatABIType = FloatABIForCalls;
+ Options.NoZerosInBSS = DontPlaceZerosInBSS;
+ Options.GuaranteedTailCallOpt = EnableGuaranteedTailCallOpt;
+ Options.DisableTailCalls = DisableTailCalls;
+ Options.StackAlignmentOverride = OverrideStackAlignment;
+ Options.RealignStack = EnableRealignStack;
+ Options.TrapFuncName = TrapFuncName;
+ Options.PositionIndependentExecutable = EnablePIE;
+ Options.EnableSegmentedStacks = SegmentedStacks;
+ Options.UseInitArray = UseInitArray;
+ Options.SSPBufferSize = SSPBufferSize;
+ return Options;
+}
+
+CodeGenOpt::Level GetCodeGenOptLevel() {
+ if (OptLevelO1)
+ return CodeGenOpt::Less;
+ if (OptLevelO2)
+ return CodeGenOpt::Default;
+ if (OptLevelO3)
+ return CodeGenOpt::Aggressive;
+ return CodeGenOpt::None;
+}
+
+// Returns the TargetMachine instance or zero if no triple is provided.
+static TargetMachine* GetTargetMachine(std::string TripleStr) {
+ if (TripleStr.empty())
+ return 0;
+
+ // Get the target specific parser.
+ std::string Error;
+ Triple TheTriple(Triple::normalize(TargetTriple));
+
+ const Target *TheTarget = TargetRegistry::lookupTarget(MArch, TheTriple,
+ Error);
+ if (!TheTarget) {
+ return 0;
+ }
+
+ // Package up features to be passed to target/subtarget
+ std::string FeaturesStr;
+ if (MAttrs.size()) {
+ SubtargetFeatures Features;
+ for (unsigned i = 0; i != MAttrs.size(); ++i)
+ Features.AddFeature(MAttrs[i]);
+ FeaturesStr = Features.getString();
+ }
+
+ return TheTarget->createTargetMachine(TheTriple.getTriple(),
+ MCPU, FeaturesStr, GetTargetOptions(),
+ RelocModel, CMModel,
+ GetCodeGenOptLevel());
+}
//===----------------------------------------------------------------------===//
// main for opt
@@ -579,6 +651,12 @@
if (TD)
Passes.add(TD);
+ std::auto_ptr<TargetMachine> TM(GetTargetMachine(TargetTriple));
+ if (TM.get()) {
+ Passes.add(new TargetTransformInfo(TM->getScalarTargetTransformInfo(),
+ TM->getVectorTargetTransformInfo()));
+ }
+
OwningPtr<FunctionPassManager> FPasses;
if (OptLevelO1 || OptLevelO2 || OptLevelOs || OptLevelOz || OptLevelO3) {
FPasses.reset(new FunctionPassManager(M.get()));
Modified: llvm/branches/R600/unittests/ADT/BitVectorTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/unittests/ADT/BitVectorTest.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/unittests/ADT/BitVectorTest.cpp (original)
+++ llvm/branches/R600/unittests/ADT/BitVectorTest.cpp Tue Oct 16 12:52:57 2012
@@ -281,5 +281,57 @@
EXPECT_FALSE(A.anyCommon(B));
EXPECT_FALSE(B.anyCommon(A));
}
+
+TYPED_TEST(BitVectorTest, RangeOps) {
+ TypeParam A;
+ A.resize(256);
+ A.reset();
+ A.set(1, 255);
+
+ EXPECT_FALSE(A.test(0));
+ EXPECT_TRUE( A.test(1));
+ EXPECT_TRUE( A.test(23));
+ EXPECT_TRUE( A.test(254));
+ EXPECT_FALSE(A.test(255));
+
+ TypeParam B;
+ B.resize(256);
+ B.set();
+ B.reset(1, 255);
+
+ EXPECT_TRUE( B.test(0));
+ EXPECT_FALSE(B.test(1));
+ EXPECT_FALSE(B.test(23));
+ EXPECT_FALSE(B.test(254));
+ EXPECT_TRUE( B.test(255));
+
+ TypeParam C;
+ C.resize(3);
+ C.reset();
+ C.set(0, 1);
+
+ EXPECT_TRUE(C.test(0));
+ EXPECT_FALSE( C.test(1));
+ EXPECT_FALSE( C.test(2));
+
+ TypeParam D;
+ D.resize(3);
+ D.set();
+ D.reset(0, 1);
+
+ EXPECT_FALSE(D.test(0));
+ EXPECT_TRUE( D.test(1));
+ EXPECT_TRUE( D.test(2));
+
+ TypeParam E;
+ E.resize(128);
+ E.reset();
+ E.set(1, 33);
+
+ EXPECT_FALSE(E.test(0));
+ EXPECT_TRUE( E.test(1));
+ EXPECT_TRUE( E.test(32));
+ EXPECT_FALSE(E.test(33));
+}
}
#endif
Modified: llvm/branches/R600/unittests/ADT/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/unittests/ADT/CMakeLists.txt?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/unittests/ADT/CMakeLists.txt (original)
+++ llvm/branches/R600/unittests/ADT/CMakeLists.txt Tue Oct 16 12:52:57 2012
@@ -13,6 +13,7 @@
FoldingSet.cpp
HashingTest.cpp
ilistTest.cpp
+ ImmutableMapTest.cpp
ImmutableSetTest.cpp
IntEqClassesTest.cpp
IntervalMapTest.cpp
Added: llvm/branches/R600/unittests/ADT/ImmutableMapTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/unittests/ADT/ImmutableMapTest.cpp?rev=166033&view=auto
==============================================================================
--- llvm/branches/R600/unittests/ADT/ImmutableMapTest.cpp (added)
+++ llvm/branches/R600/unittests/ADT/ImmutableMapTest.cpp Tue Oct 16 12:52:57 2012
@@ -0,0 +1,50 @@
+//===----------- ImmutableMapTest.cpp - ImmutableMap unit tests ------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "gtest/gtest.h"
+#include "llvm/ADT/ImmutableMap.h"
+
+using namespace llvm;
+
+namespace {
+
+TEST(ImmutableMapTest, EmptyIntMapTest) {
+ ImmutableMap<int, int>::Factory f;
+
+ EXPECT_TRUE(f.getEmptyMap() == f.getEmptyMap());
+ EXPECT_FALSE(f.getEmptyMap() != f.getEmptyMap());
+ EXPECT_TRUE(f.getEmptyMap().isEmpty());
+
+ ImmutableMap<int, int> S = f.getEmptyMap();
+ EXPECT_EQ(0u, S.getHeight());
+ EXPECT_TRUE(S.begin() == S.end());
+ EXPECT_FALSE(S.begin() != S.end());
+}
+
+TEST(ImmutableMapTest, MultiElemIntMapTest) {
+ ImmutableMap<int, int>::Factory f;
+ ImmutableMap<int, int> S = f.getEmptyMap();
+
+ ImmutableMap<int, int> S2 = f.add(f.add(f.add(S, 3, 10), 4, 11), 5, 12);
+
+ EXPECT_TRUE(S.isEmpty());
+ EXPECT_FALSE(S2.isEmpty());
+
+ EXPECT_EQ(0, S.lookup(3));
+ EXPECT_EQ(0, S.lookup(9));
+
+ EXPECT_EQ(10, *S2.lookup(3));
+ EXPECT_EQ(11, *S2.lookup(4));
+ EXPECT_EQ(12, *S2.lookup(5));
+
+ EXPECT_EQ(5, S2.getMaxElement()->first);
+ EXPECT_EQ(3U, S2.getHeight());
+}
+
+}
Modified: llvm/branches/R600/unittests/ADT/TripleTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/unittests/ADT/TripleTest.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/unittests/ADT/TripleTest.cpp (original)
+++ llvm/branches/R600/unittests/ADT/TripleTest.cpp Tue Oct 16 12:52:57 2012
@@ -105,6 +105,18 @@
EXPECT_EQ(Triple::Linux, T.getOS());
EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
+ T = Triple("powerpc-ibm-aix");
+ EXPECT_EQ(Triple::ppc, T.getArch());
+ EXPECT_EQ(Triple::IBM, T.getVendor());
+ EXPECT_EQ(Triple::AIX, T.getOS());
+ EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
+
+ T = Triple("powerpc64-ibm-aix");
+ EXPECT_EQ(Triple::ppc64, T.getArch());
+ EXPECT_EQ(Triple::IBM, T.getVendor());
+ EXPECT_EQ(Triple::AIX, T.getOS());
+ EXPECT_EQ(Triple::UnknownEnvironment, T.getEnvironment());
+
T = Triple("powerpc-dunno-notsure");
EXPECT_EQ(Triple::ppc, T.getArch());
EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
Modified: llvm/branches/R600/unittests/ExecutionEngine/JIT/JITTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/unittests/ExecutionEngine/JIT/JITTest.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/unittests/ExecutionEngine/JIT/JITTest.cpp (original)
+++ llvm/branches/R600/unittests/ExecutionEngine/JIT/JITTest.cpp Tue Oct 16 12:52:57 2012
@@ -633,6 +633,7 @@
// This function is intentionally defined differently in the statically-compiled
// program from the IR input to the JIT to assert that the JIT doesn't use its
// definition.
+extern "C" int32_t JITTest_AvailableExternallyFunction() LLVM_ATTRIBUTE_USED;
extern "C" int32_t JITTest_AvailableExternallyFunction() {
return 42;
}
Modified: llvm/branches/R600/unittests/Support/Casting.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/unittests/Support/Casting.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/unittests/Support/Casting.cpp (original)
+++ llvm/branches/R600/unittests/Support/Casting.cpp Tue Oct 16 12:52:57 2012
@@ -153,3 +153,54 @@
} // anonymous namespace
bar *llvm::fub() { return 0; }
+
+namespace {
+namespace inferred_upcasting {
+// This test case verifies correct behavior of inferred upcasts when the
+// types are statically known to be OK to upcast. This is the case when,
+// for example, Derived inherits from Base, and we do `isa<Base>(Derived)`.
+
+// Note: This test will actually fail to compile without inferred
+// upcasting.
+
+class Base {
+public:
+ // No classof. We are testing that the upcast is inferred.
+ Base() {}
+};
+
+class Derived : public Base {
+public:
+ Derived() {}
+};
+
+// Even with no explicit classof() in Base, we should still be able to cast
+// Derived to its base class.
+TEST(CastingTest, UpcastIsInferred) {
+ Derived D;
+ EXPECT_TRUE(isa<Base>(D));
+ Base *BP = dyn_cast<Base>(&D);
+ EXPECT_TRUE(BP != NULL);
+}
+
+
+// This test verifies that the inferred upcast takes precedence over an
+// explicitly written one. This is important because it verifies that the
+// dynamic check gets optimized away.
+class UseInferredUpcast {
+public:
+ int Dummy;
+ static bool classof(const UseInferredUpcast *) {
+ return false;
+ }
+};
+
+TEST(CastingTest, InferredUpcastTakesPrecedence) {
+ UseInferredUpcast UIU;
+ // Since the explicit classof() returns false, this will fail if the
+ // explicit one is used.
+ EXPECT_TRUE(isa<UseInferredUpcast>(&UIU));
+}
+
+} // end namespace inferred_upcasting
+} // end anonymous namespace
Modified: llvm/branches/R600/utils/TableGen/AsmMatcherEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/AsmMatcherEmitter.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/AsmMatcherEmitter.cpp (original)
+++ llvm/branches/R600/utils/TableGen/AsmMatcherEmitter.cpp Tue Oct 16 12:52:57 2012
@@ -993,7 +993,7 @@
int SubOpIdx) {
Record *Rec = OI.Rec;
if (SubOpIdx != -1)
- Rec = dynamic_cast<DefInit*>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef();
+ Rec = cast<DefInit>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef();
return getOperandClass(Rec, SubOpIdx);
}
@@ -1007,7 +1007,7 @@
throw "Record `" + Rec->getName() +
"' does not have a ParserMatchClass!\n";
- if (DefInit *DI= dynamic_cast<DefInit*>(R->getValue())) {
+ if (DefInit *DI= dyn_cast<DefInit>(R->getValue())) {
Record *MatchClass = DI->getDef();
if (ClassInfo *CI = AsmOperandClasses[MatchClass])
return CI;
@@ -1185,7 +1185,7 @@
ListInit *Supers = (*it)->getValueAsListInit("SuperClasses");
for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) {
- DefInit *DI = dynamic_cast<DefInit*>(Supers->getElement(i));
+ DefInit *DI = dyn_cast<DefInit>(Supers->getElement(i));
if (!DI) {
PrintError((*it)->getLoc(), "Invalid super class reference!");
continue;
@@ -1203,33 +1203,31 @@
// Get or construct the predicate method name.
Init *PMName = (*it)->getValueInit("PredicateMethod");
- if (StringInit *SI = dynamic_cast<StringInit*>(PMName)) {
+ if (StringInit *SI = dyn_cast<StringInit>(PMName)) {
CI->PredicateMethod = SI->getValue();
} else {
- assert(dynamic_cast<UnsetInit*>(PMName) &&
- "Unexpected PredicateMethod field!");
+ assert(isa<UnsetInit>(PMName) && "Unexpected PredicateMethod field!");
CI->PredicateMethod = "is" + CI->ClassName;
}
// Get or construct the render method name.
Init *RMName = (*it)->getValueInit("RenderMethod");
- if (StringInit *SI = dynamic_cast<StringInit*>(RMName)) {
+ if (StringInit *SI = dyn_cast<StringInit>(RMName)) {
CI->RenderMethod = SI->getValue();
} else {
- assert(dynamic_cast<UnsetInit*>(RMName) &&
- "Unexpected RenderMethod field!");
+ assert(isa<UnsetInit>(RMName) && "Unexpected RenderMethod field!");
CI->RenderMethod = "add" + CI->ClassName + "Operands";
}
// Get the parse method name or leave it as empty.
Init *PRMName = (*it)->getValueInit("ParserMethod");
- if (StringInit *SI = dynamic_cast<StringInit*>(PRMName))
+ if (StringInit *SI = dyn_cast<StringInit>(PRMName))
CI->ParserMethod = SI->getValue();
// Get the diagnostic type or leave it as empty.
// Get the parse method name or leave it as empty.
Init *DiagnosticType = (*it)->getValueInit("DiagnosticType");
- if (StringInit *SI = dynamic_cast<StringInit*>(DiagnosticType))
+ if (StringInit *SI = dyn_cast<StringInit>(DiagnosticType))
CI->DiagnosticType = SI->getValue();
AsmOperandClasses[*it] = CI;
@@ -1716,9 +1714,7 @@
OpOS << "void " << Target.getName() << ClassName << "::\n"
<< "convertToMapAndConstraints(unsigned Kind,\n";
OpOS.indent(27);
- OpOS << "const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n";
- OpOS.indent(27);
- OpOS << "MatchInstMapAndConstraintsImpl &MapAndConstraints) {\n"
+ OpOS << "const SmallVectorImpl<MCParsedAsmOperand*> &Operands) {\n"
<< " assert(Kind < CVT_NUM_SIGNATURES && \"Invalid signature!\");\n"
<< " unsigned NumMCOperands = 0;\n"
<< " const uint8_t *Converter = ConversionTable[Kind];\n"
@@ -1726,9 +1722,11 @@
<< " switch (*p) {\n"
<< " default: llvm_unreachable(\"invalid conversion entry!\");\n"
<< " case CVT_Reg:\n"
+ << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
+ << " Operands[*(p + 1)]->setConstraint(\"m\");\n"
+ << " ++NumMCOperands;\n"
+ << " break;\n"
<< " case CVT_Tied:\n"
- << " MapAndConstraints.push_back(std::make_pair(NumMCOperands,"
- << "\"m\"));\n"
<< " ++NumMCOperands;\n"
<< " break;\n";
@@ -1825,8 +1823,8 @@
// Add a handler for the operand number lookup.
OpOS << " case " << Name << ":\n"
- << " MapAndConstraints.push_back(std::make_pair(NumMCOperands"
- << ",\"m\"));\n"
+ << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
+ << " Operands[*(p + 1)]->setConstraint(\"m\");\n"
<< " NumMCOperands += " << OpInfo.MINumOperands << ";\n"
<< " break;\n";
break;
@@ -1864,8 +1862,8 @@
<< " break;\n";
OpOS << " case " << Name << ":\n"
- << " MapAndConstraints.push_back(std::make_pair(NumMCOperands"
- << ",\"\"));\n"
+ << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
+ << " Operands[*(p + 1)]->setConstraint(\"\");\n"
<< " ++NumMCOperands;\n"
<< " break;\n";
break;
@@ -1895,8 +1893,8 @@
<< " break;\n";
OpOS << " case " << Name << ":\n"
- << " MapAndConstraints.push_back(std::make_pair(NumMCOperands"
- << ",\"m\"));\n"
+ << " Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);\n"
+ << " Operands[*(p + 1)]->setConstraint(\"m\");\n"
<< " ++NumMCOperands;\n"
<< " break;\n";
}
@@ -2606,16 +2604,12 @@
<< " const SmallVectorImpl<MCParsedAsmOperand*> "
<< "&Operands);\n";
OS << " void convertToMapAndConstraints(unsigned Kind,\n ";
- OS << " const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n";
- OS.indent(29);
- OS << "MatchInstMapAndConstraintsImpl &MapAndConstraints);\n";
+ OS << " const SmallVectorImpl<MCParsedAsmOperand*> &Operands);\n";
OS << " bool mnemonicIsValid(StringRef Mnemonic);\n";
OS << " unsigned MatchInstructionImpl(\n";
OS.indent(27);
OS << "const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n"
- << " unsigned &Kind, MCInst &Inst,\n";
- OS.indent(30);
- OS << "MatchInstMapAndConstraintsImpl &MapAndConstraints,\n"
+ << " MCInst &Inst,\n"
<< " unsigned &ErrorInfo,"
<< " bool matchingInlineAsm,\n"
<< " unsigned VariantID = 0);\n";
@@ -2808,8 +2802,7 @@
<< Target.getName() << ClassName << "::\n"
<< "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
<< " &Operands,\n";
- OS << " unsigned &Kind, MCInst &Inst,\n"
- << "SmallVectorImpl<std::pair< unsigned, std::string > > &MapAndConstraints,\n"
+ OS << " MCInst &Inst,\n"
<< "unsigned &ErrorInfo, bool matchingInlineAsm, unsigned VariantID) {\n";
OS << " // Eliminate obvious mismatches.\n";
@@ -2905,10 +2898,8 @@
OS << " }\n";
OS << "\n";
OS << " if (matchingInlineAsm) {\n";
- OS << " Kind = it->ConvertFn;\n";
OS << " Inst.setOpcode(it->Opcode);\n";
- OS << " convertToMapAndConstraints(it->ConvertFn, Operands, "
- << "MapAndConstraints);\n";
+ OS << " convertToMapAndConstraints(it->ConvertFn, Operands);\n";
OS << " return Match_Success;\n";
OS << " }\n\n";
OS << " // We have selected a definite instruction, convert the parsed\n"
Modified: llvm/branches/R600/utils/TableGen/AsmWriterEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/AsmWriterEmitter.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/AsmWriterEmitter.cpp (original)
+++ llvm/branches/R600/utils/TableGen/AsmWriterEmitter.cpp Tue Oct 16 12:52:57 2012
@@ -792,7 +792,7 @@
if (!R->getValueAsBit("EmitAlias"))
continue; // We were told not to emit the alias, but to emit the aliasee.
const DagInit *DI = R->getValueAsDag("ResultInst");
- const DefInit *Op = dynamic_cast<const DefInit*>(DI->getOperator());
+ const DefInit *Op = cast<DefInit>(DI->getOperator());
AliasMap[getQualifiedName(Op->getDef())].push_back(Alias);
}
Modified: llvm/branches/R600/utils/TableGen/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/CMakeLists.txt?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/CMakeLists.txt (original)
+++ llvm/branches/R600/utils/TableGen/CMakeLists.txt Tue Oct 16 12:52:57 2012
@@ -1,5 +1,4 @@
set(LLVM_REQUIRES_EH 1)
-set(LLVM_REQUIRES_RTTI 1)
set(LLVM_LINK_COMPONENTS Support)
add_tablegen(llvm-tblgen LLVM
Modified: llvm/branches/R600/utils/TableGen/CodeEmitterGen.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/CodeEmitterGen.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/CodeEmitterGen.cpp (original)
+++ llvm/branches/R600/utils/TableGen/CodeEmitterGen.cpp Tue Oct 16 12:52:57 2012
@@ -91,11 +91,11 @@
// return the variable bit position. Otherwise return -1.
int CodeEmitterGen::getVariableBit(const std::string &VarName,
BitsInit *BI, int bit) {
- if (VarBitInit *VBI = dynamic_cast<VarBitInit*>(BI->getBit(bit))) {
- if (VarInit *VI = dynamic_cast<VarInit*>(VBI->getBitVar()))
+ if (VarBitInit *VBI = dyn_cast<VarBitInit>(BI->getBit(bit))) {
+ if (VarInit *VI = dyn_cast<VarInit>(VBI->getBitVar()))
if (VI->getName() == VarName)
return VBI->getBitNum();
- } else if (VarInit *VI = dynamic_cast<VarInit*>(BI->getBit(bit))) {
+ } else if (VarInit *VI = dyn_cast<VarInit>(BI->getBit(bit))) {
if (VI->getName() == VarName)
return 0;
}
@@ -269,7 +269,7 @@
// Start by filling in fixed values.
uint64_t Value = 0;
for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) {
- if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(e-i-1)))
+ if (BitInit *B = dyn_cast<BitInit>(BI->getBit(e-i-1)))
Value |= (uint64_t)B->getValue() << (e-i-1);
}
o << " UINT64_C(" << Value << ")," << '\t' << "// " << R->getName() << "\n";
Modified: llvm/branches/R600/utils/TableGen/CodeGenDAGPatterns.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/CodeGenDAGPatterns.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/CodeGenDAGPatterns.cpp (original)
+++ llvm/branches/R600/utils/TableGen/CodeGenDAGPatterns.cpp Tue Oct 16 12:52:57 2012
@@ -582,7 +582,7 @@
static void FindDepVarsOf(TreePatternNode *N, DepVarMap &DepMap) {
if (N->isLeaf()) {
- if (dynamic_cast<DefInit*>(N->getLeafValue()) != NULL)
+ if (isa<DefInit>(N->getLeafValue()))
DepMap[N->getName()]++;
} else {
for (size_t i = 0, e = N->getNumChildren(); i != e; ++i)
@@ -691,7 +691,7 @@
unsigned Size = 3; // The node itself.
// If the root node is a ConstantSDNode, increases its size.
// e.g. (set R32:$dst, 0).
- if (P->isLeaf() && dynamic_cast<IntInit*>(P->getLeafValue()))
+ if (P->isLeaf() && isa<IntInit>(P->getLeafValue()))
Size += 2;
// FIXME: This is a hack to statically increase the priority of patterns
@@ -715,7 +715,7 @@
Child->getType(0) != MVT::Other)
Size += getPatternSize(Child, CGP);
else if (Child->isLeaf()) {
- if (dynamic_cast<IntInit*>(Child->getLeafValue()))
+ if (isa<IntInit>(Child->getLeafValue()))
Size += 5; // Matches a ConstantSDNode (+3) and a specific value (+2).
else if (Child->getComplexPatternInfo(CGP))
Size += getPatternSize(Child, CGP);
@@ -741,7 +741,7 @@
std::string PatternToMatch::getPredicateCheck() const {
std::string PredicateCheck;
for (unsigned i = 0, e = Predicates->getSize(); i != e; ++i) {
- if (DefInit *Pred = dynamic_cast<DefInit*>(Predicates->getElement(i))) {
+ if (DefInit *Pred = dyn_cast<DefInit>(Predicates->getElement(i))) {
Record *Def = Pred->getDef();
if (!Def->isSubClassOf("Predicate")) {
#ifndef NDEBUG
@@ -864,7 +864,7 @@
// The NodeToApply must be a leaf node that is a VT. OtherOperandNum must
// have an integer type that is smaller than the VT.
if (!NodeToApply->isLeaf() ||
- !dynamic_cast<DefInit*>(NodeToApply->getLeafValue()) ||
+ !isa<DefInit>(NodeToApply->getLeafValue()) ||
!static_cast<DefInit*>(NodeToApply->getLeafValue())->getDef()
->isSubClassOf("ValueType"))
TP.error(N->getOperator()->getName() + " expects a VT operand!");
@@ -1021,8 +1021,9 @@
// Get the result tree.
DagInit *Tree = Operator->getValueAsDag("Fragment");
Record *Op = 0;
- if (Tree && dynamic_cast<DefInit*>(Tree->getOperator()))
- Op = dynamic_cast<DefInit*>(Tree->getOperator())->getDef();
+ if (Tree)
+ if (DefInit *DI = dyn_cast<DefInit>(Tree->getOperator()))
+ Op = DI->getDef();
assert(Op && "Invalid Fragment");
return GetNumNodeResults(Op, CDP);
}
@@ -1096,8 +1097,8 @@
return false;
if (isLeaf()) {
- if (DefInit *DI = dynamic_cast<DefInit*>(getLeafValue())) {
- if (DefInit *NDI = dynamic_cast<DefInit*>(N->getLeafValue())) {
+ if (DefInit *DI = dyn_cast<DefInit>(getLeafValue())) {
+ if (DefInit *NDI = dyn_cast<DefInit>(N->getLeafValue())) {
return ((DI->getDef() == NDI->getDef())
&& (DepVars.find(getName()) == DepVars.end()
|| getName() == N->getName()));
@@ -1154,8 +1155,8 @@
TreePatternNode *Child = getChild(i);
if (Child->isLeaf()) {
Init *Val = Child->getLeafValue();
- if (dynamic_cast<DefInit*>(Val) &&
- static_cast<DefInit*>(Val)->getDef()->getName() == "node") {
+ if (isa<DefInit>(Val) &&
+ cast<DefInit>(Val)->getDef()->getName() == "node") {
// We found a use of a formal argument, replace it with its value.
TreePatternNode *NewChild = ArgMap[Child->getName()];
assert(NewChild && "Couldn't find formal argument!");
@@ -1316,8 +1317,7 @@
getOperator() != CDP.get_intrinsic_wo_chain_sdnode())
return 0;
- unsigned IID =
- dynamic_cast<IntInit*>(getChild(0)->getLeafValue())->getValue();
+ unsigned IID = cast<IntInit>(getChild(0)->getLeafValue())->getValue();
return &CDP.getIntrinsicInfo(IID);
}
@@ -1327,7 +1327,7 @@
TreePatternNode::getComplexPatternInfo(const CodeGenDAGPatterns &CGP) const {
if (!isLeaf()) return 0;
- DefInit *DI = dynamic_cast<DefInit*>(getLeafValue());
+ DefInit *DI = dyn_cast<DefInit>(getLeafValue());
if (DI && DI->getDef()->isSubClassOf("ComplexPattern"))
return &CGP.getComplexPattern(DI->getDef());
return 0;
@@ -1380,7 +1380,7 @@
bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
CodeGenDAGPatterns &CDP = TP.getDAGPatterns();
if (isLeaf()) {
- if (DefInit *DI = dynamic_cast<DefInit*>(getLeafValue())) {
+ if (DefInit *DI = dyn_cast<DefInit>(getLeafValue())) {
// If it's a regclass or something else known, include the type.
bool MadeChange = false;
for (unsigned i = 0, e = Types.size(); i != e; ++i)
@@ -1389,7 +1389,7 @@
return MadeChange;
}
- if (IntInit *II = dynamic_cast<IntInit*>(getLeafValue())) {
+ if (IntInit *II = dyn_cast<IntInit>(getLeafValue())) {
assert(Types.size() == 1 && "Invalid IntInit");
// Int inits are always integers. :)
@@ -1641,7 +1641,7 @@
static bool OnlyOnRHSOfCommutative(TreePatternNode *N) {
if (!N->isLeaf() && N->getOperator()->getName() == "imm")
return true;
- if (N->isLeaf() && dynamic_cast<IntInit*>(N->getLeafValue()))
+ if (N->isLeaf() && isa<IntInit>(N->getLeafValue()))
return true;
return false;
}
@@ -1730,7 +1730,7 @@
TreePatternNode *TreePattern::ParseTreePattern(Init *TheInit, StringRef OpName){
- if (DefInit *DI = dynamic_cast<DefInit*>(TheInit)) {
+ if (DefInit *DI = dyn_cast<DefInit>(TheInit)) {
Record *R = DI->getDef();
// Direct reference to a leaf DagNode or PatFrag? Turn it into a
@@ -1754,26 +1754,26 @@
return Res;
}
- if (IntInit *II = dynamic_cast<IntInit*>(TheInit)) {
+ if (IntInit *II = dyn_cast<IntInit>(TheInit)) {
if (!OpName.empty())
error("Constant int argument should not have a name!");
return new TreePatternNode(II, 1);
}
- if (BitsInit *BI = dynamic_cast<BitsInit*>(TheInit)) {
+ if (BitsInit *BI = dyn_cast<BitsInit>(TheInit)) {
// Turn this into an IntInit.
Init *II = BI->convertInitializerTo(IntRecTy::get());
- if (II == 0 || !dynamic_cast<IntInit*>(II))
+ if (II == 0 || !isa<IntInit>(II))
error("Bits value must be constants!");
return ParseTreePattern(II, OpName);
}
- DagInit *Dag = dynamic_cast<DagInit*>(TheInit);
+ DagInit *Dag = dyn_cast<DagInit>(TheInit);
if (!Dag) {
TheInit->dump();
error("Pattern has unexpected init kind!");
}
- DefInit *OpDef = dynamic_cast<DefInit*>(Dag->getOperator());
+ DefInit *OpDef = dyn_cast<DefInit>(Dag->getOperator());
if (!OpDef) error("Pattern has unexpected operator type!");
Record *Operator = OpDef->getDef();
@@ -1938,7 +1938,7 @@
// us to match things like:
// def : Pat<(v1i64 (bitconvert(v2i32 DPR:$src))), (v1i64 DPR:$src)>;
if (Nodes[i] == Trees[0] && Nodes[i]->isLeaf()) {
- DefInit *DI = dynamic_cast<DefInit*>(Nodes[i]->getLeafValue());
+ DefInit *DI = dyn_cast<DefInit>(Nodes[i]->getLeafValue());
if (DI && (DI->getDef()->isSubClassOf("RegisterClass") ||
DI->getDef()->isSubClassOf("RegisterOperand")))
continue;
@@ -2103,7 +2103,7 @@
// Parse the operands list.
DagInit *OpsList = Fragments[i]->getValueAsDag("Operands");
- DefInit *OpsOp = dynamic_cast<DefInit*>(OpsList->getOperator());
+ DefInit *OpsOp = dyn_cast<DefInit>(OpsList->getOperator());
// Special cases: ops == outs == ins. Different names are used to
// improve readability.
if (!OpsOp ||
@@ -2115,9 +2115,8 @@
// Copy over the arguments.
Args.clear();
for (unsigned j = 0, e = OpsList->getNumArgs(); j != e; ++j) {
- if (!dynamic_cast<DefInit*>(OpsList->getArg(j)) ||
- static_cast<DefInit*>(OpsList->getArg(j))->
- getDef()->getName() != "node")
+ if (!isa<DefInit>(OpsList->getArg(j)) ||
+ cast<DefInit>(OpsList->getArg(j))->getDef()->getName() != "node")
P->error("Operands list should all be 'node' values.");
if (OpsList->getArgName(j).empty())
P->error("Operands list should have names for each operand!");
@@ -2218,7 +2217,7 @@
// No name -> not interesting.
if (Pat->getName().empty()) {
if (Pat->isLeaf()) {
- DefInit *DI = dynamic_cast<DefInit*>(Pat->getLeafValue());
+ DefInit *DI = dyn_cast<DefInit>(Pat->getLeafValue());
if (DI && (DI->getDef()->isSubClassOf("RegisterClass") ||
DI->getDef()->isSubClassOf("RegisterOperand")))
I->error("Input " + DI->getDef()->getName() + " must be named!");
@@ -2228,7 +2227,7 @@
Record *Rec;
if (Pat->isLeaf()) {
- DefInit *DI = dynamic_cast<DefInit*>(Pat->getLeafValue());
+ DefInit *DI = dyn_cast<DefInit>(Pat->getLeafValue());
if (!DI) I->error("Input $" + Pat->getName() + " must be an identifier!");
Rec = DI->getDef();
} else {
@@ -2246,7 +2245,7 @@
}
Record *SlotRec;
if (Slot->isLeaf()) {
- SlotRec = dynamic_cast<DefInit*>(Slot->getLeafValue())->getDef();
+ SlotRec = cast<DefInit>(Slot->getLeafValue())->getDef();
} else {
assert(Slot->getNumChildren() == 0 && "can't be a use with children!");
SlotRec = Slot->getOperator();
@@ -2281,7 +2280,7 @@
if (!Dest->isLeaf())
I->error("implicitly defined value should be a register!");
- DefInit *Val = dynamic_cast<DefInit*>(Dest->getLeafValue());
+ DefInit *Val = dyn_cast<DefInit>(Dest->getLeafValue());
if (!Val || !Val->getDef()->isSubClassOf("Register"))
I->error("implicitly defined value should be a register!");
InstImpResults.push_back(Val->getDef());
@@ -2322,7 +2321,7 @@
if (!Dest->isLeaf())
I->error("set destination should be a register!");
- DefInit *Val = dynamic_cast<DefInit*>(Dest->getLeafValue());
+ DefInit *Val = dyn_cast<DefInit>(Dest->getLeafValue());
if (!Val)
I->error("set destination should be a register!");
@@ -2381,7 +2380,7 @@
return false;
const TreePatternNode *N0 = N->getChild(0);
- if (!N0->isLeaf() || !dynamic_cast<DefInit*>(N0->getLeafValue()))
+ if (!N0->isLeaf() || !isa<DefInit>(N0->getLeafValue()))
return false;
const TreePatternNode *N1 = N->getChild(1);
@@ -2399,7 +2398,7 @@
public:
void AnalyzeNode(const TreePatternNode *N) {
if (N->isLeaf()) {
- if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) {
+ if (DefInit *DI = dyn_cast<DefInit>(N->getLeafValue())) {
Record *LeafRec = DI->getDef();
// Handle ComplexPattern leaves.
if (LeafRec->isSubClassOf("ComplexPattern")) {
@@ -2504,7 +2503,7 @@
/// hasNullFragReference - Return true if the DAG has any reference to the
/// null_frag operator.
static bool hasNullFragReference(DagInit *DI) {
- DefInit *OpDef = dynamic_cast<DefInit*>(DI->getOperator());
+ DefInit *OpDef = dyn_cast<DefInit>(DI->getOperator());
if (!OpDef) return false;
Record *Operator = OpDef->getDef();
@@ -2512,7 +2511,7 @@
if (Operator->getName() == "null_frag") return true;
// If any of the arguments reference the null fragment, return true.
for (unsigned i = 0, e = DI->getNumArgs(); i != e; ++i) {
- DagInit *Arg = dynamic_cast<DagInit*>(DI->getArg(i));
+ DagInit *Arg = dyn_cast<DagInit>(DI->getArg(i));
if (Arg && hasNullFragReference(Arg))
return true;
}
@@ -2524,7 +2523,7 @@
/// the null_frag operator.
static bool hasNullFragReference(ListInit *LI) {
for (unsigned i = 0, e = LI->getSize(); i != e; ++i) {
- DagInit *DI = dynamic_cast<DagInit*>(LI->getElement(i));
+ DagInit *DI = dyn_cast<DagInit>(LI->getElement(i));
assert(DI && "non-dag in an instruction Pattern list?!");
if (hasNullFragReference(DI))
return true;
@@ -2552,7 +2551,7 @@
for (unsigned i = 0, e = Instrs.size(); i != e; ++i) {
ListInit *LI = 0;
- if (dynamic_cast<ListInit*>(Instrs[i]->getValueInit("Pattern")))
+ if (isa<ListInit>(Instrs[i]->getValueInit("Pattern")))
LI = Instrs[i]->getValueAsListInit("Pattern");
// If there is no pattern, only collect minimal information about the
@@ -2647,7 +2646,7 @@
if (i == 0)
Res0Node = RNode;
- Record *R = dynamic_cast<DefInit*>(RNode->getLeafValue())->getDef();
+ Record *R = cast<DefInit>(RNode->getLeafValue())->getDef();
if (R == 0)
I->error("Operand $" + OpName + " should be a set destination: all "
"outputs must occur before inputs in operand list!");
@@ -2689,8 +2688,7 @@
TreePatternNode *InVal = InstInputsCheck[OpName];
InstInputsCheck.erase(OpName); // It occurred, remove from map.
- if (InVal->isLeaf() &&
- dynamic_cast<DefInit*>(InVal->getLeafValue())) {
+ if (InVal->isLeaf() && isa<DefInit>(InVal->getLeafValue())) {
Record *InRec = static_cast<DefInit*>(InVal->getLeafValue())->getDef();
if (Op.Rec != InRec && !InRec->isSubClassOf("ComplexPattern"))
I->error("Operand $" + OpName + "'s register class disagrees"
@@ -3354,7 +3352,7 @@
for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i) {
TreePatternNode *Child = N->getChild(i);
if (Child->isLeaf())
- if (DefInit *DI = dynamic_cast<DefInit*>(Child->getLeafValue())) {
+ if (DefInit *DI = dyn_cast<DefInit>(Child->getLeafValue())) {
Record *RR = DI->getDef();
if (RR->isSubClassOf("Register"))
continue;
Modified: llvm/branches/R600/utils/TableGen/CodeGenInstruction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/CodeGenInstruction.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/CodeGenInstruction.cpp (original)
+++ llvm/branches/R600/utils/TableGen/CodeGenInstruction.cpp Tue Oct 16 12:52:57 2012
@@ -32,7 +32,7 @@
DagInit *OutDI = R->getValueAsDag("OutOperandList");
- if (DefInit *Init = dynamic_cast<DefInit*>(OutDI->getOperator())) {
+ if (DefInit *Init = dyn_cast<DefInit>(OutDI->getOperator())) {
if (Init->getDef()->getName() != "outs")
throw R->getName() + ": invalid def name for output list: use 'outs'";
} else
@@ -41,7 +41,7 @@
NumDefs = OutDI->getNumArgs();
DagInit *InDI = R->getValueAsDag("InOperandList");
- if (DefInit *Init = dynamic_cast<DefInit*>(InDI->getOperator())) {
+ if (DefInit *Init = dyn_cast<DefInit>(InDI->getOperator())) {
if (Init->getDef()->getName() != "ins")
throw R->getName() + ": invalid def name for input list: use 'ins'";
} else
@@ -60,7 +60,7 @@
ArgName = InDI->getArgName(i-NumDefs);
}
- DefInit *Arg = dynamic_cast<DefInit*>(ArgInit);
+ DefInit *Arg = dyn_cast<DefInit>(ArgInit);
if (!Arg)
throw "Illegal operand for the '" + R->getName() + "' instruction!";
@@ -80,9 +80,8 @@
MIOpInfo = Rec->getValueAsDag("MIOperandInfo");
// Verify that MIOpInfo has an 'ops' root value.
- if (!dynamic_cast<DefInit*>(MIOpInfo->getOperator()) ||
- dynamic_cast<DefInit*>(MIOpInfo->getOperator())
- ->getDef()->getName() != "ops")
+ if (!isa<DefInit>(MIOpInfo->getOperator()) ||
+ cast<DefInit>(MIOpInfo->getOperator())->getDef()->getName() != "ops")
throw "Bad value for MIOperandInfo in operand '" + Rec->getName() +
"'\n";
@@ -416,7 +415,7 @@
ArrayRef<SMLoc> Loc, CodeGenTarget &T,
ResultOperand &ResOp) {
Init *Arg = Result->getArg(AliasOpNo);
- DefInit *ADI = dynamic_cast<DefInit*>(Arg);
+ DefInit *ADI = dyn_cast<DefInit>(Arg);
if (ADI && ADI->getDef() == InstOpRec) {
// If the operand is a record, it must have a name, and the record type
@@ -446,7 +445,7 @@
DagInit *DI = InstOpRec->getValueAsDag("MIOperandInfo");
// The operand info should only have a single (register) entry. We
// want the register class of it.
- InstOpRec = dynamic_cast<DefInit*>(DI->getArg(0))->getDef();
+ InstOpRec = cast<DefInit>(DI->getArg(0))->getDef();
}
if (InstOpRec->isSubClassOf("RegisterOperand"))
@@ -486,7 +485,7 @@
}
// Literal integers.
- if (IntInit *II = dynamic_cast<IntInit*>(Arg)) {
+ if (IntInit *II = dyn_cast<IntInit>(Arg)) {
if (hasSubOps || !InstOpRec->isSubClassOf("Operand"))
return false;
// Integer arguments can't have names.
@@ -518,7 +517,7 @@
Result = R->getValueAsDag("ResultInst");
// Verify that the root of the result is an instruction.
- DefInit *DI = dynamic_cast<DefInit*>(Result->getOperator());
+ DefInit *DI = dyn_cast<DefInit>(Result->getOperator());
if (DI == 0 || !DI->getDef()->isSubClassOf("Instruction"))
throw TGError(R->getLoc(), "result of inst alias should be an instruction");
@@ -528,7 +527,7 @@
// the same class.
StringMap<Record*> NameClass;
for (unsigned i = 0, e = Result->getNumArgs(); i != e; ++i) {
- DefInit *ADI = dynamic_cast<DefInit*>(Result->getArg(i));
+ DefInit *ADI = dyn_cast<DefInit>(Result->getArg(i));
if (!ADI || Result->getArgName(i).empty())
continue;
// Verify we don't have something like: (someinst GR16:$foo, GR32:$foo)
@@ -575,7 +574,7 @@
} else {
DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo;
for (unsigned SubOp = 0; SubOp != NumSubOps; ++SubOp) {
- Record *SubRec = dynamic_cast<DefInit*>(MIOI->getArg(SubOp))->getDef();
+ Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef();
// Take care to instantiate each of the suboperands with the correct
// nomenclature: $foo.bar
@@ -596,7 +595,7 @@
for (unsigned SubOp = 0; SubOp != NumSubOps; ++SubOp) {
if (AliasOpNo >= Result->getNumArgs())
throw TGError(R->getLoc(), "not enough arguments for instruction!");
- Record *SubRec = dynamic_cast<DefInit*>(MIOI->getArg(SubOp))->getDef();
+ Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef();
if (tryAliasOpMatch(Result, AliasOpNo, SubRec, false,
R->getLoc(), T, ResOp)) {
ResultOperands.push_back(ResOp);
Modified: llvm/branches/R600/utils/TableGen/CodeGenSchedule.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/CodeGenSchedule.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/CodeGenSchedule.cpp (original)
+++ llvm/branches/R600/utils/TableGen/CodeGenSchedule.cpp Tue Oct 16 12:52:57 2012
@@ -59,7 +59,7 @@
SmallVector<Regex*, 4> RegexList;
for (DagInit::const_arg_iterator
AI = Expr->arg_begin(), AE = Expr->arg_end(); AI != AE; ++AI) {
- StringInit *SI = dynamic_cast<StringInit*>(*AI);
+ StringInit *SI = dyn_cast<StringInit>(*AI);
if (!SI)
throw "instregex requires pattern string: " + Expr->getAsString();
std::string pat = SI->getValue();
Modified: llvm/branches/R600/utils/TableGen/DAGISelMatcher.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/DAGISelMatcher.h?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/DAGISelMatcher.h (original)
+++ llvm/branches/R600/utils/TableGen/DAGISelMatcher.h Tue Oct 16 12:52:57 2012
@@ -99,8 +99,6 @@
OwningPtr<Matcher> &getNextPtr() { return Next; }
- static inline bool classof(const Matcher *) { return true; }
-
bool isEqual(const Matcher *M) const {
if (getKind() != M->getKind()) return false;
return isEqualImpl(M);
Modified: llvm/branches/R600/utils/TableGen/DAGISelMatcherGen.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/DAGISelMatcherGen.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/DAGISelMatcherGen.cpp (original)
+++ llvm/branches/R600/utils/TableGen/DAGISelMatcherGen.cpp Tue Oct 16 12:52:57 2012
@@ -203,7 +203,7 @@
assert(N->isLeaf() && "Not a leaf?");
// Direct match against an integer constant.
- if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue())) {
+ if (IntInit *II = dyn_cast<IntInit>(N->getLeafValue())) {
// If this is the root of the dag we're matching, we emit a redundant opcode
// check to ensure that this gets folded into the normal top-level
// OpcodeSwitch.
@@ -215,7 +215,7 @@
return AddMatcher(new CheckIntegerMatcher(II->getValue()));
}
- DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue());
+ DefInit *DI = dyn_cast<DefInit>(N->getLeafValue());
if (DI == 0) {
errs() << "Unknown leaf kind: " << *N << "\n";
abort();
@@ -283,7 +283,7 @@
N->getOperator()->getName() == "or") &&
N->getChild(1)->isLeaf() && N->getChild(1)->getPredicateFns().empty() &&
N->getPredicateFns().empty()) {
- if (IntInit *II = dynamic_cast<IntInit*>(N->getChild(1)->getLeafValue())) {
+ if (IntInit *II = dyn_cast<IntInit>(N->getChild(1)->getLeafValue())) {
if (!isPowerOf2_32(II->getValue())) { // Don't bother with single bits.
// If this is at the root of the pattern, we emit a redundant
// CheckOpcode so that the following checks get factored properly under
@@ -572,14 +572,14 @@
SmallVectorImpl<unsigned> &ResultOps) {
assert(N->isLeaf() && "Must be a leaf");
- if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue())) {
+ if (IntInit *II = dyn_cast<IntInit>(N->getLeafValue())) {
AddMatcher(new EmitIntegerMatcher(II->getValue(), N->getType(0)));
ResultOps.push_back(NextRecordedOperandNo++);
return;
}
// If this is an explicit register reference, handle it.
- if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) {
+ if (DefInit *DI = dyn_cast<DefInit>(N->getLeafValue())) {
Record *Def = DI->getDef();
if (Def->isSubClassOf("Register")) {
const CodeGenRegister *Reg =
Modified: llvm/branches/R600/utils/TableGen/FastISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/FastISelEmitter.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/FastISelEmitter.cpp (original)
+++ llvm/branches/R600/utils/TableGen/FastISelEmitter.cpp Tue Oct 16 12:52:57 2012
@@ -245,7 +245,7 @@
if (Op->getType(0) != VT)
return false;
- DefInit *OpDI = dynamic_cast<DefInit*>(Op->getLeafValue());
+ DefInit *OpDI = dyn_cast<DefInit>(Op->getLeafValue());
if (!OpDI)
return false;
Record *OpLeafRec = OpDI->getDef();
@@ -406,13 +406,12 @@
if (!Op->isLeaf())
return PhysReg;
- DefInit *OpDI = dynamic_cast<DefInit*>(Op->getLeafValue());
- Record *OpLeafRec = OpDI->getDef();
+ Record *OpLeafRec = cast<DefInit>(Op->getLeafValue())->getDef();
if (!OpLeafRec->isSubClassOf("Register"))
return PhysReg;
- PhysReg += static_cast<StringInit*>(OpLeafRec->getValue( \
- "Namespace")->getValue())->getValue();
+ PhysReg += cast<StringInit>(OpLeafRec->getValue("Namespace")->getValue())
+ ->getValue();
PhysReg += "::";
PhysReg += Target.getRegBank().getReg(OpLeafRec)->getName();
return PhysReg;
@@ -473,7 +472,7 @@
// a bit too complicated for now.
if (!Dst->getChild(1)->isLeaf()) continue;
- DefInit *SR = dynamic_cast<DefInit*>(Dst->getChild(1)->getLeafValue());
+ DefInit *SR = dyn_cast<DefInit>(Dst->getChild(1)->getLeafValue());
if (SR)
SubRegNo = getQualifiedName(SR->getDef());
else
Modified: llvm/branches/R600/utils/TableGen/FixedLenDecoderEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/FixedLenDecoderEmitter.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/FixedLenDecoderEmitter.cpp (original)
+++ llvm/branches/R600/utils/TableGen/FixedLenDecoderEmitter.cpp Tue Oct 16 12:52:57 2012
@@ -142,7 +142,7 @@
return ValueNotSet(V) ? -1 : (V == BIT_FALSE ? 0 : 1);
}
static bit_value_t bitFromBits(const BitsInit &bits, unsigned index) {
- if (BitInit *bit = dynamic_cast<BitInit*>(bits.getBit(index)))
+ if (BitInit *bit = dyn_cast<BitInit>(bits.getBit(index)))
return bit->getValue() ? BIT_TRUE : BIT_FALSE;
// The bit is uninitialized.
@@ -1757,8 +1757,8 @@
// for decoding register classes.
// FIXME: This need to be extended to handle instructions with custom
// decoder methods, and operands with (simple) MIOperandInfo's.
- TypedInit *TI = dynamic_cast<TypedInit*>(NI->first);
- RecordRecTy *Type = dyn_cast<RecordRecTy>(TI->getType());
+ TypedInit *TI = cast<TypedInit>(NI->first);
+ RecordRecTy *Type = cast<RecordRecTy>(TI->getType());
Record *TypeRecord = Type->getRecord();
bool isReg = false;
if (TypeRecord->isSubClassOf("RegisterOperand"))
@@ -1770,7 +1770,7 @@
RecordVal *DecoderString = TypeRecord->getValue("DecoderMethod");
StringInit *String = DecoderString ?
- dynamic_cast<StringInit*>(DecoderString->getValue()) : 0;
+ dyn_cast<StringInit>(DecoderString->getValue()) : 0;
if (!isReg && String && String->getValue() != "")
Decoder = String->getValue();
@@ -1781,11 +1781,11 @@
for (unsigned bi = 0; bi < Bits.getNumBits(); ++bi) {
VarInit *Var = 0;
- VarBitInit *BI = dynamic_cast<VarBitInit*>(Bits.getBit(bi));
+ VarBitInit *BI = dyn_cast<VarBitInit>(Bits.getBit(bi));
if (BI)
- Var = dynamic_cast<VarInit*>(BI->getBitVar());
+ Var = dyn_cast<VarInit>(BI->getBitVar());
else
- Var = dynamic_cast<VarInit*>(Bits.getBit(bi));
+ Var = dyn_cast<VarInit>(Bits.getBit(bi));
if (!Var) {
if (Base != ~0U) {
Modified: llvm/branches/R600/utils/TableGen/InstrInfoEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/InstrInfoEmitter.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/InstrInfoEmitter.cpp (original)
+++ llvm/branches/R600/utils/TableGen/InstrInfoEmitter.cpp Tue Oct 16 12:52:57 2012
@@ -89,7 +89,7 @@
for (unsigned j = 0, e = Inst.Operands[i].MINumOperands; j != e; ++j) {
OperandList.push_back(Inst.Operands[i]);
- Record *OpR = dynamic_cast<DefInit*>(MIOI->getArg(j))->getDef();
+ Record *OpR = cast<DefInit>(MIOI->getArg(j))->getDef();
OperandList.back().Rec = OpR;
}
}
@@ -299,7 +299,7 @@
const OperandInfoMapTy &OpInfo,
raw_ostream &OS) {
int MinOperands = 0;
- if (!Inst.Operands.size() == 0)
+ if (!Inst.Operands.empty())
// Each logical operand can be multiple MI operands.
MinOperands = Inst.Operands.back().MIOperandNo +
Inst.Operands.back().MINumOperands;
@@ -345,7 +345,7 @@
if (!TSF) throw "no TSFlags?";
uint64_t Value = 0;
for (unsigned i = 0, e = TSF->getNumBits(); i != e; ++i) {
- if (BitInit *Bit = dynamic_cast<BitInit*>(TSF->getBit(i)))
+ if (BitInit *Bit = dyn_cast<BitInit>(TSF->getBit(i)))
Value |= uint64_t(Bit->getValue()) << i;
else
throw "Invalid TSFlags bit in " + Inst.TheDef->getName();
Modified: llvm/branches/R600/utils/TableGen/IntrinsicEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/IntrinsicEmitter.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/IntrinsicEmitter.cpp (original)
+++ llvm/branches/R600/utils/TableGen/IntrinsicEmitter.cpp Tue Oct 16 12:52:57 2012
@@ -510,10 +510,10 @@
OS << "// Add parameter attributes that are not common to all intrinsics.\n";
OS << "#ifdef GET_INTRINSIC_ATTRIBUTES\n";
if (TargetOnly)
- OS << "static AttrListPtr getAttributes(" << TargetPrefix
+ OS << "static AttrListPtr getAttributes(LLVMContext &C, " << TargetPrefix
<< "Intrinsic::ID id) {\n";
else
- OS << "AttrListPtr Intrinsic::getAttributes(ID id) {\n";
+ OS << "AttrListPtr Intrinsic::getAttributes(LLVMContext &C, ID id) {\n";
// Compute the maximum number of attribute arguments and the map
typedef std::map<const CodeGenIntrinsic*, unsigned,
@@ -582,7 +582,7 @@
++ai;
} while (ai != ae && intrinsic.ArgumentAttributes[ai].first == argNo);
- OS << " AWI[" << numAttrs++ << "] = AttributeWithIndex::get("
+ OS << " AWI[" << numAttrs++ << "] = AttributeWithIndex::get(C, "
<< argNo+1 << ", AttrVec);\n";
}
}
@@ -606,8 +606,8 @@
OS << " AttrVec.push_back(Attributes::ReadNone);\n";
break;
}
- OS << " AWI[" << numAttrs++ << "] = AttributeWithIndex::get(~0, "
- << "AttrVec);\n";
+ OS << " AWI[" << numAttrs++ << "] = AttributeWithIndex::get(C, "
+ << "AttrListPtr::FunctionIndex, AttrVec);\n";
}
if (numAttrs) {
Modified: llvm/branches/R600/utils/TableGen/Makefile
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/Makefile?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/Makefile (original)
+++ llvm/branches/R600/utils/TableGen/Makefile Tue Oct 16 12:52:57 2012
@@ -11,7 +11,6 @@
TOOLNAME = llvm-tblgen
USEDLIBS = LLVMTableGen.a LLVMSupport.a
REQUIRES_EH := 1
-REQUIRES_RTTI := 1
# This tool has no plugins, optimize startup time.
TOOL_NO_EXPORTS = 1
Modified: llvm/branches/R600/utils/TableGen/PseudoLoweringEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/PseudoLoweringEmitter.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/PseudoLoweringEmitter.cpp (original)
+++ llvm/branches/R600/utils/TableGen/PseudoLoweringEmitter.cpp Tue Oct 16 12:52:57 2012
@@ -74,7 +74,7 @@
IndexedMap<OpData> &OperandMap, unsigned BaseIdx) {
unsigned OpsAdded = 0;
for (unsigned i = 0, e = Dag->getNumArgs(); i != e; ++i) {
- if (DefInit *DI = dynamic_cast<DefInit*>(Dag->getArg(i))) {
+ if (DefInit *DI = dyn_cast<DefInit>(Dag->getArg(i))) {
// Physical register reference. Explicit check for the special case
// "zero_reg" definition.
if (DI->getDef()->isSubClassOf("Register") ||
@@ -100,11 +100,11 @@
for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I)
OperandMap[BaseIdx + i + I].Kind = OpData::Operand;
OpsAdded += Insn.Operands[i].MINumOperands;
- } else if (IntInit *II = dynamic_cast<IntInit*>(Dag->getArg(i))) {
+ } else if (IntInit *II = dyn_cast<IntInit>(Dag->getArg(i))) {
OperandMap[BaseIdx + i].Kind = OpData::Imm;
OperandMap[BaseIdx + i].Data.Imm = II->getValue();
++OpsAdded;
- } else if (DagInit *SubDag = dynamic_cast<DagInit*>(Dag->getArg(i))) {
+ } else if (DagInit *SubDag = dyn_cast<DagInit>(Dag->getArg(i))) {
// Just add the operands recursively. This is almost certainly
// a constant value for a complex operand (> 1 MI operand).
unsigned NewOps =
@@ -127,7 +127,7 @@
assert(Dag && "Missing result instruction in pseudo expansion!");
DEBUG(dbgs() << " Result: " << *Dag << "\n");
- DefInit *OpDef = dynamic_cast<DefInit*>(Dag->getOperator());
+ DefInit *OpDef = dyn_cast<DefInit>(Dag->getOperator());
if (!OpDef)
throw TGError(Rec->getLoc(), Rec->getName() +
" has unexpected operator type!");
Modified: llvm/branches/R600/utils/TableGen/RegisterInfoEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/RegisterInfoEmitter.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/RegisterInfoEmitter.cpp (original)
+++ llvm/branches/R600/utils/TableGen/RegisterInfoEmitter.cpp Tue Oct 16 12:52:57 2012
@@ -325,7 +325,7 @@
if (!V || !V->getValue())
continue;
- DefInit *DI = dynamic_cast<DefInit*>(V->getValue());
+ DefInit *DI = cast<DefInit>(V->getValue());
Record *Alias = DI->getDef();
DwarfRegNums[Reg] = DwarfRegNums[Alias];
}
@@ -751,7 +751,7 @@
BitsInit *BI = Reg->getValueAsBitsInit("HWEncoding");
uint64_t Value = 0;
for (unsigned b = 0, be = BI->getNumBits(); b != be; ++b) {
- if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(b)))
+ if (BitInit *B = dyn_cast<BitInit>(BI->getBit(b)))
Value |= (uint64_t)B->getValue() << b;
}
OS << " " << Value << ",\n";
Modified: llvm/branches/R600/utils/TableGen/SetTheory.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/SetTheory.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/SetTheory.cpp (original)
+++ llvm/branches/R600/utils/TableGen/SetTheory.cpp Tue Oct 16 12:52:57 2012
@@ -72,7 +72,7 @@
throw "Operator requires (Op Set, Int) arguments: " + Expr->getAsString();
RecSet Set;
ST.evaluate(Expr->arg_begin()[0], Set);
- IntInit *II = dynamic_cast<IntInit*>(Expr->arg_begin()[1]);
+ IntInit *II = dyn_cast<IntInit>(Expr->arg_begin()[1]);
if (!II)
throw "Second argument must be an integer: " + Expr->getAsString();
apply2(ST, Expr, Set, II->getValue(), Elts);
@@ -165,27 +165,27 @@
throw "Bad args to (sequence \"Format\", From, To): " +
Expr->getAsString();
else if (Expr->arg_size() == 4) {
- if (IntInit *II = dynamic_cast<IntInit*>(Expr->arg_begin()[3])) {
+ if (IntInit *II = dyn_cast<IntInit>(Expr->arg_begin()[3])) {
Step = II->getValue();
} else
throw "Stride must be an integer: " + Expr->getAsString();
}
std::string Format;
- if (StringInit *SI = dynamic_cast<StringInit*>(Expr->arg_begin()[0]))
+ if (StringInit *SI = dyn_cast<StringInit>(Expr->arg_begin()[0]))
Format = SI->getValue();
else
throw "Format must be a string: " + Expr->getAsString();
int64_t From, To;
- if (IntInit *II = dynamic_cast<IntInit*>(Expr->arg_begin()[1]))
+ if (IntInit *II = dyn_cast<IntInit>(Expr->arg_begin()[1]))
From = II->getValue();
else
throw "From must be an integer: " + Expr->getAsString();
if (From < 0 || From >= (1 << 30))
throw "From out of range";
- if (IntInit *II = dynamic_cast<IntInit*>(Expr->arg_begin()[2]))
+ if (IntInit *II = dyn_cast<IntInit>(Expr->arg_begin()[2]))
To = II->getValue();
else
throw "From must be an integer: " + Expr->getAsString();
@@ -193,7 +193,7 @@
throw "To out of range";
RecordKeeper &Records =
- dynamic_cast<DefInit&>(*Expr->getOperator()).getDef()->getRecords();
+ cast<DefInit>(Expr->getOperator())->getDef()->getRecords();
Step *= From <= To ? 1 : -1;
while (true) {
@@ -261,7 +261,7 @@
void SetTheory::evaluate(Init *Expr, RecSet &Elts) {
// A def in a list can be a just an element, or it may expand.
- if (DefInit *Def = dynamic_cast<DefInit*>(Expr)) {
+ if (DefInit *Def = dyn_cast<DefInit>(Expr)) {
if (const RecVec *Result = expand(Def->getDef()))
return Elts.insert(Result->begin(), Result->end());
Elts.insert(Def->getDef());
@@ -269,14 +269,14 @@
}
// Lists simply expand.
- if (ListInit *LI = dynamic_cast<ListInit*>(Expr))
+ if (ListInit *LI = dyn_cast<ListInit>(Expr))
return evaluate(LI->begin(), LI->end(), Elts);
// Anything else must be a DAG.
- DagInit *DagExpr = dynamic_cast<DagInit*>(Expr);
+ DagInit *DagExpr = dyn_cast<DagInit>(Expr);
if (!DagExpr)
throw "Invalid set element: " + Expr->getAsString();
- DefInit *OpInit = dynamic_cast<DefInit*>(DagExpr->getOperator());
+ DefInit *OpInit = dyn_cast<DefInit>(DagExpr->getOperator());
if (!OpInit)
throw "Bad set expression: " + Expr->getAsString();
Operator *Op = Operators.lookup(OpInit->getDef()->getName());
@@ -296,7 +296,7 @@
const std::vector<Record*> &SC = Set->getSuperClasses();
for (unsigned i = 0, e = SC.size(); i != e; ++i) {
// Skip unnamed superclasses.
- if (!dynamic_cast<const StringInit *>(SC[i]->getNameInit()))
+ if (!dyn_cast<StringInit>(SC[i]->getNameInit()))
continue;
if (Expander *Exp = Expanders.lookup(SC[i]->getName())) {
// This breaks recursive definitions.
Modified: llvm/branches/R600/utils/TableGen/TGValueTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/utils/TableGen/TGValueTypes.cpp?rev=166033&r1=166032&r2=166033&view=diff
==============================================================================
--- llvm/branches/R600/utils/TableGen/TGValueTypes.cpp (original)
+++ llvm/branches/R600/utils/TableGen/TGValueTypes.cpp Tue Oct 16 12:52:57 2012
@@ -15,13 +15,25 @@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/ValueTypes.h"
+#include "llvm/Support/Casting.h"
#include <map>
using namespace llvm;
namespace llvm {
class Type {
+protected:
+ enum TypeKind {
+ TK_ExtendedIntegerType,
+ TK_ExtendedVectorType
+ };
+private:
+ TypeKind Kind;
public:
+ TypeKind getKind() const {
+ return Kind;
+ }
+ Type(TypeKind K) : Kind(K) {}
virtual unsigned getSizeInBits() const = 0;
virtual ~Type() {}
};
@@ -32,7 +44,10 @@
unsigned BitWidth;
public:
explicit ExtendedIntegerType(unsigned bits)
- : BitWidth(bits) {}
+ : Type(TK_ExtendedIntegerType), BitWidth(bits) {}
+ static bool classof(const Type *T) {
+ return T->getKind() == TK_ExtendedIntegerType;
+ }
unsigned getSizeInBits() const {
return getBitWidth();
}
@@ -46,7 +61,10 @@
unsigned NumElements;
public:
ExtendedVectorType(EVT elty, unsigned num)
- : ElementType(elty), NumElements(num) {}
+ : Type(TK_ExtendedVectorType), ElementType(elty), NumElements(num) {}
+ static bool classof(const Type *T) {
+ return T->getKind() == TK_ExtendedVectorType;
+ }
unsigned getSizeInBits() const {
return getNumElements() * getElementType().getSizeInBits();
}
@@ -71,12 +89,12 @@
bool EVT::isExtendedInteger() const {
assert(isExtended() && "Type is not extended!");
- return dynamic_cast<const ExtendedIntegerType *>(LLVMTy) != 0;
+ return isa<ExtendedIntegerType>(LLVMTy);
}
bool EVT::isExtendedVector() const {
assert(isExtended() && "Type is not extended!");
- return dynamic_cast<const ExtendedVectorType *>(LLVMTy) != 0;
+ return isa<ExtendedVectorType>(LLVMTy);
}
bool EVT::isExtended64BitVector() const {
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