[llvm-branch-commits] [llvm-branch] r165967 - in /llvm/branches/R600: lib/Target/AMDGPU/AMDGPUIntrinsics.td lib/Target/AMDGPU/R600Instructions.td test/CodeGen/R600/llvm.AMDGPU.cos.ll test/CodeGen/R600/llvm.AMDGPU.sin.ll test/CodeGen/R600/llvm.cos.ll test/CodeGen/R600/llvm.sin.ll
Tom Stellard
thomas.stellard at amd.com
Mon Oct 15 13:53:41 PDT 2012
Author: tstellar
Date: Mon Oct 15 15:53:41 2012
New Revision: 165967
URL: http://llvm.org/viewvc/llvm-project?rev=165967&view=rev
Log:
R600: add support for cos/sin intrinsic
Patch by: Vincent Lejeune
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Added:
llvm/branches/R600/test/CodeGen/R600/llvm.cos.ll
- copied, changed from r165966, llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.cos.ll
llvm/branches/R600/test/CodeGen/R600/llvm.sin.ll
- copied, changed from r165966, llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.sin.ll
Removed:
llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.cos.ll
llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.sin.ll
Modified:
llvm/branches/R600/lib/Target/AMDGPU/AMDGPUIntrinsics.td
llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td
Modified: llvm/branches/R600/lib/Target/AMDGPU/AMDGPUIntrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/AMDGPUIntrinsics.td?rev=165967&r1=165966&r2=165967&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/AMDGPUIntrinsics.td (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/AMDGPUIntrinsics.td Mon Oct 15 15:53:41 2012
@@ -21,7 +21,6 @@
def int_AMDGPU_arl : Intrinsic<[llvm_i32_ty], [llvm_float_ty], [IntrNoMem]>;
def int_AMDGPU_cndlt : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
- def int_AMDGPU_cos : Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>;
def int_AMDGPU_div : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
def int_AMDGPU_dp4 : Intrinsic<[llvm_float_ty], [llvm_v4f32_ty, llvm_v4f32_ty], [IntrNoMem]>;
def int_AMDGPU_floor : Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>;
@@ -35,7 +34,6 @@
def int_AMDGPU_seq : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
def int_AMDGPU_sgt : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
def int_AMDGPU_sge : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
- def int_AMDGPU_sin : Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>;
def int_AMDGPU_sle : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
def int_AMDGPU_sne : Intrinsic<[llvm_float_ty], [llvm_float_ty, llvm_float_ty], [IntrNoMem]>;
def int_AMDGPU_ssg : Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>;
Modified: llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td?rev=165967&r1=165966&r2=165967&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td Mon Oct 15 15:53:41 2012
@@ -915,8 +915,13 @@
// Helper pattern for normalizing inputs to triginomic instructions for R700+
// cards.
-class TRIG_eg <InstR600 trig, Intrinsic intr> : Pat<
- (intr R600_Reg32:$src),
+class COS_PAT <InstR600 trig> : Pat<
+ (fcos R600_Reg32:$src),
+ (trig (MUL (MOV_IMM_I32 (i32 ALU_LITERAL_X), CONST.TWO_PI_INV), R600_Reg32:$src))
+>;
+
+class SIN_PAT <InstR600 trig> : Pat<
+ (fsin R600_Reg32:$src),
(trig (MUL (MOV_IMM_I32 (i32 ALU_LITERAL_X), CONST.TWO_PI_INV), R600_Reg32:$src))
>;
@@ -929,8 +934,8 @@
def COS_r700 : COS_Common<0x6F>;
// R700 normalizes inputs to SIN/COS the same as EG
- def : TRIG_eg <SIN_r700, int_AMDGPU_sin>;
- def : TRIG_eg <COS_r700, int_AMDGPU_cos>;
+ def : SIN_PAT <SIN_r700>;
+ def : COS_PAT <COS_r700>;
}
//===----------------------------------------------------------------------===//
@@ -1007,8 +1012,8 @@
def SSG_eg : SSG_Common<CNDGT_eg, CNDGE_eg>;
def TGSI_LIT_Z_eg : TGSI_LIT_Z_Common<MUL_LIT_eg, LOG_CLAMPED_eg, EXP_IEEE_eg>;
- def : TRIG_eg <SIN_eg, int_AMDGPU_sin>;
- def : TRIG_eg <COS_eg, int_AMDGPU_cos>;
+ def : SIN_PAT <SIN_eg>;
+ def : COS_PAT <COS_eg>;
def FLT_TO_INT_eg : FLT_TO_INT_Common<0x50> {
let Pattern = [];
Removed: llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.cos.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.cos.ll?rev=165966&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.cos.ll (original)
+++ llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.cos.ll (removed)
@@ -1,16 +0,0 @@
-;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
-
-;CHECK: COS T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
-
-define void @test() {
- %r0 = call float @llvm.R600.load.input(i32 0)
- %r1 = call float @llvm.AMDGPU.cos( float %r0)
- call void @llvm.AMDGPU.store.output(float %r1, i32 0)
- ret void
-}
-
-declare float @llvm.R600.load.input(i32) readnone
-
-declare void @llvm.AMDGPU.store.output(float, i32)
-
-declare float @llvm.AMDGPU.cos(float ) readnone
Removed: llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.sin.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.sin.ll?rev=165966&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.sin.ll (original)
+++ llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.sin.ll (removed)
@@ -1,16 +0,0 @@
-;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
-
-;CHECK: SIN T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
-
-define void @test() {
- %r0 = call float @llvm.R600.load.input(i32 0)
- %r1 = call float @llvm.AMDGPU.sin( float %r0)
- call void @llvm.AMDGPU.store.output(float %r1, i32 0)
- ret void
-}
-
-declare float @llvm.R600.load.input(i32) readnone
-
-declare void @llvm.AMDGPU.store.output(float, i32)
-
-declare float @llvm.AMDGPU.sin(float ) readnone
Copied: llvm/branches/R600/test/CodeGen/R600/llvm.cos.ll (from r165966, llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.cos.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/R600/llvm.cos.ll?p2=llvm/branches/R600/test/CodeGen/R600/llvm.cos.ll&p1=llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.cos.ll&r1=165966&r2=165967&rev=165967&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.cos.ll (original)
+++ llvm/branches/R600/test/CodeGen/R600/llvm.cos.ll Mon Oct 15 15:53:41 2012
@@ -4,13 +4,13 @@
define void @test() {
%r0 = call float @llvm.R600.load.input(i32 0)
- %r1 = call float @llvm.AMDGPU.cos( float %r0)
+ %r1 = call float @llvm.cos.f32(float %r0)
call void @llvm.AMDGPU.store.output(float %r1, i32 0)
ret void
}
+declare float @llvm.cos.f32(float) readnone
+
declare float @llvm.R600.load.input(i32) readnone
declare void @llvm.AMDGPU.store.output(float, i32)
-
-declare float @llvm.AMDGPU.cos(float ) readnone
Copied: llvm/branches/R600/test/CodeGen/R600/llvm.sin.ll (from r165966, llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.sin.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/R600/llvm.sin.ll?p2=llvm/branches/R600/test/CodeGen/R600/llvm.sin.ll&p1=llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.sin.ll&r1=165966&r2=165967&rev=165967&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/R600/llvm.AMDGPU.sin.ll (original)
+++ llvm/branches/R600/test/CodeGen/R600/llvm.sin.ll Mon Oct 15 15:53:41 2012
@@ -4,13 +4,13 @@
define void @test() {
%r0 = call float @llvm.R600.load.input(i32 0)
- %r1 = call float @llvm.AMDGPU.sin( float %r0)
+ %r1 = call float @llvm.sin.f32( float %r0)
call void @llvm.AMDGPU.store.output(float %r1, i32 0)
ret void
}
+declare float @llvm.sin.f32(float) readnone
+
declare float @llvm.R600.load.input(i32) readnone
declare void @llvm.AMDGPU.store.output(float, i32)
-
-declare float @llvm.AMDGPU.sin(float ) readnone
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