[llvm-branch-commits] [llvm-branch] r165965 - in /llvm/branches/R600/lib/Target/AMDGPU: GENERATED_FILES MCTargetDesc/R600MCCodeEmitter.cpp R600Defines.h R600ExpandSpecialInstrs.cpp R600HwRegInfo.include R600RegisterInfo.cpp R600RegisterInfo.h R600RegisterInfo.td

Tom Stellard thomas.stellard at amd.com
Mon Oct 15 13:53:38 PDT 2012


Author: tstellar
Date: Mon Oct 15 15:53:37 2012
New Revision: 165965

URL: http://llvm.org/viewvc/llvm-project?rev=165965&view=rev
Log:
R600: Store channel index in the register's HWEncoding field

Removed:
    llvm/branches/R600/lib/Target/AMDGPU/GENERATED_FILES
    llvm/branches/R600/lib/Target/AMDGPU/R600HwRegInfo.include
Modified:
    llvm/branches/R600/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
    llvm/branches/R600/lib/Target/AMDGPU/R600Defines.h
    llvm/branches/R600/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
    llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.cpp
    llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.h
    llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.td

Removed: llvm/branches/R600/lib/Target/AMDGPU/GENERATED_FILES
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/GENERATED_FILES?rev=165964&view=auto
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/GENERATED_FILES (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/GENERATED_FILES (removed)
@@ -1,13 +0,0 @@
-There are 3 files used by this backend that are generated by perl scripts:
-
-- R600RegisterInfo.td
-  + Generated with:
-    perl R600GenRegisterInfo.pl > R600RegisterInfo.td
-
-- R600HwRegInfo.include
-  + Generated with:
-    perl R600GenRegisterInfo.pl
-
-- SIRegisterInfo.td
-  + Generated with:
-    perl SIGenRegisterInfo.pl > SIRegisterInfo.td

Modified: llvm/branches/R600/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp?rev=165965&r1=165964&r2=165965&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp Mon Oct 15 15:53:37 2012
@@ -78,7 +78,6 @@
   void Emit(uint32_t value, raw_ostream &OS) const;
   void Emit(uint64_t value, raw_ostream &OS) const;
 
-  unsigned getHWRegIndex(unsigned reg) const;
   unsigned getHWRegChan(unsigned reg) const;
   unsigned getHWReg(unsigned regNo) const;
 
@@ -86,9 +85,6 @@
   bool isTexOp(unsigned opcode) const;
   bool isFlagSet(const MCInst &MI, unsigned Operand, unsigned Flag) const;
 
-  /// getHWRegChanGen - Get the register's channel.  Implemented in
-  /// R600HwRegInfo.include.
-  unsigned getHWRegChanGen(unsigned int Reg) const;
 };
 
 } // End anonymous namespace
@@ -606,31 +602,18 @@
 }
 
 unsigned R600MCCodeEmitter::getHWRegChan(unsigned reg) const {
-  switch(reg) {
-  case AMDGPU::ZERO:
-  case AMDGPU::ONE:
-  case AMDGPU::ONE_INT:
-  case AMDGPU::NEG_ONE:
-  case AMDGPU::HALF:
-  case AMDGPU::NEG_HALF:
-  case AMDGPU::ALU_LITERAL_X:
-  case AMDGPU::PREDICATE_BIT:
-  case AMDGPU::PRED_SEL_OFF:
-  case AMDGPU::PRED_SEL_ZERO:
-  case AMDGPU::PRED_SEL_ONE:
-    return 0;
-  default: return getHWRegChanGen(reg);
-  }
+  return MRI.getEncodingValue(reg) >> HW_CHAN_SHIFT;
 }
+
 unsigned R600MCCodeEmitter::getHWReg(unsigned RegNo) const {
-  return MRI.getEncodingValue(RegNo);
+  return MRI.getEncodingValue(RegNo) & HW_REG_MASK;
 }
 
 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI,
                                               const MCOperand &MO,
                                         SmallVectorImpl<MCFixup> &Fixup) const {
   if (MO.isReg()) {
-    return MRI.getEncodingValue(MO.getReg());
+    return getHWReg(MO.getReg());
   } else if (MO.isImm()) {
     return MO.getImm();
   } else {
@@ -694,8 +677,5 @@
   return !!((MI.getOperand(FlagIndex).getImm() >>
             (NUM_MO_FLAGS * Operand)) & Flag);
 }
-#define R600RegisterInfo R600MCCodeEmitter
-#include "R600HwRegInfo.include"
-#undef R600RegisterInfo
 
 #include "AMDGPUGenMCCodeEmitter.inc"

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600Defines.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600Defines.h?rev=165965&r1=165964&r2=165965&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600Defines.h (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600Defines.h Mon Oct 15 15:53:37 2012
@@ -7,6 +7,10 @@
 //
 //===----------------------------------------------------------------------===//
 
+#ifndef R600DEFINES_H_
+#define R600DEFINES_H_
+
+#include "llvm/MC/MCRegisterInfo.h"
 
 // Operand Flags
 #define MO_FLAG_CLAMP (1 << 0)
@@ -33,3 +37,9 @@
     //FlagOperand bits 7, 8
 	};
 }
+
+// Defines for extracting register infomation from register encoding
+#define HW_REG_MASK 0x1ff
+#define HW_CHAN_SHIFT 9
+
+#endif // R600DEFINES_H_

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp?rev=165965&r1=165964&r2=165965&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp Mon Oct 15 15:53:37 2012
@@ -251,7 +251,7 @@
           // Mask the write if the original instruction does not write to
           // the current Channel.
           Flags |= (Chan != TRI.getHWRegChan(DstReg) ? MO_FLAG_MASK : 0);
-          unsigned DstBase = TRI.getEncodingValue(DstReg);
+          unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK;
           DstReg = AMDGPU::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan);
         }
 

Removed: llvm/branches/R600/lib/Target/AMDGPU/R600HwRegInfo.include
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600HwRegInfo.include?rev=165964&view=auto
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600HwRegInfo.include (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600HwRegInfo.include (removed)
@@ -1,1056 +0,0 @@
-
-unsigned R600RegisterInfo::getHWRegChanGen(unsigned reg) const
-{
-  switch(reg) {
-  default: assert(!"Unknown register"); return 0;
- case AMDGPU::C0_Z:
- case AMDGPU::C1_Z:
- case AMDGPU::C2_Z:
- case AMDGPU::C3_Z:
- case AMDGPU::C4_Z:
- case AMDGPU::C5_Z:
- case AMDGPU::C6_Z:
- case AMDGPU::C7_Z:
- case AMDGPU::C8_Z:
- case AMDGPU::C9_Z:
- case AMDGPU::C10_Z:
- case AMDGPU::C11_Z:
- case AMDGPU::C12_Z:
- case AMDGPU::C13_Z:
- case AMDGPU::C14_Z:
- case AMDGPU::C15_Z:
- case AMDGPU::C16_Z:
- case AMDGPU::C17_Z:
- case AMDGPU::C18_Z:
- case AMDGPU::C19_Z:
- case AMDGPU::C20_Z:
- case AMDGPU::C21_Z:
- case AMDGPU::C22_Z:
- case AMDGPU::C23_Z:
- case AMDGPU::C24_Z:
- case AMDGPU::C25_Z:
- case AMDGPU::C26_Z:
- case AMDGPU::C27_Z:
- case AMDGPU::C28_Z:
- case AMDGPU::C29_Z:
- case AMDGPU::C30_Z:
- case AMDGPU::C31_Z:
- case AMDGPU::C32_Z:
- case AMDGPU::C33_Z:
- case AMDGPU::C34_Z:
- case AMDGPU::C35_Z:
- case AMDGPU::C36_Z:
- case AMDGPU::C37_Z:
- case AMDGPU::C38_Z:
- case AMDGPU::C39_Z:
- case AMDGPU::C40_Z:
- case AMDGPU::C41_Z:
- case AMDGPU::C42_Z:
- case AMDGPU::C43_Z:
- case AMDGPU::C44_Z:
- case AMDGPU::C45_Z:
- case AMDGPU::C46_Z:
- case AMDGPU::C47_Z:
- case AMDGPU::C48_Z:
- case AMDGPU::C49_Z:
- case AMDGPU::C50_Z:
- case AMDGPU::C51_Z:
- case AMDGPU::C52_Z:
- case AMDGPU::C53_Z:
- case AMDGPU::C54_Z:
- case AMDGPU::C55_Z:
- case AMDGPU::C56_Z:
- case AMDGPU::C57_Z:
- case AMDGPU::C58_Z:
- case AMDGPU::C59_Z:
- case AMDGPU::C60_Z:
- case AMDGPU::C61_Z:
- case AMDGPU::C62_Z:
- case AMDGPU::C63_Z:
- case AMDGPU::C64_Z:
- case AMDGPU::C65_Z:
- case AMDGPU::C66_Z:
- case AMDGPU::C67_Z:
- case AMDGPU::C68_Z:
- case AMDGPU::C69_Z:
- case AMDGPU::C70_Z:
- case AMDGPU::C71_Z:
- case AMDGPU::C72_Z:
- case AMDGPU::C73_Z:
- case AMDGPU::C74_Z:
- case AMDGPU::C75_Z:
- case AMDGPU::C76_Z:
- case AMDGPU::C77_Z:
- case AMDGPU::C78_Z:
- case AMDGPU::C79_Z:
- case AMDGPU::C80_Z:
- case AMDGPU::C81_Z:
- case AMDGPU::C82_Z:
- case AMDGPU::C83_Z:
- case AMDGPU::C84_Z:
- case AMDGPU::C85_Z:
- case AMDGPU::C86_Z:
- case AMDGPU::C87_Z:
- case AMDGPU::C88_Z:
- case AMDGPU::C89_Z:
- case AMDGPU::C90_Z:
- case AMDGPU::C91_Z:
- case AMDGPU::C92_Z:
- case AMDGPU::C93_Z:
- case AMDGPU::C94_Z:
- case AMDGPU::C95_Z:
- case AMDGPU::C96_Z:
- case AMDGPU::C97_Z:
- case AMDGPU::C98_Z:
- case AMDGPU::C99_Z:
- case AMDGPU::T0_Z:
- case AMDGPU::T1_Z:
- case AMDGPU::T2_Z:
- case AMDGPU::T3_Z:
- case AMDGPU::T4_Z:
- case AMDGPU::T5_Z:
- case AMDGPU::T6_Z:
- case AMDGPU::T7_Z:
- case AMDGPU::T8_Z:
- case AMDGPU::T9_Z:
- case AMDGPU::T10_Z:
- case AMDGPU::T11_Z:
- case AMDGPU::T12_Z:
- case AMDGPU::T13_Z:
- case AMDGPU::T14_Z:
- case AMDGPU::T15_Z:
- case AMDGPU::T16_Z:
- case AMDGPU::T17_Z:
- case AMDGPU::T18_Z:
- case AMDGPU::T19_Z:
- case AMDGPU::T20_Z:
- case AMDGPU::T21_Z:
- case AMDGPU::T22_Z:
- case AMDGPU::T23_Z:
- case AMDGPU::T24_Z:
- case AMDGPU::T25_Z:
- case AMDGPU::T26_Z:
- case AMDGPU::T27_Z:
- case AMDGPU::T28_Z:
- case AMDGPU::T29_Z:
- case AMDGPU::T30_Z:
- case AMDGPU::T31_Z:
- case AMDGPU::T32_Z:
- case AMDGPU::T33_Z:
- case AMDGPU::T34_Z:
- case AMDGPU::T35_Z:
- case AMDGPU::T36_Z:
- case AMDGPU::T37_Z:
- case AMDGPU::T38_Z:
- case AMDGPU::T39_Z:
- case AMDGPU::T40_Z:
- case AMDGPU::T41_Z:
- case AMDGPU::T42_Z:
- case AMDGPU::T43_Z:
- case AMDGPU::T44_Z:
- case AMDGPU::T45_Z:
- case AMDGPU::T46_Z:
- case AMDGPU::T47_Z:
- case AMDGPU::T48_Z:
- case AMDGPU::T49_Z:
- case AMDGPU::T50_Z:
- case AMDGPU::T51_Z:
- case AMDGPU::T52_Z:
- case AMDGPU::T53_Z:
- case AMDGPU::T54_Z:
- case AMDGPU::T55_Z:
- case AMDGPU::T56_Z:
- case AMDGPU::T57_Z:
- case AMDGPU::T58_Z:
- case AMDGPU::T59_Z:
- case AMDGPU::T60_Z:
- case AMDGPU::T61_Z:
- case AMDGPU::T62_Z:
- case AMDGPU::T63_Z:
- case AMDGPU::T64_Z:
- case AMDGPU::T65_Z:
- case AMDGPU::T66_Z:
- case AMDGPU::T67_Z:
- case AMDGPU::T68_Z:
- case AMDGPU::T69_Z:
- case AMDGPU::T70_Z:
- case AMDGPU::T71_Z:
- case AMDGPU::T72_Z:
- case AMDGPU::T73_Z:
- case AMDGPU::T74_Z:
- case AMDGPU::T75_Z:
- case AMDGPU::T76_Z:
- case AMDGPU::T77_Z:
- case AMDGPU::T78_Z:
- case AMDGPU::T79_Z:
- case AMDGPU::T80_Z:
- case AMDGPU::T81_Z:
- case AMDGPU::T82_Z:
- case AMDGPU::T83_Z:
- case AMDGPU::T84_Z:
- case AMDGPU::T85_Z:
- case AMDGPU::T86_Z:
- case AMDGPU::T87_Z:
- case AMDGPU::T88_Z:
- case AMDGPU::T89_Z:
- case AMDGPU::T90_Z:
- case AMDGPU::T91_Z:
- case AMDGPU::T92_Z:
- case AMDGPU::T93_Z:
- case AMDGPU::T94_Z:
- case AMDGPU::T95_Z:
- case AMDGPU::T96_Z:
- case AMDGPU::T97_Z:
- case AMDGPU::T98_Z:
- case AMDGPU::T99_Z:
- case AMDGPU::T100_Z:
- case AMDGPU::T101_Z:
- case AMDGPU::T102_Z:
- case AMDGPU::T103_Z:
- case AMDGPU::T104_Z:
- case AMDGPU::T105_Z:
- case AMDGPU::T106_Z:
- case AMDGPU::T107_Z:
- case AMDGPU::T108_Z:
- case AMDGPU::T109_Z:
- case AMDGPU::T110_Z:
- case AMDGPU::T111_Z:
- case AMDGPU::T112_Z:
- case AMDGPU::T113_Z:
- case AMDGPU::T114_Z:
- case AMDGPU::T115_Z:
- case AMDGPU::T116_Z:
- case AMDGPU::T117_Z:
- case AMDGPU::T118_Z:
- case AMDGPU::T119_Z:
- case AMDGPU::T120_Z:
- case AMDGPU::T121_Z:
- case AMDGPU::T122_Z:
- case AMDGPU::T123_Z:
- case AMDGPU::T124_Z:
- case AMDGPU::T125_Z:
- case AMDGPU::T126_Z:
- case AMDGPU::T127_Z:
-    return 2;
-
- case AMDGPU::C0_W:
- case AMDGPU::C1_W:
- case AMDGPU::C2_W:
- case AMDGPU::C3_W:
- case AMDGPU::C4_W:
- case AMDGPU::C5_W:
- case AMDGPU::C6_W:
- case AMDGPU::C7_W:
- case AMDGPU::C8_W:
- case AMDGPU::C9_W:
- case AMDGPU::C10_W:
- case AMDGPU::C11_W:
- case AMDGPU::C12_W:
- case AMDGPU::C13_W:
- case AMDGPU::C14_W:
- case AMDGPU::C15_W:
- case AMDGPU::C16_W:
- case AMDGPU::C17_W:
- case AMDGPU::C18_W:
- case AMDGPU::C19_W:
- case AMDGPU::C20_W:
- case AMDGPU::C21_W:
- case AMDGPU::C22_W:
- case AMDGPU::C23_W:
- case AMDGPU::C24_W:
- case AMDGPU::C25_W:
- case AMDGPU::C26_W:
- case AMDGPU::C27_W:
- case AMDGPU::C28_W:
- case AMDGPU::C29_W:
- case AMDGPU::C30_W:
- case AMDGPU::C31_W:
- case AMDGPU::C32_W:
- case AMDGPU::C33_W:
- case AMDGPU::C34_W:
- case AMDGPU::C35_W:
- case AMDGPU::C36_W:
- case AMDGPU::C37_W:
- case AMDGPU::C38_W:
- case AMDGPU::C39_W:
- case AMDGPU::C40_W:
- case AMDGPU::C41_W:
- case AMDGPU::C42_W:
- case AMDGPU::C43_W:
- case AMDGPU::C44_W:
- case AMDGPU::C45_W:
- case AMDGPU::C46_W:
- case AMDGPU::C47_W:
- case AMDGPU::C48_W:
- case AMDGPU::C49_W:
- case AMDGPU::C50_W:
- case AMDGPU::C51_W:
- case AMDGPU::C52_W:
- case AMDGPU::C53_W:
- case AMDGPU::C54_W:
- case AMDGPU::C55_W:
- case AMDGPU::C56_W:
- case AMDGPU::C57_W:
- case AMDGPU::C58_W:
- case AMDGPU::C59_W:
- case AMDGPU::C60_W:
- case AMDGPU::C61_W:
- case AMDGPU::C62_W:
- case AMDGPU::C63_W:
- case AMDGPU::C64_W:
- case AMDGPU::C65_W:
- case AMDGPU::C66_W:
- case AMDGPU::C67_W:
- case AMDGPU::C68_W:
- case AMDGPU::C69_W:
- case AMDGPU::C70_W:
- case AMDGPU::C71_W:
- case AMDGPU::C72_W:
- case AMDGPU::C73_W:
- case AMDGPU::C74_W:
- case AMDGPU::C75_W:
- case AMDGPU::C76_W:
- case AMDGPU::C77_W:
- case AMDGPU::C78_W:
- case AMDGPU::C79_W:
- case AMDGPU::C80_W:
- case AMDGPU::C81_W:
- case AMDGPU::C82_W:
- case AMDGPU::C83_W:
- case AMDGPU::C84_W:
- case AMDGPU::C85_W:
- case AMDGPU::C86_W:
- case AMDGPU::C87_W:
- case AMDGPU::C88_W:
- case AMDGPU::C89_W:
- case AMDGPU::C90_W:
- case AMDGPU::C91_W:
- case AMDGPU::C92_W:
- case AMDGPU::C93_W:
- case AMDGPU::C94_W:
- case AMDGPU::C95_W:
- case AMDGPU::C96_W:
- case AMDGPU::C97_W:
- case AMDGPU::C98_W:
- case AMDGPU::C99_W:
- case AMDGPU::T0_W:
- case AMDGPU::T1_W:
- case AMDGPU::T2_W:
- case AMDGPU::T3_W:
- case AMDGPU::T4_W:
- case AMDGPU::T5_W:
- case AMDGPU::T6_W:
- case AMDGPU::T7_W:
- case AMDGPU::T8_W:
- case AMDGPU::T9_W:
- case AMDGPU::T10_W:
- case AMDGPU::T11_W:
- case AMDGPU::T12_W:
- case AMDGPU::T13_W:
- case AMDGPU::T14_W:
- case AMDGPU::T15_W:
- case AMDGPU::T16_W:
- case AMDGPU::T17_W:
- case AMDGPU::T18_W:
- case AMDGPU::T19_W:
- case AMDGPU::T20_W:
- case AMDGPU::T21_W:
- case AMDGPU::T22_W:
- case AMDGPU::T23_W:
- case AMDGPU::T24_W:
- case AMDGPU::T25_W:
- case AMDGPU::T26_W:
- case AMDGPU::T27_W:
- case AMDGPU::T28_W:
- case AMDGPU::T29_W:
- case AMDGPU::T30_W:
- case AMDGPU::T31_W:
- case AMDGPU::T32_W:
- case AMDGPU::T33_W:
- case AMDGPU::T34_W:
- case AMDGPU::T35_W:
- case AMDGPU::T36_W:
- case AMDGPU::T37_W:
- case AMDGPU::T38_W:
- case AMDGPU::T39_W:
- case AMDGPU::T40_W:
- case AMDGPU::T41_W:
- case AMDGPU::T42_W:
- case AMDGPU::T43_W:
- case AMDGPU::T44_W:
- case AMDGPU::T45_W:
- case AMDGPU::T46_W:
- case AMDGPU::T47_W:
- case AMDGPU::T48_W:
- case AMDGPU::T49_W:
- case AMDGPU::T50_W:
- case AMDGPU::T51_W:
- case AMDGPU::T52_W:
- case AMDGPU::T53_W:
- case AMDGPU::T54_W:
- case AMDGPU::T55_W:
- case AMDGPU::T56_W:
- case AMDGPU::T57_W:
- case AMDGPU::T58_W:
- case AMDGPU::T59_W:
- case AMDGPU::T60_W:
- case AMDGPU::T61_W:
- case AMDGPU::T62_W:
- case AMDGPU::T63_W:
- case AMDGPU::T64_W:
- case AMDGPU::T65_W:
- case AMDGPU::T66_W:
- case AMDGPU::T67_W:
- case AMDGPU::T68_W:
- case AMDGPU::T69_W:
- case AMDGPU::T70_W:
- case AMDGPU::T71_W:
- case AMDGPU::T72_W:
- case AMDGPU::T73_W:
- case AMDGPU::T74_W:
- case AMDGPU::T75_W:
- case AMDGPU::T76_W:
- case AMDGPU::T77_W:
- case AMDGPU::T78_W:
- case AMDGPU::T79_W:
- case AMDGPU::T80_W:
- case AMDGPU::T81_W:
- case AMDGPU::T82_W:
- case AMDGPU::T83_W:
- case AMDGPU::T84_W:
- case AMDGPU::T85_W:
- case AMDGPU::T86_W:
- case AMDGPU::T87_W:
- case AMDGPU::T88_W:
- case AMDGPU::T89_W:
- case AMDGPU::T90_W:
- case AMDGPU::T91_W:
- case AMDGPU::T92_W:
- case AMDGPU::T93_W:
- case AMDGPU::T94_W:
- case AMDGPU::T95_W:
- case AMDGPU::T96_W:
- case AMDGPU::T97_W:
- case AMDGPU::T98_W:
- case AMDGPU::T99_W:
- case AMDGPU::T100_W:
- case AMDGPU::T101_W:
- case AMDGPU::T102_W:
- case AMDGPU::T103_W:
- case AMDGPU::T104_W:
- case AMDGPU::T105_W:
- case AMDGPU::T106_W:
- case AMDGPU::T107_W:
- case AMDGPU::T108_W:
- case AMDGPU::T109_W:
- case AMDGPU::T110_W:
- case AMDGPU::T111_W:
- case AMDGPU::T112_W:
- case AMDGPU::T113_W:
- case AMDGPU::T114_W:
- case AMDGPU::T115_W:
- case AMDGPU::T116_W:
- case AMDGPU::T117_W:
- case AMDGPU::T118_W:
- case AMDGPU::T119_W:
- case AMDGPU::T120_W:
- case AMDGPU::T121_W:
- case AMDGPU::T122_W:
- case AMDGPU::T123_W:
- case AMDGPU::T124_W:
- case AMDGPU::T125_W:
- case AMDGPU::T126_W:
- case AMDGPU::T127_W:
-    return 3;
-
- case AMDGPU::C0_X:
- case AMDGPU::C1_X:
- case AMDGPU::C2_X:
- case AMDGPU::C3_X:
- case AMDGPU::C4_X:
- case AMDGPU::C5_X:
- case AMDGPU::C6_X:
- case AMDGPU::C7_X:
- case AMDGPU::C8_X:
- case AMDGPU::C9_X:
- case AMDGPU::C10_X:
- case AMDGPU::C11_X:
- case AMDGPU::C12_X:
- case AMDGPU::C13_X:
- case AMDGPU::C14_X:
- case AMDGPU::C15_X:
- case AMDGPU::C16_X:
- case AMDGPU::C17_X:
- case AMDGPU::C18_X:
- case AMDGPU::C19_X:
- case AMDGPU::C20_X:
- case AMDGPU::C21_X:
- case AMDGPU::C22_X:
- case AMDGPU::C23_X:
- case AMDGPU::C24_X:
- case AMDGPU::C25_X:
- case AMDGPU::C26_X:
- case AMDGPU::C27_X:
- case AMDGPU::C28_X:
- case AMDGPU::C29_X:
- case AMDGPU::C30_X:
- case AMDGPU::C31_X:
- case AMDGPU::C32_X:
- case AMDGPU::C33_X:
- case AMDGPU::C34_X:
- case AMDGPU::C35_X:
- case AMDGPU::C36_X:
- case AMDGPU::C37_X:
- case AMDGPU::C38_X:
- case AMDGPU::C39_X:
- case AMDGPU::C40_X:
- case AMDGPU::C41_X:
- case AMDGPU::C42_X:
- case AMDGPU::C43_X:
- case AMDGPU::C44_X:
- case AMDGPU::C45_X:
- case AMDGPU::C46_X:
- case AMDGPU::C47_X:
- case AMDGPU::C48_X:
- case AMDGPU::C49_X:
- case AMDGPU::C50_X:
- case AMDGPU::C51_X:
- case AMDGPU::C52_X:
- case AMDGPU::C53_X:
- case AMDGPU::C54_X:
- case AMDGPU::C55_X:
- case AMDGPU::C56_X:
- case AMDGPU::C57_X:
- case AMDGPU::C58_X:
- case AMDGPU::C59_X:
- case AMDGPU::C60_X:
- case AMDGPU::C61_X:
- case AMDGPU::C62_X:
- case AMDGPU::C63_X:
- case AMDGPU::C64_X:
- case AMDGPU::C65_X:
- case AMDGPU::C66_X:
- case AMDGPU::C67_X:
- case AMDGPU::C68_X:
- case AMDGPU::C69_X:
- case AMDGPU::C70_X:
- case AMDGPU::C71_X:
- case AMDGPU::C72_X:
- case AMDGPU::C73_X:
- case AMDGPU::C74_X:
- case AMDGPU::C75_X:
- case AMDGPU::C76_X:
- case AMDGPU::C77_X:
- case AMDGPU::C78_X:
- case AMDGPU::C79_X:
- case AMDGPU::C80_X:
- case AMDGPU::C81_X:
- case AMDGPU::C82_X:
- case AMDGPU::C83_X:
- case AMDGPU::C84_X:
- case AMDGPU::C85_X:
- case AMDGPU::C86_X:
- case AMDGPU::C87_X:
- case AMDGPU::C88_X:
- case AMDGPU::C89_X:
- case AMDGPU::C90_X:
- case AMDGPU::C91_X:
- case AMDGPU::C92_X:
- case AMDGPU::C93_X:
- case AMDGPU::C94_X:
- case AMDGPU::C95_X:
- case AMDGPU::C96_X:
- case AMDGPU::C97_X:
- case AMDGPU::C98_X:
- case AMDGPU::C99_X:
- case AMDGPU::T0_X:
- case AMDGPU::T1_X:
- case AMDGPU::T2_X:
- case AMDGPU::T3_X:
- case AMDGPU::T4_X:
- case AMDGPU::T5_X:
- case AMDGPU::T6_X:
- case AMDGPU::T7_X:
- case AMDGPU::T8_X:
- case AMDGPU::T9_X:
- case AMDGPU::T10_X:
- case AMDGPU::T11_X:
- case AMDGPU::T12_X:
- case AMDGPU::T13_X:
- case AMDGPU::T14_X:
- case AMDGPU::T15_X:
- case AMDGPU::T16_X:
- case AMDGPU::T17_X:
- case AMDGPU::T18_X:
- case AMDGPU::T19_X:
- case AMDGPU::T20_X:
- case AMDGPU::T21_X:
- case AMDGPU::T22_X:
- case AMDGPU::T23_X:
- case AMDGPU::T24_X:
- case AMDGPU::T25_X:
- case AMDGPU::T26_X:
- case AMDGPU::T27_X:
- case AMDGPU::T28_X:
- case AMDGPU::T29_X:
- case AMDGPU::T30_X:
- case AMDGPU::T31_X:
- case AMDGPU::T32_X:
- case AMDGPU::T33_X:
- case AMDGPU::T34_X:
- case AMDGPU::T35_X:
- case AMDGPU::T36_X:
- case AMDGPU::T37_X:
- case AMDGPU::T38_X:
- case AMDGPU::T39_X:
- case AMDGPU::T40_X:
- case AMDGPU::T41_X:
- case AMDGPU::T42_X:
- case AMDGPU::T43_X:
- case AMDGPU::T44_X:
- case AMDGPU::T45_X:
- case AMDGPU::T46_X:
- case AMDGPU::T47_X:
- case AMDGPU::T48_X:
- case AMDGPU::T49_X:
- case AMDGPU::T50_X:
- case AMDGPU::T51_X:
- case AMDGPU::T52_X:
- case AMDGPU::T53_X:
- case AMDGPU::T54_X:
- case AMDGPU::T55_X:
- case AMDGPU::T56_X:
- case AMDGPU::T57_X:
- case AMDGPU::T58_X:
- case AMDGPU::T59_X:
- case AMDGPU::T60_X:
- case AMDGPU::T61_X:
- case AMDGPU::T62_X:
- case AMDGPU::T63_X:
- case AMDGPU::T64_X:
- case AMDGPU::T65_X:
- case AMDGPU::T66_X:
- case AMDGPU::T67_X:
- case AMDGPU::T68_X:
- case AMDGPU::T69_X:
- case AMDGPU::T70_X:
- case AMDGPU::T71_X:
- case AMDGPU::T72_X:
- case AMDGPU::T73_X:
- case AMDGPU::T74_X:
- case AMDGPU::T75_X:
- case AMDGPU::T76_X:
- case AMDGPU::T77_X:
- case AMDGPU::T78_X:
- case AMDGPU::T79_X:
- case AMDGPU::T80_X:
- case AMDGPU::T81_X:
- case AMDGPU::T82_X:
- case AMDGPU::T83_X:
- case AMDGPU::T84_X:
- case AMDGPU::T85_X:
- case AMDGPU::T86_X:
- case AMDGPU::T87_X:
- case AMDGPU::T88_X:
- case AMDGPU::T89_X:
- case AMDGPU::T90_X:
- case AMDGPU::T91_X:
- case AMDGPU::T92_X:
- case AMDGPU::T93_X:
- case AMDGPU::T94_X:
- case AMDGPU::T95_X:
- case AMDGPU::T96_X:
- case AMDGPU::T97_X:
- case AMDGPU::T98_X:
- case AMDGPU::T99_X:
- case AMDGPU::T100_X:
- case AMDGPU::T101_X:
- case AMDGPU::T102_X:
- case AMDGPU::T103_X:
- case AMDGPU::T104_X:
- case AMDGPU::T105_X:
- case AMDGPU::T106_X:
- case AMDGPU::T107_X:
- case AMDGPU::T108_X:
- case AMDGPU::T109_X:
- case AMDGPU::T110_X:
- case AMDGPU::T111_X:
- case AMDGPU::T112_X:
- case AMDGPU::T113_X:
- case AMDGPU::T114_X:
- case AMDGPU::T115_X:
- case AMDGPU::T116_X:
- case AMDGPU::T117_X:
- case AMDGPU::T118_X:
- case AMDGPU::T119_X:
- case AMDGPU::T120_X:
- case AMDGPU::T121_X:
- case AMDGPU::T122_X:
- case AMDGPU::T123_X:
- case AMDGPU::T124_X:
- case AMDGPU::T125_X:
- case AMDGPU::T126_X:
- case AMDGPU::T127_X:
- case AMDGPU::T0_XYZW:
- case AMDGPU::T1_XYZW:
- case AMDGPU::T2_XYZW:
- case AMDGPU::T3_XYZW:
- case AMDGPU::T4_XYZW:
- case AMDGPU::T5_XYZW:
- case AMDGPU::T6_XYZW:
- case AMDGPU::T7_XYZW:
- case AMDGPU::T8_XYZW:
- case AMDGPU::T9_XYZW:
- case AMDGPU::T10_XYZW:
- case AMDGPU::T11_XYZW:
- case AMDGPU::T12_XYZW:
- case AMDGPU::T13_XYZW:
- case AMDGPU::T14_XYZW:
- case AMDGPU::T15_XYZW:
- case AMDGPU::T16_XYZW:
- case AMDGPU::T17_XYZW:
- case AMDGPU::T18_XYZW:
- case AMDGPU::T19_XYZW:
- case AMDGPU::T20_XYZW:
- case AMDGPU::T21_XYZW:
- case AMDGPU::T22_XYZW:
- case AMDGPU::T23_XYZW:
- case AMDGPU::T24_XYZW:
- case AMDGPU::T25_XYZW:
- case AMDGPU::T26_XYZW:
- case AMDGPU::T27_XYZW:
- case AMDGPU::T28_XYZW:
- case AMDGPU::T29_XYZW:
- case AMDGPU::T30_XYZW:
- case AMDGPU::T31_XYZW:
- case AMDGPU::T32_XYZW:
- case AMDGPU::T33_XYZW:
- case AMDGPU::T34_XYZW:
- case AMDGPU::T35_XYZW:
- case AMDGPU::T36_XYZW:
- case AMDGPU::T37_XYZW:
- case AMDGPU::T38_XYZW:
- case AMDGPU::T39_XYZW:
- case AMDGPU::T40_XYZW:
- case AMDGPU::T41_XYZW:
- case AMDGPU::T42_XYZW:
- case AMDGPU::T43_XYZW:
- case AMDGPU::T44_XYZW:
- case AMDGPU::T45_XYZW:
- case AMDGPU::T46_XYZW:
- case AMDGPU::T47_XYZW:
- case AMDGPU::T48_XYZW:
- case AMDGPU::T49_XYZW:
- case AMDGPU::T50_XYZW:
- case AMDGPU::T51_XYZW:
- case AMDGPU::T52_XYZW:
- case AMDGPU::T53_XYZW:
- case AMDGPU::T54_XYZW:
- case AMDGPU::T55_XYZW:
- case AMDGPU::T56_XYZW:
- case AMDGPU::T57_XYZW:
- case AMDGPU::T58_XYZW:
- case AMDGPU::T59_XYZW:
- case AMDGPU::T60_XYZW:
- case AMDGPU::T61_XYZW:
- case AMDGPU::T62_XYZW:
- case AMDGPU::T63_XYZW:
- case AMDGPU::T64_XYZW:
- case AMDGPU::T65_XYZW:
- case AMDGPU::T66_XYZW:
- case AMDGPU::T67_XYZW:
- case AMDGPU::T68_XYZW:
- case AMDGPU::T69_XYZW:
- case AMDGPU::T70_XYZW:
- case AMDGPU::T71_XYZW:
- case AMDGPU::T72_XYZW:
- case AMDGPU::T73_XYZW:
- case AMDGPU::T74_XYZW:
- case AMDGPU::T75_XYZW:
- case AMDGPU::T76_XYZW:
- case AMDGPU::T77_XYZW:
- case AMDGPU::T78_XYZW:
- case AMDGPU::T79_XYZW:
- case AMDGPU::T80_XYZW:
- case AMDGPU::T81_XYZW:
- case AMDGPU::T82_XYZW:
- case AMDGPU::T83_XYZW:
- case AMDGPU::T84_XYZW:
- case AMDGPU::T85_XYZW:
- case AMDGPU::T86_XYZW:
- case AMDGPU::T87_XYZW:
- case AMDGPU::T88_XYZW:
- case AMDGPU::T89_XYZW:
- case AMDGPU::T90_XYZW:
- case AMDGPU::T91_XYZW:
- case AMDGPU::T92_XYZW:
- case AMDGPU::T93_XYZW:
- case AMDGPU::T94_XYZW:
- case AMDGPU::T95_XYZW:
- case AMDGPU::T96_XYZW:
- case AMDGPU::T97_XYZW:
- case AMDGPU::T98_XYZW:
- case AMDGPU::T99_XYZW:
- case AMDGPU::T100_XYZW:
- case AMDGPU::T101_XYZW:
- case AMDGPU::T102_XYZW:
- case AMDGPU::T103_XYZW:
- case AMDGPU::T104_XYZW:
- case AMDGPU::T105_XYZW:
- case AMDGPU::T106_XYZW:
- case AMDGPU::T107_XYZW:
- case AMDGPU::T108_XYZW:
- case AMDGPU::T109_XYZW:
- case AMDGPU::T110_XYZW:
- case AMDGPU::T111_XYZW:
- case AMDGPU::T112_XYZW:
- case AMDGPU::T113_XYZW:
- case AMDGPU::T114_XYZW:
- case AMDGPU::T115_XYZW:
- case AMDGPU::T116_XYZW:
- case AMDGPU::T117_XYZW:
- case AMDGPU::T118_XYZW:
- case AMDGPU::T119_XYZW:
- case AMDGPU::T120_XYZW:
- case AMDGPU::T121_XYZW:
- case AMDGPU::T122_XYZW:
- case AMDGPU::T123_XYZW:
- case AMDGPU::T124_XYZW:
- case AMDGPU::T125_XYZW:
- case AMDGPU::T126_XYZW:
- case AMDGPU::T127_XYZW:
-    return 0;
-
- case AMDGPU::C0_Y:
- case AMDGPU::C1_Y:
- case AMDGPU::C2_Y:
- case AMDGPU::C3_Y:
- case AMDGPU::C4_Y:
- case AMDGPU::C5_Y:
- case AMDGPU::C6_Y:
- case AMDGPU::C7_Y:
- case AMDGPU::C8_Y:
- case AMDGPU::C9_Y:
- case AMDGPU::C10_Y:
- case AMDGPU::C11_Y:
- case AMDGPU::C12_Y:
- case AMDGPU::C13_Y:
- case AMDGPU::C14_Y:
- case AMDGPU::C15_Y:
- case AMDGPU::C16_Y:
- case AMDGPU::C17_Y:
- case AMDGPU::C18_Y:
- case AMDGPU::C19_Y:
- case AMDGPU::C20_Y:
- case AMDGPU::C21_Y:
- case AMDGPU::C22_Y:
- case AMDGPU::C23_Y:
- case AMDGPU::C24_Y:
- case AMDGPU::C25_Y:
- case AMDGPU::C26_Y:
- case AMDGPU::C27_Y:
- case AMDGPU::C28_Y:
- case AMDGPU::C29_Y:
- case AMDGPU::C30_Y:
- case AMDGPU::C31_Y:
- case AMDGPU::C32_Y:
- case AMDGPU::C33_Y:
- case AMDGPU::C34_Y:
- case AMDGPU::C35_Y:
- case AMDGPU::C36_Y:
- case AMDGPU::C37_Y:
- case AMDGPU::C38_Y:
- case AMDGPU::C39_Y:
- case AMDGPU::C40_Y:
- case AMDGPU::C41_Y:
- case AMDGPU::C42_Y:
- case AMDGPU::C43_Y:
- case AMDGPU::C44_Y:
- case AMDGPU::C45_Y:
- case AMDGPU::C46_Y:
- case AMDGPU::C47_Y:
- case AMDGPU::C48_Y:
- case AMDGPU::C49_Y:
- case AMDGPU::C50_Y:
- case AMDGPU::C51_Y:
- case AMDGPU::C52_Y:
- case AMDGPU::C53_Y:
- case AMDGPU::C54_Y:
- case AMDGPU::C55_Y:
- case AMDGPU::C56_Y:
- case AMDGPU::C57_Y:
- case AMDGPU::C58_Y:
- case AMDGPU::C59_Y:
- case AMDGPU::C60_Y:
- case AMDGPU::C61_Y:
- case AMDGPU::C62_Y:
- case AMDGPU::C63_Y:
- case AMDGPU::C64_Y:
- case AMDGPU::C65_Y:
- case AMDGPU::C66_Y:
- case AMDGPU::C67_Y:
- case AMDGPU::C68_Y:
- case AMDGPU::C69_Y:
- case AMDGPU::C70_Y:
- case AMDGPU::C71_Y:
- case AMDGPU::C72_Y:
- case AMDGPU::C73_Y:
- case AMDGPU::C74_Y:
- case AMDGPU::C75_Y:
- case AMDGPU::C76_Y:
- case AMDGPU::C77_Y:
- case AMDGPU::C78_Y:
- case AMDGPU::C79_Y:
- case AMDGPU::C80_Y:
- case AMDGPU::C81_Y:
- case AMDGPU::C82_Y:
- case AMDGPU::C83_Y:
- case AMDGPU::C84_Y:
- case AMDGPU::C85_Y:
- case AMDGPU::C86_Y:
- case AMDGPU::C87_Y:
- case AMDGPU::C88_Y:
- case AMDGPU::C89_Y:
- case AMDGPU::C90_Y:
- case AMDGPU::C91_Y:
- case AMDGPU::C92_Y:
- case AMDGPU::C93_Y:
- case AMDGPU::C94_Y:
- case AMDGPU::C95_Y:
- case AMDGPU::C96_Y:
- case AMDGPU::C97_Y:
- case AMDGPU::C98_Y:
- case AMDGPU::C99_Y:
- case AMDGPU::T0_Y:
- case AMDGPU::T1_Y:
- case AMDGPU::T2_Y:
- case AMDGPU::T3_Y:
- case AMDGPU::T4_Y:
- case AMDGPU::T5_Y:
- case AMDGPU::T6_Y:
- case AMDGPU::T7_Y:
- case AMDGPU::T8_Y:
- case AMDGPU::T9_Y:
- case AMDGPU::T10_Y:
- case AMDGPU::T11_Y:
- case AMDGPU::T12_Y:
- case AMDGPU::T13_Y:
- case AMDGPU::T14_Y:
- case AMDGPU::T15_Y:
- case AMDGPU::T16_Y:
- case AMDGPU::T17_Y:
- case AMDGPU::T18_Y:
- case AMDGPU::T19_Y:
- case AMDGPU::T20_Y:
- case AMDGPU::T21_Y:
- case AMDGPU::T22_Y:
- case AMDGPU::T23_Y:
- case AMDGPU::T24_Y:
- case AMDGPU::T25_Y:
- case AMDGPU::T26_Y:
- case AMDGPU::T27_Y:
- case AMDGPU::T28_Y:
- case AMDGPU::T29_Y:
- case AMDGPU::T30_Y:
- case AMDGPU::T31_Y:
- case AMDGPU::T32_Y:
- case AMDGPU::T33_Y:
- case AMDGPU::T34_Y:
- case AMDGPU::T35_Y:
- case AMDGPU::T36_Y:
- case AMDGPU::T37_Y:
- case AMDGPU::T38_Y:
- case AMDGPU::T39_Y:
- case AMDGPU::T40_Y:
- case AMDGPU::T41_Y:
- case AMDGPU::T42_Y:
- case AMDGPU::T43_Y:
- case AMDGPU::T44_Y:
- case AMDGPU::T45_Y:
- case AMDGPU::T46_Y:
- case AMDGPU::T47_Y:
- case AMDGPU::T48_Y:
- case AMDGPU::T49_Y:
- case AMDGPU::T50_Y:
- case AMDGPU::T51_Y:
- case AMDGPU::T52_Y:
- case AMDGPU::T53_Y:
- case AMDGPU::T54_Y:
- case AMDGPU::T55_Y:
- case AMDGPU::T56_Y:
- case AMDGPU::T57_Y:
- case AMDGPU::T58_Y:
- case AMDGPU::T59_Y:
- case AMDGPU::T60_Y:
- case AMDGPU::T61_Y:
- case AMDGPU::T62_Y:
- case AMDGPU::T63_Y:
- case AMDGPU::T64_Y:
- case AMDGPU::T65_Y:
- case AMDGPU::T66_Y:
- case AMDGPU::T67_Y:
- case AMDGPU::T68_Y:
- case AMDGPU::T69_Y:
- case AMDGPU::T70_Y:
- case AMDGPU::T71_Y:
- case AMDGPU::T72_Y:
- case AMDGPU::T73_Y:
- case AMDGPU::T74_Y:
- case AMDGPU::T75_Y:
- case AMDGPU::T76_Y:
- case AMDGPU::T77_Y:
- case AMDGPU::T78_Y:
- case AMDGPU::T79_Y:
- case AMDGPU::T80_Y:
- case AMDGPU::T81_Y:
- case AMDGPU::T82_Y:
- case AMDGPU::T83_Y:
- case AMDGPU::T84_Y:
- case AMDGPU::T85_Y:
- case AMDGPU::T86_Y:
- case AMDGPU::T87_Y:
- case AMDGPU::T88_Y:
- case AMDGPU::T89_Y:
- case AMDGPU::T90_Y:
- case AMDGPU::T91_Y:
- case AMDGPU::T92_Y:
- case AMDGPU::T93_Y:
- case AMDGPU::T94_Y:
- case AMDGPU::T95_Y:
- case AMDGPU::T96_Y:
- case AMDGPU::T97_Y:
- case AMDGPU::T98_Y:
- case AMDGPU::T99_Y:
- case AMDGPU::T100_Y:
- case AMDGPU::T101_Y:
- case AMDGPU::T102_Y:
- case AMDGPU::T103_Y:
- case AMDGPU::T104_Y:
- case AMDGPU::T105_Y:
- case AMDGPU::T106_Y:
- case AMDGPU::T107_Y:
- case AMDGPU::T108_Y:
- case AMDGPU::T109_Y:
- case AMDGPU::T110_Y:
- case AMDGPU::T111_Y:
- case AMDGPU::T112_Y:
- case AMDGPU::T113_Y:
- case AMDGPU::T114_Y:
- case AMDGPU::T115_Y:
- case AMDGPU::T116_Y:
- case AMDGPU::T117_Y:
- case AMDGPU::T118_Y:
- case AMDGPU::T119_Y:
- case AMDGPU::T120_Y:
- case AMDGPU::T121_Y:
- case AMDGPU::T122_Y:
- case AMDGPU::T123_Y:
- case AMDGPU::T124_Y:
- case AMDGPU::T125_Y:
- case AMDGPU::T126_Y:
- case AMDGPU::T127_Y:
-    return 1;
-
-  }
-}
-

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.cpp?rev=165965&r1=165964&r2=165965&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.cpp (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.cpp Mon Oct 15 15:53:37 2012
@@ -13,6 +13,7 @@
 
 #include "R600RegisterInfo.h"
 #include "AMDGPUTargetMachine.h"
+#include "R600Defines.h"
 #include "R600MachineFunctionInfo.h"
 
 using namespace llvm;
@@ -68,21 +69,7 @@
 
 unsigned R600RegisterInfo::getHWRegChan(unsigned reg) const
 {
-  switch(reg) {
-  case AMDGPU::ZERO:
-  case AMDGPU::ONE:
-  case AMDGPU::ONE_INT:
-  case AMDGPU::NEG_ONE:
-  case AMDGPU::HALF:
-  case AMDGPU::NEG_HALF:
-  case AMDGPU::ALU_LITERAL_X:
-  case AMDGPU::PREDICATE_BIT:
-  case AMDGPU::PRED_SEL_OFF:
-  case AMDGPU::PRED_SEL_ZERO:
-  case AMDGPU::PRED_SEL_ONE:
-    return 0;
-  default: return getHWRegChanGen(reg);
-  }
+  return this->getEncodingValue(reg) >> HW_CHAN_SHIFT;
 }
 
 const TargetRegisterClass * R600RegisterInfo::getCFGStructurizerRegClass(
@@ -104,5 +91,3 @@
     case 3: return AMDGPU::sel_w;
   }
 }
-
-#include "R600HwRegInfo.include"

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.h?rev=165965&r1=165964&r2=165965&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.h (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.h Mon Oct 15 15:53:37 2012
@@ -47,10 +47,6 @@
   /// Channel (e.g. getSubRegFromChannel(0) -> AMDGPU::sel_x)
   unsigned getSubRegFromChannel(unsigned Channel) const;
 
-private:
-  /// getHWRegChanGen - Generated function returns a register's channel
-  /// encoding.
-  unsigned getHWRegChanGen(unsigned reg) const;
 };
 
 } // End namespace llvm

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.td?rev=165965&r1=165964&r2=165965&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.td (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600RegisterInfo.td Mon Oct 15 15:53:37 2012
@@ -4,6 +4,18 @@
   let HWEncoding = encoding;
 }
 
+class R600RegWithChan <string name, bits<9> sel, string chan> :
+    Register <name> {
+
+  field bits<2> chan_encoding = !if(!eq(chan, "X"), 0,
+                                !if(!eq(chan, "Y"), 1,
+                                !if(!eq(chan, "Z"), 2,
+                                !if(!eq(chan, "W"), 3, 0))));
+  let HWEncoding{8-0}  = sel;
+  let HWEncoding{10-9} = chan_encoding;
+  let Namespace = "AMDGPU";
+}
+
 class R600Reg_128<string n, list<Register> subregs, bits<16> encoding> :
     RegisterWithSubRegs<n, subregs> {
   let Namespace = "AMDGPU";
@@ -14,11 +26,11 @@
 foreach Index = 0-127 in {
   foreach Chan = [ "X", "Y", "Z", "W" ] in {
     // 32-bit Temporary Registers
-    def T#Index#_#Chan : R600Reg <"T"#Index#"."#Chan, Index>;
+    def T#Index#_#Chan : R600RegWithChan <"T"#Index#"."#Chan, Index, Chan>;
 
     // 32-bit Constant Registers (There are more than 128, this the number
     // that is currently supported.
-    def C#Index#_#Chan : R600Reg <"C"#Index#"."#Chan, Index>;
+    def C#Index#_#Chan : R600RegWithChan <"C"#Index#"."#Chan, Index, Chan>;
   }
   // 128-bit Temporary Registers
   def T#Index#_XYZW : R600Reg_128 <"T"#Index#".XYZW",





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