[llvm-branch-commits] [llvm-branch] r165528 - in /llvm/branches/R600: lib/Target/AMDGPU/R600ISelLowering.cpp test/CodeGen/R600/icmp-select-sete-reverse-args.ll

Tom Stellard thomas.stellard at amd.com
Tue Oct 9 11:49:06 PDT 2012


Author: tstellar
Date: Tue Oct  9 13:49:06 2012
New Revision: 165528

URL: http://llvm.org/viewvc/llvm-project?rev=165528&view=rev
Log:
R600: Handle reversed true/false values in selectcc

Added:
    llvm/branches/R600/test/CodeGen/R600/icmp-select-sete-reverse-args.ll
Modified:
    llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp?rev=165528&r1=165527&r2=165528&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600ISelLowering.cpp Tue Oct  9 13:49:06 2012
@@ -603,6 +603,14 @@
   // We need all the operands of SELECT_CC to have the same value type, so if
   // necessary we need to change True and False to be the same type as LHS and
   // RHS, and then convert the result of the select_cc back to the correct type.
+
+  // Move hardware True/False values to the correct operand.
+  if (isHWTrueValue(False) && isHWFalseValue(True)) {
+    ISD::CondCode CCOpcode = cast<CondCodeSDNode>(CC)->get();
+    std::swap(False, True);
+    CC = DAG.getCondCode(ISD::getSetCCInverse(CCOpcode, CompareVT == MVT::i32));
+  }
+
   if (isHWTrueValue(True) && isHWFalseValue(False)) {
     if (CompareVT !=  VT) {
       if (VT == MVT::f32 && CompareVT == MVT::i32) {
@@ -636,12 +644,6 @@
     }
   }
 
-  // XXX If True is a hardware TRUE value and False is a hardware FALSE value,
-  // we can handle this with a native instruction, but we need to swap true
-  // and false and change the conditional.
-  if (isHWTrueValue(False) && isHWFalseValue(True)) {
-  }
-
   // If we make it this for it means we have no native instructions to handle
   // this SELECT_CC, so we must lower it.
   SDValue HWTrue, HWFalse;

Added: llvm/branches/R600/test/CodeGen/R600/icmp-select-sete-reverse-args.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/R600/icmp-select-sete-reverse-args.ll?rev=165528&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/R600/icmp-select-sete-reverse-args.ll (added)
+++ llvm/branches/R600/test/CodeGen/R600/icmp-select-sete-reverse-args.ll Tue Oct  9 13:49:06 2012
@@ -0,0 +1,18 @@
+;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+
+;Test that a select with reversed True/False values is correctly lowered
+;to a SETNE_INT.  There should only be one SETNE_INT instruction.
+
+;CHECK: SETNE_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
+;CHECK_NOT: SETNE_INT
+
+define void @test(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
+entry:
+  %0 = load i32 addrspace(1)* %in
+  %arrayidx1 = getelementptr inbounds i32 addrspace(1)* %in, i32 1
+  %1 = load i32 addrspace(1)* %arrayidx1
+  %cmp = icmp eq i32 %0, %1
+  %value = select i1 %cmp, i32 0, i32 -1
+  store i32 %value, i32 addrspace(1)* %out
+  ret void
+}





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