[llvm-branch-commits] [llvm-branch] r169296 - in /llvm/branches/release_32: ./ lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h lib/Target/Mips/MipsCodeEmitter.cpp lib/Target/Mips/MipsJITInfo.cpp lib/Target/Mips/MipsJITInfo.h
Pawel Wodnicki
pawel at 32bitmicro.com
Tue Dec 4 12:23:06 PST 2012
Author: pawel
Date: Tue Dec 4 14:23:05 2012
New Revision: 169296
URL: http://llvm.org/viewvc/llvm-project?rev=169296&view=rev
Log:
Merging MIPS JIT/MCJIT changeset into 3.2 release branch.
Merging r169183:
RuntimeDyld: Fix up r169178. MSVC doesn't like "or".
Merging r169178:
Runtime dynamic linker for MCJIT should support MIPS BigEndian architecture.
This small change adds support for that. It will make all MCJIT tests pass
in make-check on BigEndian platforms.
Patch by Petar Jovanovic.
Merging r169177:
Classic JIT is still being supported by MIPS, along with MCJIT.
This change adds endian-awareness to MipsJITInfo and emitWordLE in
MipsCodeEmitter has become emitWord now to support both endianness.
Patch by Petar Jovanovic.
Merging r169174:
Functions in MipsCodeEmitter.cpp that expand unaligned loads/stores are dead
code. Removing it.
Patch by Petar Jovanovic.
Modified:
llvm/branches/release_32/ (props changed)
llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h
llvm/branches/release_32/lib/Target/Mips/MipsCodeEmitter.cpp
llvm/branches/release_32/lib/Target/Mips/MipsJITInfo.cpp
llvm/branches/release_32/lib/Target/Mips/MipsJITInfo.h
Propchange: llvm/branches/release_32/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Tue Dec 4 14:23:05 2012
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Pertwee:110850,110961
/llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,167718-167719,167731,167737,167743,167750,167784,167811,167817,167855,167860-167864,167875,167912,167942,167948,167966,168001,168035,168181,168186,168189,168196-168198,168227,168280,168291,168316,168319-168320,168346,168352,168354,168361,168364,168448,168450,168453,168455-168456,168458,168460,168471,168512,168622,168711,168765,168799,168837,168921,169084
+/llvm/trunk:155241,167718-167719,167731,167737,167743,167750,167784,167811,167817,167855,167860-167864,167875,167912,167942,167948,167966,168001,168035,168181,168186,168189,168196-168198,168227,168280,168291,168316,168319-168320,168346,168352,168354,168361,168364,168448,168450,168453,168455-168456,168458,168460,168471,168512,168622,168711,168765,168799,168837,168921,169084,169174,169177-169178,169183
Modified: llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp?rev=169296&r1=169295&r2=169296&view=diff
==============================================================================
--- llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp (original)
+++ llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp Tue Dec 4 14:23:05 2012
@@ -346,7 +346,7 @@
uint32_t *StubAddr = (uint32_t*)Addr;
*StubAddr = 0xe51ff004; // ldr pc,<label>
return (uint8_t*)++StubAddr;
- } else if (Arch == Triple::mipsel) {
+ } else if (Arch == Triple::mipsel || Arch == Triple::mips) {
uint32_t *StubAddr = (uint32_t*)Addr;
// 0: 3c190000 lui t9,%hi(addr).
// 4: 27390000 addiu t9,t9,%lo(addr).
Modified: llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp?rev=169296&r1=169295&r2=169296&view=diff
==============================================================================
--- llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp (original)
+++ llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp Tue Dec 4 14:23:05 2012
@@ -676,7 +676,8 @@
RelType, 0);
Section.StubOffset += getMaxStubSize();
}
- } else if (Arch == Triple::mipsel && RelType == ELF::R_MIPS_26) {
+ } else if ((Arch == Triple::mipsel || Arch == Triple::mips) &&
+ RelType == ELF::R_MIPS_26) {
// This is an Mips branch relocation, need to use a stub function.
DEBUG(dbgs() << "\t\tThis is a Mips branch relocation.");
SectionEntry &Section = Sections[Rel.SectionID];
Modified: llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h?rev=169296&r1=169295&r2=169296&view=diff
==============================================================================
--- llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h (original)
+++ llvm/branches/release_32/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h Tue Dec 4 14:23:05 2012
@@ -168,7 +168,7 @@
inline unsigned getMaxStubSize() {
if (Arch == Triple::arm || Arch == Triple::thumb)
return 8; // 32-bit instruction and 32-bit address
- else if (Arch == Triple::mipsel)
+ else if (Arch == Triple::mipsel || Arch == Triple::mips)
return 16;
else if (Arch == Triple::ppc64)
return 44;
Modified: llvm/branches/release_32/lib/Target/Mips/MipsCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_32/lib/Target/Mips/MipsCodeEmitter.cpp?rev=169296&r1=169295&r2=169296&view=diff
==============================================================================
--- llvm/branches/release_32/lib/Target/Mips/MipsCodeEmitter.cpp (original)
+++ llvm/branches/release_32/lib/Target/Mips/MipsCodeEmitter.cpp Tue Dec 4 14:23:05 2012
@@ -85,7 +85,7 @@
private:
- void emitWordLE(unsigned Word);
+ void emitWord(unsigned Word);
/// Routines that handle operands which add machine relocations which are
/// fixed up by the relocation stage.
@@ -112,12 +112,6 @@
unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const;
unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const;
- int emitULW(const MachineInstr &MI);
- int emitUSW(const MachineInstr &MI);
- int emitULH(const MachineInstr &MI);
- int emitULHu(const MachineInstr &MI);
- int emitUSH(const MachineInstr &MI);
-
void emitGlobalAddressUnaligned(const GlobalValue *GV, unsigned Reloc,
int Offset) const;
};
@@ -133,7 +127,7 @@
MCPEs = &MF.getConstantPool()->getConstants();
MJTEs = 0;
if (MF.getJumpTableInfo()) MJTEs = &MF.getJumpTableInfo()->getJumpTables();
- JTI->Initialize(MF, IsPIC);
+ JTI->Initialize(MF, IsPIC, Subtarget->isLittle());
MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ());
do {
@@ -271,103 +265,6 @@
Reloc, BB));
}
-int MipsCodeEmitter::emitUSW(const MachineInstr &MI) {
- unsigned src = getMachineOpValue(MI, MI.getOperand(0));
- unsigned base = getMachineOpValue(MI, MI.getOperand(1));
- unsigned offset = getMachineOpValue(MI, MI.getOperand(2));
- // swr src, offset(base)
- // swl src, offset+3(base)
- MCE.emitWordLE(
- (0x2e << 26) | (base << 21) | (src << 16) | (offset & 0xffff));
- MCE.emitWordLE(
- (0x2a << 26) | (base << 21) | (src << 16) | ((offset+3) & 0xffff));
- return 2;
-}
-
-int MipsCodeEmitter::emitULW(const MachineInstr &MI) {
- unsigned dst = getMachineOpValue(MI, MI.getOperand(0));
- unsigned base = getMachineOpValue(MI, MI.getOperand(1));
- unsigned offset = getMachineOpValue(MI, MI.getOperand(2));
- unsigned at = 1;
- if (dst != base) {
- // lwr dst, offset(base)
- // lwl dst, offset+3(base)
- MCE.emitWordLE(
- (0x26 << 26) | (base << 21) | (dst << 16) | (offset & 0xffff));
- MCE.emitWordLE(
- (0x22 << 26) | (base << 21) | (dst << 16) | ((offset+3) & 0xffff));
- return 2;
- } else {
- // lwr at, offset(base)
- // lwl at, offset+3(base)
- // addu dst, at, $zero
- MCE.emitWordLE(
- (0x26 << 26) | (base << 21) | (at << 16) | (offset & 0xffff));
- MCE.emitWordLE(
- (0x22 << 26) | (base << 21) | (at << 16) | ((offset+3) & 0xffff));
- MCE.emitWordLE(
- (0x0 << 26) | (at << 21) | (0x0 << 16) | (dst << 11) | (0x0 << 6) | 0x21);
- return 3;
- }
-}
-
-int MipsCodeEmitter::emitUSH(const MachineInstr &MI) {
- unsigned src = getMachineOpValue(MI, MI.getOperand(0));
- unsigned base = getMachineOpValue(MI, MI.getOperand(1));
- unsigned offset = getMachineOpValue(MI, MI.getOperand(2));
- unsigned at = 1;
- // sb src, offset(base)
- // srl at,src,8
- // sb at, offset+1(base)
- MCE.emitWordLE(
- (0x28 << 26) | (base << 21) | (src << 16) | (offset & 0xffff));
- MCE.emitWordLE(
- (0x0 << 26) | (0x0 << 21) | (src << 16) | (at << 11) | (0x8 << 6) | 0x2);
- MCE.emitWordLE(
- (0x28 << 26) | (base << 21) | (at << 16) | ((offset+1) & 0xffff));
- return 3;
-}
-
-int MipsCodeEmitter::emitULH(const MachineInstr &MI) {
- unsigned dst = getMachineOpValue(MI, MI.getOperand(0));
- unsigned base = getMachineOpValue(MI, MI.getOperand(1));
- unsigned offset = getMachineOpValue(MI, MI.getOperand(2));
- unsigned at = 1;
- // lbu at, offset(base)
- // lb dst, offset+1(base)
- // sll dst,dst,8
- // or dst,dst,at
- MCE.emitWordLE(
- (0x24 << 26) | (base << 21) | (at << 16) | (offset & 0xffff));
- MCE.emitWordLE(
- (0x20 << 26) | (base << 21) | (dst << 16) | ((offset+1) & 0xffff));
- MCE.emitWordLE(
- (0x0 << 26) | (0x0 << 21) | (dst << 16) | (dst << 11) | (0x8 << 6) | 0x0);
- MCE.emitWordLE(
- (0x0 << 26) | (dst << 21) | (at << 16) | (dst << 11) | (0x0 << 6) | 0x25);
- return 4;
-}
-
-int MipsCodeEmitter::emitULHu(const MachineInstr &MI) {
- unsigned dst = getMachineOpValue(MI, MI.getOperand(0));
- unsigned base = getMachineOpValue(MI, MI.getOperand(1));
- unsigned offset = getMachineOpValue(MI, MI.getOperand(2));
- unsigned at = 1;
- // lbu at, offset(base)
- // lbu dst, offset+1(base)
- // sll dst,dst,8
- // or dst,dst,at
- MCE.emitWordLE(
- (0x24 << 26) | (base << 21) | (at << 16) | (offset & 0xffff));
- MCE.emitWordLE(
- (0x24 << 26) | (base << 21) | (dst << 16) | ((offset+1) & 0xffff));
- MCE.emitWordLE(
- (0x0 << 26) | (0x0 << 21) | (dst << 16) | (dst << 11) | (0x8 << 6) | 0x0);
- MCE.emitWordLE(
- (0x0 << 26) | (dst << 21) | (at << 16) | (dst << 11) | (0x0 << 6) | 0x25);
- return 4;
-}
-
void MipsCodeEmitter::emitInstruction(const MachineInstr &MI) {
DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << MI);
@@ -377,16 +274,19 @@
if ((MI.getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo)
return;
- emitWordLE(getBinaryCodeForInstr(MI));
+ emitWord(getBinaryCodeForInstr(MI));
++NumEmitted; // Keep track of the # of mi's emitted
MCE.processDebugLoc(MI.getDebugLoc(), false);
}
-void MipsCodeEmitter::emitWordLE(unsigned Word) {
+void MipsCodeEmitter::emitWord(unsigned Word) {
DEBUG(errs() << " 0x";
errs().write_hex(Word) << "\n");
- MCE.emitWordLE(Word);
+ if (Subtarget->isLittle())
+ MCE.emitWordLE(Word);
+ else
+ MCE.emitWordBE(Word);
}
/// createMipsJITCodeEmitterPass - Return a pass that emits the collected Mips
Modified: llvm/branches/release_32/lib/Target/Mips/MipsJITInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_32/lib/Target/Mips/MipsJITInfo.cpp?rev=169296&r1=169295&r2=169296&view=diff
==============================================================================
--- llvm/branches/release_32/lib/Target/Mips/MipsJITInfo.cpp (original)
+++ llvm/branches/release_32/lib/Target/Mips/MipsJITInfo.cpp Tue Dec 4 14:23:05 2012
@@ -222,10 +222,17 @@
// addiu t9, t9, %lo(EmittedAddr)
// jalr t8, t9
// nop
- JCE.emitWordLE(0xf << 26 | 25 << 16 | Hi);
- JCE.emitWordLE(9 << 26 | 25 << 21 | 25 << 16 | Lo);
- JCE.emitWordLE(25 << 21 | 24 << 11 | 9);
- JCE.emitWordLE(0);
+ if (IsLittleEndian) {
+ JCE.emitWordLE(0xf << 26 | 25 << 16 | Hi);
+ JCE.emitWordLE(9 << 26 | 25 << 21 | 25 << 16 | Lo);
+ JCE.emitWordLE(25 << 21 | 24 << 11 | 9);
+ JCE.emitWordLE(0);
+ } else {
+ JCE.emitWordBE(0xf << 26 | 25 << 16 | Hi);
+ JCE.emitWordBE(9 << 26 | 25 << 21 | 25 << 16 | Lo);
+ JCE.emitWordBE(25 << 21 | 24 << 11 | 9);
+ JCE.emitWordBE(0);
+ }
sys::Memory::InvalidateInstructionCache(Addr, 16);
if (!sys::Memory::setRangeExecutable(Addr, 16))
Modified: llvm/branches/release_32/lib/Target/Mips/MipsJITInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_32/lib/Target/Mips/MipsJITInfo.h?rev=169296&r1=169295&r2=169296&view=diff
==============================================================================
--- llvm/branches/release_32/lib/Target/Mips/MipsJITInfo.h (original)
+++ llvm/branches/release_32/lib/Target/Mips/MipsJITInfo.h Tue Dec 4 14:23:05 2012
@@ -26,10 +26,11 @@
class MipsJITInfo : public TargetJITInfo {
bool IsPIC;
+ bool IsLittleEndian;
public:
explicit MipsJITInfo() :
- IsPIC(false) {}
+ IsPIC(false), IsLittleEndian(true) {}
/// replaceMachineCodeForFunction - Make it so that calling the function
/// whose machine code is at OLD turns into a call to NEW, perhaps by
@@ -58,8 +59,10 @@
unsigned NumRelocs, unsigned char *GOTBase);
/// Initialize - Initialize internal stage for the function being JITted.
- void Initialize(const MachineFunction &MF, bool isPIC) {
+ void Initialize(const MachineFunction &MF, bool isPIC,
+ bool isLittleEndian) {
IsPIC = isPIC;
+ IsLittleEndian = isLittleEndian;
}
};
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