[llvm-branch-commits] [llvm-branch] r142555 - in /llvm/branches/release_30: ./ lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/tlv-1.ll

[Bill Wendling]

Author: void
Date: Wed Oct 19 18:49:38 2011
New Revision: 142555

URL: http://llvm.org/viewvc/llvm-project?rev=142555&view=rev
Log:
Merging r142550:
------------------------------------------------------------------------
r142550 | evancheng | 2011-10-19 15:22:54 -0700 (Wed, 19 Oct 2011) | 1 line

Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10291355
------------------------------------------------------------------------

Modified:
    llvm/branches/release_30/   (props changed)
    llvm/branches/release_30/lib/Target/X86/X86ISelLowering.cpp
    llvm/branches/release_30/test/CodeGen/X86/tlv-1.ll

Propchange: llvm/branches/release_30/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Wed Oct 19 18:49:38 2011
@@ -1,3 +1,3 @@
 /llvm/branches/Apple/Pertwee:110850,110961
 /llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:142039,142055,142058,142112,142123,142125,142165,142168,142243,142482,142486,142489,142491-142493,142537
+/llvm/trunk:142039,142055,142058,142112,142123,142125,142165,142168,142243,142482,142486,142489,142491-142493,142537,142550

Modified: llvm/branches/release_30/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_30/lib/Target/X86/X86ISelLowering.cpp?rev=142555&r1=142554&r2=142555&view=diff
==============================================================================
--- llvm/branches/release_30/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/release_30/lib/Target/X86/X86ISelLowering.cpp Wed Oct 19 18:49:38 2011
@@ -7526,7 +7526,8 @@
     // And our return value (tls address) is in the standard call return value
     // location.
     unsigned Reg = Subtarget->is64Bit() ? X86::RAX : X86::EAX;
-    return DAG.getCopyFromReg(Chain, DL, Reg, getPointerTy());
+    return DAG.getCopyFromReg(Chain, DL, Reg, getPointerTy(),
+                              Chain.getValue(1));
   }
 
   assert(false &&

Modified: llvm/branches/release_30/test/CodeGen/X86/tlv-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_30/test/CodeGen/X86/tlv-1.ll?rev=142555&r1=142554&r2=142555&view=diff
==============================================================================
--- llvm/branches/release_30/test/CodeGen/X86/tlv-1.ll (original)
+++ llvm/branches/release_30/test/CodeGen/X86/tlv-1.ll Wed Oct 19 18:49:38 2011
@@ -5,6 +5,7 @@
 @c = external thread_local global %struct.A, align 4
 
 define void @main() nounwind ssp {
+; CHECK: main:
 entry:
   call void @llvm.memset.p0i8.i64(i8* getelementptr inbounds (%struct.A* @c, i32 0, i32 0, i32 0), i8 0, i64 60, i32 1, i1 false)
   unreachable  
@@ -14,6 +15,22 @@
   ; CHECK-NEXT: movq    $0, 48(%rax)
 }
 
+; rdar://10291355
+define i32 @test() nounwind readonly ssp {
+entry:
+; CHECK: test:
+; CHECK: movq _a at TLVP(%rip),
+; CHECK: callq *
+; CHECK: movl (%rax), [[REGISTER:%[a-z]+]]
+; CHECK: movq _b at TLVP(%rip),
+; CHECK: callq *
+; CHECK: subl (%rax), [[REGISTER]]
+  %0 = load i32* @a, align 4
+  %1 = load i32* @b, align 4
+  %sub = sub nsw i32 %0, %1
+  ret i32 %sub
+}
+
 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
 
 @a = thread_local global i32 0                    ; <i32*> [#uses=0]