[llvm-branch-commits] [llvm-branch] r123259 - in /llvm/branches/Apple/Hartnell/lib/Target/X86: X86.td X86ISelLowering.cpp X86Subtarget.cpp

Bill Wendling isanbard at gmail.com
Tue Jan 11 11:41:09 PST 2011


Author: void
Date: Tue Jan 11 13:41:09 2011
New Revision: 123259

URL: http://llvm.org/viewvc/llvm-project?rev=123259&view=rev
Log:
Reapply r123257. Sorry for the churn.

Modified:
    llvm/branches/Apple/Hartnell/lib/Target/X86/X86.td
    llvm/branches/Apple/Hartnell/lib/Target/X86/X86ISelLowering.cpp
    llvm/branches/Apple/Hartnell/lib/Target/X86/X86Subtarget.cpp

Modified: llvm/branches/Apple/Hartnell/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hartnell/lib/Target/X86/X86.td?rev=123259&r1=123258&r2=123259&view=diff
==============================================================================
--- llvm/branches/Apple/Hartnell/lib/Target/X86/X86.td (original)
+++ llvm/branches/Apple/Hartnell/lib/Target/X86/X86.td Tue Jan 11 13:41:09 2011
@@ -114,7 +114,7 @@
                                 FeatureFastUAMem, FeatureAES]>;
 // Sandy Bridge does not have FMA
 // FIXME: Wikipedia says it does... it should have AES as well.
-def : Proc<"sandybridge",     [FeatureSSE42,  FeatureAVX,   Feature64Bit]>;
+def : Proc<"sandybridge",     [FeatureSSE42,  Feature64Bit, FeatureAES]>;
 
 def : Proc<"k6",              [FeatureMMX]>;
 def : Proc<"k6-2",            [FeatureMMX,    Feature3DNow]>;

Modified: llvm/branches/Apple/Hartnell/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hartnell/lib/Target/X86/X86ISelLowering.cpp?rev=123259&r1=123258&r2=123259&view=diff
==============================================================================
--- llvm/branches/Apple/Hartnell/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/Apple/Hartnell/lib/Target/X86/X86ISelLowering.cpp Tue Jan 11 13:41:09 2011
@@ -56,6 +56,8 @@
 
 static cl::opt<bool>
 DisableMMX("disable-mmx", cl::Hidden, cl::desc("Disable use of MMX"));
+static cl::opt<bool>
+DisableAVX("disable-avx", cl::Hidden, cl::desc("Disable use of AVX"));
 
 // Forward declarations.
 static SDValue getMOVL(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1,
@@ -840,7 +842,7 @@
     setOperationAction(ISD::VSETCC,             MVT::v2i64, Custom);
   }
 
-  if (!UseSoftFloat && Subtarget->hasAVX()) {
+  if (!UseSoftFloat && !DisableAVX && Subtarget->hasAVX()) {
     addRegisterClass(MVT::v8f32, X86::VR256RegisterClass);
     addRegisterClass(MVT::v4f64, X86::VR256RegisterClass);
     addRegisterClass(MVT::v8i32, X86::VR256RegisterClass);

Modified: llvm/branches/Apple/Hartnell/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hartnell/lib/Target/X86/X86Subtarget.cpp?rev=123259&r1=123258&r2=123259&view=diff
==============================================================================
--- llvm/branches/Apple/Hartnell/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/branches/Apple/Hartnell/lib/Target/X86/X86Subtarget.cpp Tue Jan 11 13:41:09 2011
@@ -258,7 +258,8 @@
   bool IsAMD   = !IsIntel && memcmp(text.c, "AuthenticAMD", 12) == 0;
 
   HasFMA3 = IsIntel && ((ECX >> 12) & 0x1);
-  HasAVX = ((ECX >> 28) & 0x1);
+  // FIXME: AVX codegen support is not ready.
+  //HasAVX = ((ECX >> 28) & 0x1);
   HasAES = IsIntel && ((ECX >> 25) & 0x1);
 
   if (IsIntel || IsAMD) {





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