[llvm-branch-commits] [llvm-branch] r123010 - /llvm/branches/Apple/whitney/lib/Target/ARM/ARMFastISel.cpp

[Daniel Dunbar]

Author: ddunbar
Date: Fri Jan  7 13:32:34 2011
New Revision: 123010

URL: http://llvm.org/viewvc/llvm-project?rev=123010&view=rev
Log:
Merge r122313:
--
Author: Eric Christopher <echristo at apple.com>
Date:   Tue Dec 21 03:50:43 2010 +0000

    Arm and thumb call instructions are also in different orders.

    Fixes rdar://8782223

Modified:
    llvm/branches/Apple/whitney/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/branches/Apple/whitney/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/lib/Target/ARM/ARMFastISel.cpp?rev=123010&r1=123009&r2=123010&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/branches/Apple/whitney/lib/Target/ARM/ARMFastISel.cpp Fri Jan  7 13:32:34 2011
@@ -1671,14 +1671,19 @@
   // TODO: Turn this into the table of arm call ops.
   MachineInstrBuilder MIB;
   unsigned CallOpc;
-  if(isThumb)
+  if(isThumb) {
     CallOpc = Subtarget->isTargetDarwin() ? ARM::tBLXi_r9 : ARM::tBLXi;
-  else
+    // Explicitly adding the predicate here.
+    MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+                         TII.get(CallOpc)))
+                         .addExternalSymbol(TLI.getLibcallName(Call));
+  } else {
     CallOpc = Subtarget->isTargetDarwin() ? ARM::BLr9 : ARM::BL;
-  // Explicitly adding the predicate here.
-  MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
-                       TII.get(CallOpc)))
-        .addExternalSymbol(TLI.getLibcallName(Call));
+    // Explicitly adding the predicate here.
+    MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+                         TII.get(CallOpc))
+          .addExternalSymbol(TLI.getLibcallName(Call)));
+  }
 
   // Add implicit physical register uses to the call.
   for (unsigned i = 0, e = RegArgs.size(); i != e; ++i)
@@ -1782,15 +1787,21 @@
   // TODO: Turn this into the table of arm call ops.
   MachineInstrBuilder MIB;
   unsigned CallOpc;
-  if(isThumb)
+  // Explicitly adding the predicate here.
+  if(isThumb) {
     CallOpc = Subtarget->isTargetDarwin() ? ARM::tBLXi_r9 : ARM::tBLXi;
-  else
+    // Explicitly adding the predicate here.
+    MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+                         TII.get(CallOpc)))
+          .addGlobalAddress(GV, 0, 0);
+  } else {
     CallOpc = Subtarget->isTargetDarwin() ? ARM::BLr9 : ARM::BL;
-  // Explicitly adding the predicate here.
-  MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
-                               TII.get(CallOpc)))
-        .addGlobalAddress(GV, 0, 0);
-
+    // Explicitly adding the predicate here.
+    MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+                         TII.get(CallOpc))
+          .addGlobalAddress(GV, 0, 0));
+  }
+  
   // Add implicit physical register uses to the call.
   for (unsigned i = 0, e = RegArgs.size(); i != e; ++i)
     MIB.addReg(RegArgs[i]);