[llvm-branch-commits] [cfe-branch] r114345 - in /cfe/branches/Apple/whitney-IB/src: lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll test/CodeGen/ARM/ifcvt10.ll test/CodeGen/ARM/stm.ll test/CodeGen/Thumb2/large-stack.ll

Daniel Dunbar daniel at zuster.org
Mon Sep 20 13:24:31 PDT 2010


Author: ddunbar
Date: Mon Sep 20 15:24:31 2010
New Revision: 114345

URL: http://llvm.org/viewvc/llvm-project?rev=114345&view=rev
Log:
--- Reverse-merging r114230 into 'src':
U    src/test/CodeGen/ARM/stm.ll
U    src/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
U    src/test/CodeGen/ARM/ifcvt10.ll
U    src/test/CodeGen/Thumb2/large-stack.ll
U    src/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U    src/lib/Target/ARM/ARMAsmPrinter.cpp


Modified:
    cfe/branches/Apple/whitney-IB/src/lib/Target/ARM/ARMAsmPrinter.cpp
    cfe/branches/Apple/whitney-IB/src/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
    cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
    cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/ifcvt10.ll
    cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/stm.ll
    cfe/branches/Apple/whitney-IB/src/test/CodeGen/Thumb2/large-stack.ll

Modified: cfe/branches/Apple/whitney-IB/src/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/Apple/whitney-IB/src/lib/Target/ARM/ARMAsmPrinter.cpp?rev=114345&r1=114344&r2=114345&view=diff
==============================================================================
--- cfe/branches/Apple/whitney-IB/src/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ cfe/branches/Apple/whitney-IB/src/lib/Target/ARM/ARMAsmPrinter.cpp Mon Sep 20 15:24:31 2010
@@ -1147,78 +1147,11 @@
     OS << ']';
     OS << "+";
     printOperand(MI, NOps-2, OS);
-  } else if (MI->getOpcode() == ARM::MOVs) {
-    // FIXME: Thumb variants?
-    const MachineOperand &Dst = MI->getOperand(0);
-    const MachineOperand &MO1 = MI->getOperand(1);
-    const MachineOperand &MO2 = MI->getOperand(2);
-    const MachineOperand &MO3 = MI->getOperand(3);
-
-    OS << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()));
-    printSBitModifierOperand(MI, 6, OS);
-    printPredicateOperand(MI, 4, OS);
-
-    OS << '\t' << getRegisterName(Dst.getReg())
-       << ", " << getRegisterName(MO1.getReg());
-
-    if (ARM_AM::getSORegShOp(MO3.getImm()) != ARM_AM::rrx) {
-      OS << ", ";
-
-      if (MO2.getReg()) {
-        OS << getRegisterName(MO2.getReg());
-        assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
-      } else {
-        OS << "#" << ARM_AM::getSORegOffset(MO3.getImm());
-      }
-    }
-  } else
-  // A8.6.123 PUSH
-  if ((MI->getOpcode() == ARM::STM_UPD || MI->getOpcode() == ARM::t2STM_UPD) &&
-      MI->getOperand(0).getReg() == ARM::SP) {
-    const MachineOperand &MO1 = MI->getOperand(2);
-    if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::db) {
-      OS << '\t' << "push";
-      printPredicateOperand(MI, 3, OS);
-      OS << '\t';
-      printRegisterList(MI, 5, OS);
-    }
-  } else
-  // A8.6.122 POP
-  if ((MI->getOpcode() == ARM::LDM_UPD || MI->getOpcode() == ARM::t2LDM_UPD) &&
-      MI->getOperand(0).getReg() == ARM::SP) {
-    const MachineOperand &MO1 = MI->getOperand(2);
-    if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::ia) {
-      OS << '\t' << "pop";
-      printPredicateOperand(MI, 3, OS);
-      OS << '\t';
-      printRegisterList(MI, 5, OS);
-    }
-  } else
-  // A8.6.355 VPUSH
-  if ((MI->getOpcode() == ARM::VSTMS_UPD || MI->getOpcode() ==ARM::VSTMD_UPD) &&
-      MI->getOperand(0).getReg() == ARM::SP) {
-    const MachineOperand &MO1 = MI->getOperand(2);
-    if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::db) {
-      OS << '\t' << "vpush";
-      printPredicateOperand(MI, 3, OS);
-      OS << '\t';
-      printRegisterList(MI, 5, OS);
-    }
-  } else
-  // A8.6.354 VPOP
-  if ((MI->getOpcode() == ARM::VLDMS_UPD || MI->getOpcode() ==ARM::VLDMD_UPD) &&
-      MI->getOperand(0).getReg() == ARM::SP) {
-    const MachineOperand &MO1 = MI->getOperand(2);
-    if (ARM_AM::getAM4SubMode(MO1.getImm()) == ARM_AM::ia) {
-      OS << '\t' << "vpop";
-      printPredicateOperand(MI, 3, OS);
-      OS << '\t';
-      printRegisterList(MI, 5, OS);
-    }
-  } else
-    printInstruction(MI, OS);
+    OutStreamer.EmitRawText(OS.str());
+    return;
+  }
 
-  // Output the instruction to the stream
+  printInstruction(MI, OS);
   OutStreamer.EmitRawText(OS.str());
 
   // Make sure the instruction that follows TBB is 2-byte aligned.

Modified: cfe/branches/Apple/whitney-IB/src/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/Apple/whitney-IB/src/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp?rev=114345&r1=114344&r2=114345&view=diff
==============================================================================
--- cfe/branches/Apple/whitney-IB/src/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp (original)
+++ cfe/branches/Apple/whitney-IB/src/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp Mon Sep 20 15:24:31 2010
@@ -55,7 +55,6 @@
 void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
   // Check for MOVs and print canonical forms, instead.
   if (MI->getOpcode() == ARM::MOVs) {
-    // FIXME: Thumb variants?
     const MCOperand &Dst = MI->getOperand(0);
     const MCOperand &MO1 = MI->getOperand(1);
     const MCOperand &MO2 = MI->getOperand(2);

Modified: cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll?rev=114345&r1=114344&r2=114345&view=diff
==============================================================================
--- cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll (original)
+++ cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll Mon Sep 20 15:24:31 2010
@@ -9,7 +9,7 @@
 entry:
 ; Make sure to use base-updating stores for saving callee-saved registers.
 ; CHECK-NOT: sub sp
-; CHECK: vpush 
+; CHECK: vstmdb sp!
 	%predicted_block = alloca [4 x [4 x i32]], align 4		; <[4 x [4 x i32]]*> [#uses=1]
 	br label %cond_next489
 

Modified: cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/ifcvt10.ll
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/ifcvt10.ll?rev=114345&r1=114344&r2=114345&view=diff
==============================================================================
--- cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/ifcvt10.ll (original)
+++ cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/ifcvt10.ll Mon Sep 20 15:24:31 2010
@@ -12,10 +12,10 @@
 ; CHECK: aaa:
 ; CHECK: vldr.32
 ; CHECK-NOT: vldrne
-; CHECK-NOT: vpopne
-; CHECK-NOT: popne
-; CHECK: vpop
-; CHECK: pop
+; CHECK-NOT: vldmiane
+; CHECK-NOT: ldmiane
+; CHECK: vldmia sp!
+; CHECK: ldmia sp!
 entry:
   br i1 undef, label %bb81, label %bb48
 

Modified: cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/stm.ll
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/stm.ll?rev=114345&r1=114344&r2=114345&view=diff
==============================================================================
--- cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/stm.ll (original)
+++ cfe/branches/Apple/whitney-IB/src/test/CodeGen/ARM/stm.ll Mon Sep 20 15:24:31 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 | FileCheck %s
+; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2 | grep stm | count 2
 
 @"\01LC" = internal constant [32 x i8] c"Boolean Not: %d %d %d %d %d %d\0A\00", section "__TEXT,__cstring,cstring_literals"		; <[32 x i8]*> [#uses=1]
 @"\01LC1" = internal constant [26 x i8] c"Bitwise Not: %d %d %d %d\0A\00", section "__TEXT,__cstring,cstring_literals"		; <[26 x i8]*> [#uses=1]
@@ -7,9 +7,6 @@
 
 define i32 @main() nounwind {
 entry:
-; CHECK: main
-; CHECK: push
-; CHECK: stmib
 	%0 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([26 x i8]* @"\01LC1", i32 0, i32 0), i32 -2, i32 -3, i32 2, i32 -6) nounwind		; <i32> [#uses=0]
 	%1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([32 x i8]* @"\01LC", i32 0, i32 0), i32 0, i32 1, i32 0, i32 1, i32 0, i32 1) nounwind		; <i32> [#uses=0]
 	ret i32 0

Modified: cfe/branches/Apple/whitney-IB/src/test/CodeGen/Thumb2/large-stack.ll
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/Apple/whitney-IB/src/test/CodeGen/Thumb2/large-stack.ll?rev=114345&r1=114344&r2=114345&view=diff
==============================================================================
--- cfe/branches/Apple/whitney-IB/src/test/CodeGen/Thumb2/large-stack.ll (original)
+++ cfe/branches/Apple/whitney-IB/src/test/CodeGen/Thumb2/large-stack.ll Mon Sep 20 15:24:31 2010
@@ -27,7 +27,7 @@
 ; DARWIN: sub.w sp, sp, #805306368
 ; DARWIN: sub sp, #20
 ; LINUX: test3:
-; LINUX: push {r4, r7, r11, lr}
+; LINUX: stmdb   sp!, {r4, r7, r11, lr}
 ; LINUX: sub.w sp, sp, #805306368
 ; LINUX: sub sp, #16
     %retval = alloca i32, align 4





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