[llvm-branch-commits] [llvm-branch] r113353 - in /llvm/branches/release_28: ./ lib/Target/ARM/Disassembler/ARMDisassembler.cpp lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
Bill Wendling
isanbard at gmail.com
Wed Sep 8 03:09:17 PDT 2010
Author: void
Date: Wed Sep 8 05:09:17 2010
New Revision: 113353
URL: http://llvm.org/viewvc/llvm-project?rev=113353&view=rev
Log:
$ svn merge -c 113255 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r113255 into '.':
U lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
$ svn merge -c 113345 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r113345 into '.':
U lib/Target/ARM/Disassembler/ARMDisassembler.cpp
Modified:
llvm/branches/release_28/ (props changed)
llvm/branches/release_28/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
llvm/branches/release_28/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
Propchange: llvm/branches/release_28/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Wed Sep 8 05:09:17 2010
@@ -1,2 +1,2 @@
/llvm/branches/Apple/Pertwee:110850,110961
-/llvm/trunk:113109,113123,113146,113158,113257,113260,113303
+/llvm/trunk:113109,113123,113146,113158,113255,113257,113260,113303,113345
Modified: llvm/branches/release_28/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_28/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=113353&r1=113352&r2=113353&view=diff
==============================================================================
--- llvm/branches/release_28/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/branches/release_28/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Wed Sep 8 05:09:17 2010
@@ -298,7 +298,7 @@
/// decodeInstruction(insn) is invoked on the original insn.
///
/// Otherwise, decodeThumbInstruction is called with the original insn.
-static unsigned decodeThumbSideEffect(bool IsThumb2, uint32_t &insn) {
+static unsigned decodeThumbSideEffect(bool IsThumb2, unsigned &insn) {
if (IsThumb2) {
uint16_t op1 = slice(insn, 28, 27);
uint16_t op2 = slice(insn, 26, 20);
@@ -436,7 +436,7 @@
// passed to decodeThumbInstruction(). For 16-bit Thumb instruction, the top
// halfword of insn is 0x00 0x00; otherwise, the first halfword is moved to
// the top half followed by the second halfword.
- uint32_t insn = 0;
+ unsigned insn = 0;
// Possible second halfword.
uint16_t insn1 = 0;
Modified: llvm/branches/release_28/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_28/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h?rev=113353&r1=113352&r2=113353&view=diff
==============================================================================
--- llvm/branches/release_28/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h (original)
+++ llvm/branches/release_28/lib/Target/ARM/Disassembler/ARMDisassemblerCore.h Wed Sep 8 05:09:17 2010
@@ -126,8 +126,8 @@
}
/// Utility function for setting [From, To] bits to Val for a uint32_t.
-static inline void setSlice(uint32_t &Bits, unsigned From, unsigned To,
- uint32_t Val) {
+static inline void setSlice(unsigned &Bits, unsigned From, unsigned To,
+ unsigned Val) {
assert(From < 32 && To < 32 && From >= To);
uint32_t Mask = ((1 << (From - To + 1)) - 1);
Bits &= ~(Mask << To);
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