[llvm-branch-commits] [llvm-branch] r115555 - /llvm/branches/ggreif/switch-opts/test/CodeGen/X86/switch-and.ll

[Gabor Greif]

Author: ggreif
Date: Mon Oct  4 15:46:22 2010
New Revision: 115555

URL: http://llvm.org/viewvc/llvm-project?rev=115555&view=rev
Log:
add a filecheck run line and checks

Modified:
    llvm/branches/ggreif/switch-opts/test/CodeGen/X86/switch-and.ll

Modified: llvm/branches/ggreif/switch-opts/test/CodeGen/X86/switch-and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/ggreif/switch-opts/test/CodeGen/X86/switch-and.ll?rev=115555&r1=115554&r2=115555&view=diff
==============================================================================
--- llvm/branches/ggreif/switch-opts/test/CodeGen/X86/switch-and.ll (original)
+++ llvm/branches/ggreif/switch-opts/test/CodeGen/X86/switch-and.ll Mon Oct  4 15:46:22 2010
@@ -1,3 +1,5 @@
+;; RUN: llc -march=x86-64 %s -o /dev/null -print-after=codegenprepare |& FileCheck %s
+
 %struct.Foo = type { i8* }
 
 define %struct.Foo* @_ZN3Foo7collectEj(%struct.Foo* %this, i32 %acc) nounwind
@@ -14,7 +16,12 @@
  %and = and i64 %0, 3
  %conv = trunc i64 %and to i32
  switch i32 %conv, label %sw.epilog [
+;; CHECK: %tst = icmp eq i32 %conv, 0
+;; CHECK-NEXT: br i1 %tst, label %sw.bb, label %tailrecurse.switch
    i32 0, label %sw.bb
+;; CHECK: tailrecurse.switch:
+;; CHECK-NEXT: switch i32 %conv, label %sw.epilog
+;; CHECK-NEXT: i32 1, label %sw.bb
    i32 1, label %sw.bb
    i32 3, label %sw.bb6
    i32 2, label %sw.bb8