[llvm-branch-commits] [llvm-branch] r115328 - in /llvm/branches/Apple/Morbo: ./ lib/CodeGen/AsmPrinter/DwarfDebug.cpp lib/Target/X86/X86InstrSSE.td lib/Transforms/InstCombine/InstCombineVectorOps.cpp test/DebugInfo/2010-09-16-EmptyFilename.ll test/FrontendC/asm-reg-var-local.c test/Transforms/InstCombine/vec_shuffle.ll
Stuart Hastings
stuart at apple.com
Fri Oct 1 12:23:54 PDT 2010
Author: stuart
Date: Fri Oct 1 14:23:54 2010
New Revision: 115328
URL: http://llvm.org/viewvc/llvm-project?rev=115328&view=rev
Log:
#!/bin/sh
set -x
echo "This was applied to Morbo revision 115315: svn info llvmgcc42.morbo llvmCore.morbo | grep Revision == Revision: 115315"
echo "back out of Morbo: <rdar://problem/8156507> MINSSrm_Int is missing memoperand"
svn merge -c -113586 llvmCore.morbo llvmCore.morbo
echo "back out of Morbo: <rdar://problem/7734653> CPU codegen regression for byte interleaving 4 vectors"
svn merge -c -113368 llvmCore.morbo llvmCore.morbo
echo "back out of Morbo: <rdar://problem/8305081> llvm-gcc doesn't honor asm register variables"
echo "Note that we want this omitted from -2335, but we want it reapplied to the Morbo branch after -2335 has been tagged."
svn merge -c -114360 llvmCore.morbo llvmCore.morbo
svn merge -c -114359 llvmgcc42.morbo llvmgcc42.morbo
echo "back out of Morbo: <rdar://problem/8286101> SWB: clang-110 on Barolo11A231: Assertion failed: (*offset_ptr == end_prologue_offset)"
svn merge -c -114355 llvmCore.morbo llvmCore.morbo
echo "back out of Morbo: <rdar://problem/8251350> DejaGnu: gcc/testsuite/gcc.c-torture/execute/builtin-bitops-1.c assertion failure"
svn merge -c -114346 llvmgcc42.morbo llvmgcc42.morbo
echo "verify present in Morbo branch: <rdar://problem/8467536> 11A274: xnu-1699.9 fails to build with internal compiler error"
echo "Note this was r114723 on trunk, committed to Morbo in r114730. Morbo revision number is not mentioned in the Radar."
svn diff -c 114730 llvmCore.morbo
echo "verify present in Morbo branch: <rdar://problem/8412415> gdb is lying even more than usual in 11A260 and 11A261"
svn diff -c 114590 llvmCore.morbo
Removed:
llvm/branches/Apple/Morbo/test/DebugInfo/2010-09-16-EmptyFilename.ll
llvm/branches/Apple/Morbo/test/FrontendC/asm-reg-var-local.c
Modified:
llvm/branches/Apple/Morbo/ (props changed)
llvm/branches/Apple/Morbo/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrSSE.td
llvm/branches/Apple/Morbo/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
llvm/branches/Apple/Morbo/test/Transforms/InstCombine/vec_shuffle.ll
Propchange: llvm/branches/Apple/Morbo/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Fri Oct 1 14:23:54 2010
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Hermes:96832,96835,96858,96870,96876,96879,104427,104930,104971
-/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98768,98773,98778,98780,98810,98835,98839,98845,98855,98862,98881,98920,98977,98980,99032-99033,99043,99196,99223,99263,99282-99284,99306,99319-99321,99324,99336,99378,99418,99423,99429,99440,99455,99463,99465,99469,99484,99490,99492-99494,99507,99524,99537,99539-99540,99544,99570,99575,99598,99620,99629-99630,99636,99671,99692,99695,99697,99699,99722,99816,99835-99836,99845-99846,99848,99850,99855,99879,99881-99883,99895,99899,99910,99916,99919,99952-99954,99957,99959,99974-99975,99982,99984-99986,99988-99989,99992-99993,99995,99997-99999,100016,100035,100037-100038,100042,100044,100056,100072,100074,100078,100081-100090,100092,100094-100095,100116,100134,100184,100209,100214-100218,100220-100221,100223-100225,100231,100250,100252,100257,100261,100304,100332,100353,100384,100454-100455,100457,100466,100478,100480,100487,100494,100497,100505,100521,100553,100568,100584,100592,100609-100610,100636,100710,100736
,100742,100751,100768-100769,100771,100781,100797,100804,100837,100867,100892,100936-100937,101011,101023,101075,101077,101079,101081,101085,101154,101158,101162,101165,101181,101190,101202,101282,101294,101303,101314-101315,101317,101331,101343,101383,101392,101420,101453,101604,101615,101629,101684-101686,101805,101845,101847,101851,101855,101870,101879,101897,101925,101930,101965,101971,101979,102111,102120,102192,102202,102225,102236-102237,102358,102366,102394,102396,102405,102421,102454-102456,102463,102467-102468,102470,102481,102486-102488,102492-102493,102504-102505,102508-102510,102513,102519,102524,102526,102531,102558,102646,102653,102655,102661-102662,102672,102743,102760,102770,102791,102948,102970,102980,103001,103126,103133,103233,103314,103356,103415,103419,103439,103451,103455,103459,103757,103798,103801-103802,103804,103808,103813,103824,103829,103928,103990,103995,104066,104182,104233,104236,104265,104274,104302,104338,104412,104419,104524,104531,104640,1
04646,104649,104655-104656,104661,104664,104705-104706,104720,104722,104732,104737,104740,104785,104848,104858,104872,104884,104900,104967,105285,105292,105295,105360,105387,105490,105505,105741,105828-105829,105872,105948-105949,106005,106066,106075,106088,106243-106244,106270,106438-106439,106515-106516,106518,106569,106576,106582,106604,106611-106612,106772,106792,106862,106878,106895,106985,106989-106990,107025,107027,107059,107065,107085,107103,107112,107212,107228,107237,107430,107433,107440,107506,107509,107846,107907,107922,108461,108473,108563,108568,108610,108784-108786,109258,109462,109481,109488-109489,109519,109549,109556-109557,109566,110248-110249,110254,110279,110404,110757,110987,112675,113249,113600,113603,114119,114475,114723
+/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98768,98773,98778,98780,98810,98835,98839,98845,98855,98862,98881,98920,98977,98980,99032-99033,99043,99196,99223,99263,99282-99284,99306,99319-99321,99324,99336,99378,99418,99423,99429,99440,99455,99463,99465,99469,99484,99490,99492-99494,99507,99524,99537,99539-99540,99544,99570,99575,99598,99620,99629-99630,99636,99671,99692,99695,99697,99699,99722,99816,99835-99836,99845-99846,99848,99850,99855,99879,99881-99883,99895,99899,99910,99916,99919,99952-99954,99957,99959,99974-99975,99982,99984-99986,99988-99989,99992-99993,99995,99997-99999,100016,100035,100037-100038,100042,100044,100056,100072,100074,100078,100081-100090,100092,100094-100095,100116,100134,100184,100209,100214-100218,100220-100221,100223-100225,100231,100250,100252,100257,100261,100304,100332,100353,100384,100454-100455,100457,100466,100478,100480,100487,100494,100497,100505,100521,100553,100568,100584,100592,100609-100610,100636,100710,100736
,100742,100751,100768-100769,100771,100781,100797,100804,100837,100867,100892,100936-100937,101011,101023,101075,101077,101079,101081,101085,101154,101158,101162,101165,101181,101190,101202,101282,101294,101303,101314-101315,101317,101331,101343,101383,101392,101420,101453,101604,101615,101629,101684-101686,101805,101845,101847,101851,101855,101870,101879,101897,101925,101930,101965,101971,101979,102111,102120,102192,102202,102225,102236-102237,102358,102366,102394,102396,102405,102421,102454-102456,102463,102467-102468,102470,102481,102486-102488,102492-102493,102504-102505,102508-102510,102513,102519,102524,102526,102531,102558,102646,102653,102655,102661-102662,102672,102743,102760,102770,102791,102948,102970,102980,103001,103126,103133,103233,103314,103356,103415,103419,103439,103451,103455,103459,103757,103798,103801-103802,103804,103808,103813,103824,103829,103928,103990,103995,104066,104182,104233,104236,104265,104274,104302,104338,104412,104419,104524,104531,104640,1
04646,104649,104655-104656,104661,104664,104705-104706,104720,104722,104732,104737,104740,104785,104848,104858,104872,104884,104900,104967,105285,105292,105295,105360,105387,105490,105505,105741,105828-105829,105872,105948-105949,106005,106066,106075,106088,106243-106244,106270,106438-106439,106515-106516,106518,106569,106576,106582,106604,106611-106612,106772,106792,106862,106878,106895,106985,106989-106990,107025,107027,107059,107065,107085,107103,107112,107212,107228,107237,107430,107433,107440,107506,107509,107846,107907,107922,108461,108473,108563,108568,108610,108784-108786,109258,109462,109481,109488-109489,109519,109549,109556-109557,109566,110248-110249,110254,110279,110404,110757,113249,113600,113603,114475,114723
/llvm-gcc-4.2/trunk:104182
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/AsmPrinter/DwarfDebug.cpp?rev=115328&r1=115327&r2=115328&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/AsmPrinter/DwarfDebug.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/AsmPrinter/DwarfDebug.cpp Fri Oct 1 14:23:54 2010
@@ -1706,10 +1706,6 @@
/// maps as well.
unsigned DwarfDebug::GetOrCreateSourceID(StringRef DirName, StringRef FileName){
unsigned DId;
- // If FE did not provide a file name, then assume stdin.
- if (FileName.empty())
- return GetOrCreateSourceID(DirName, "<stdin>");
-
StringMap<unsigned>::iterator DI = DirectoryIdMap.find(DirName);
if (DI != DirectoryIdMap.end()) {
DId = DI->getValue();
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrSSE.td?rev=115328&r1=115327&r2=115328&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrSSE.td Fri Oct 1 14:23:54 2010
@@ -81,9 +81,9 @@
// the top elements. These are used for the SSE 'ss' and 'sd' instruction
// forms.
def sse_load_f32 : ComplexPattern<v4f32, 5, "SelectScalarSSELoad", [],
- [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
+ [SDNPHasChain, SDNPMayLoad]>;
def sse_load_f64 : ComplexPattern<v2f64, 5, "SelectScalarSSELoad", [],
- [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
+ [SDNPHasChain, SDNPMayLoad]>;
def ssmem : Operand<v4f32> {
let PrintMethod = "printf32mem";
Modified: llvm/branches/Apple/Morbo/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Transforms/InstCombine/InstCombineVectorOps.cpp?rev=115328&r1=115327&r2=115328&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Transforms/InstCombine/InstCombineVectorOps.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Transforms/InstCombine/InstCombineVectorOps.cpp Fri Oct 1 14:23:54 2010
@@ -448,8 +448,10 @@
if (isa<UndefValue>(SVI.getOperand(2)))
return ReplaceInstUsesWith(SVI, UndefValue::get(SVI.getType()));
- unsigned VWidth = Mask.size();
- unsigned LHSWidth = cast<VectorType>(LHS->getType())->getNumElements();
+ unsigned VWidth = cast<VectorType>(SVI.getType())->getNumElements();
+
+ if (VWidth != cast<VectorType>(LHS->getType())->getNumElements())
+ return 0;
APInt UndefElts(VWidth, 0);
APInt AllOnesEltMask(APInt::getAllOnesValue(VWidth));
@@ -462,12 +464,14 @@
// Canonicalize shuffle(x ,x,mask) -> shuffle(x, undef,mask')
// Canonicalize shuffle(undef,x,mask) -> shuffle(x, undef,mask').
if (LHS == RHS || isa<UndefValue>(LHS)) {
- if (isa<UndefValue>(LHS) && LHS == RHS)
- return ReplaceInstUsesWith(SVI, UndefValue::get(SVI.getType()));
+ if (isa<UndefValue>(LHS) && LHS == RHS) {
+ // shuffle(undef,undef,mask) -> undef.
+ return ReplaceInstUsesWith(SVI, LHS);
+ }
// Remap any references to RHS to use LHS.
std::vector<Constant*> Elts;
- for (unsigned i = 0, e = LHSWidth; i != VWidth; ++i) {
+ for (unsigned i = 0, e = Mask.size(); i != e; ++i) {
if (Mask[i] >= 2*e)
Elts.push_back(UndefValue::get(Type::getInt32Ty(SVI.getContext())));
else {
@@ -491,130 +495,67 @@
}
// Analyze the shuffle, are the LHS or RHS and identity shuffles?
- if (VWidth == LHSWidth) {
- bool isLHSID = true, isRHSID = true;
-
- for (unsigned i = 0, e = Mask.size(); i != e; ++i) {
- if (Mask[i] >= e*2) continue; // Ignore undef values.
- // Is this an identity shuffle of the LHS value?
- isLHSID &= (Mask[i] == i);
-
- // Is this an identity shuffle of the RHS value?
- isRHSID &= (Mask[i]-e == i);
- }
-
- // Eliminate identity shuffles.
- if (isLHSID) return ReplaceInstUsesWith(SVI, LHS);
- if (isRHSID) return ReplaceInstUsesWith(SVI, RHS);
- }
+ bool isLHSID = true, isRHSID = true;
- // Check for a handful of important shuffle(shuffle()) combinations.
- ShuffleVectorInst *LSVI = dyn_cast<ShuffleVectorInst>(LHS);
- if (!LSVI)
- return MadeChange ? &SVI : 0;
-
- LHS = LSVI->getOperand(0);
- std::vector<unsigned> LHSMask = getShuffleMask(LSVI);
- unsigned LHSInNElts = cast<VectorType>(LHS->getType())->getNumElements();
-
- // If the LHS is an identity shuffle, or if SVI + LHS form a full unpack
- // operation, merge the LHS and SVI shuffles. This allows llvm to emit
- // efficient code for matrix transposes written with generic vector ops.
- bool isLHSLoExtract = true, isLHSHiExtract = true;
- bool isUnpackLo = isPowerOf2_32(VWidth);
- bool isUnpackHi = isPowerOf2_32(VWidth);
- for (unsigned i = 0, e = LHSMask.size(); i != e; ++i) {
- if (LHSMask[i] >= LHSInNElts*2) continue; // Ignore undef values;
- isLHSLoExtract &= (LHSMask[i] == i);
- isLHSHiExtract &= (LHSMask[i] == i+(LHSInNElts/2));
- isUnpackLo &= (LHSMask[i] == (i/2));
- isUnpackHi &= (LHSMask[i] == (i/2) + (e/2));
- }
- for (unsigned i = 0, e = Mask.size(); i != e && (isUnpackLo || isUnpackHi);
- i += 2) {
- isUnpackLo &= (Mask[i] == i) && (Mask[i+1] == (i/2)+e);
- isUnpackHi &= (Mask[i] == i) && (Mask[i+1] == (i/2)+e+(e/2));
- }
- if ((isLHSLoExtract || isLHSHiExtract || isUnpackLo || isUnpackHi) &&
- (isa<UndefValue>(RHS) || (LHSWidth == LHSInNElts))) {
- std::vector<Constant*> Elts;
- for (unsigned i = 0, e = VWidth; i != e; ++i) {
- if (Mask[i] >= 2*LHSWidth)
- Elts.push_back(UndefValue::get(Type::getInt32Ty(SVI.getContext())));
- else if (Mask[i] >= e)
- Elts.push_back(ConstantInt::get(Type::getInt32Ty(SVI.getContext()),
- Mask[i]));
- else
- Elts.push_back(ConstantInt::get(Type::getInt32Ty(SVI.getContext()),
- LHSMask[Mask[i]]));
- }
- if (isa<UndefValue>(RHS))
- RHS = UndefValue::get(LHS->getType());
- return new ShuffleVectorInst(LHS, RHS, ConstantVector::get(Elts));
- }
-
- // If rhs is shuffle + identity, propagate.
- if (ShuffleVectorInst *RSVI = dyn_cast<ShuffleVectorInst>(RHS)) {
- std::vector<unsigned> RHSMask = getShuffleMask(RSVI);
- unsigned RHSInNElts =
- cast<VectorType>(RSVI->getOperand(0)->getType())->getNumElements();
-
- // If rhs is identity, propagate
- bool isRHSLoExtract = true, isRHSHiExtract = true;
- for (unsigned i = 0, e = RHSMask.size(); i != e; ++i) {
- if (RHSMask[i] >= RHSInNElts*2) continue; // Ignore undef values;
- isRHSLoExtract &= (RHSMask[i] == i);
- isRHSHiExtract &= (RHSMask[i] == i+(RHSInNElts/2));
- }
- if ((isRHSLoExtract || isRHSHiExtract) && (LHSWidth == RHSInNElts)) {
- std::vector<Constant*> Elts;
- for (unsigned i = 0, e = VWidth; i != e; ++i) {
- if (Mask[i] >= 2*LHSWidth)
- Elts.push_back(UndefValue::get(Type::getInt32Ty(SVI.getContext())));
- else if (Mask[i] < LHSWidth)
- Elts.push_back(ConstantInt::get(Type::getInt32Ty(SVI.getContext()),
- Mask[i]));
- else
- Elts.push_back(ConstantInt::get(Type::getInt32Ty(SVI.getContext()),
- RHSMask[Mask[i]-LHSWidth]+LHSWidth));
- }
- SVI.setOperand(1, RSVI->getOperand(0));
- SVI.setOperand(2, ConstantVector::get(Elts));
- return &SVI;
- }
+ for (unsigned i = 0, e = Mask.size(); i != e; ++i) {
+ if (Mask[i] >= e*2) continue; // Ignore undef values.
+ // Is this an identity shuffle of the LHS value?
+ isLHSID &= (Mask[i] == i);
+
+ // Is this an identity shuffle of the RHS value?
+ isRHSID &= (Mask[i]-e == i);
}
- // Be extremely conservative when merging shufflevector instructions. It is
- // difficult for the code generator to recognize a merged shuffle, which
- // usually leads to worse code from merging a shuffle.
- if (!isa<UndefValue>(RHS))
- return MadeChange ? &SVI : 0;
-
- // If the merged shuffle mask is one of the two input shuffle masks, which
- // just removes one instruction. This should handle splat(splat) -> splat.
- if (LHSMask.size() == Mask.size()) {
- std::vector<unsigned> NewMask;
- for (unsigned i = 0, e = Mask.size(); i != e; ++i)
- if (Mask[i] >= e)
- NewMask.push_back(2*e);
- else
- NewMask.push_back(LHSMask[Mask[i]]);
-
- // If the result mask is equal to the src shuffle or this shuffle mask,
- // do the replacement.
- if (NewMask == LHSMask || NewMask == Mask) {
- std::vector<Constant*> Elts;
- for (unsigned i = 0, e = NewMask.size(); i != e; ++i) {
- if (NewMask[i] >= LHSInNElts*2) {
- Elts.push_back(UndefValue::get(Type::getInt32Ty(SVI.getContext())));
- } else {
- Elts.push_back(ConstantInt::get(Type::getInt32Ty(SVI.getContext()),
- NewMask[i]));
+ // Eliminate identity shuffles.
+ if (isLHSID) return ReplaceInstUsesWith(SVI, LHS);
+ if (isRHSID) return ReplaceInstUsesWith(SVI, RHS);
+
+ // If the LHS is a shufflevector itself, see if we can combine it with this
+ // one without producing an unusual shuffle. Here we are really conservative:
+ // we are absolutely afraid of producing a shuffle mask not in the input
+ // program, because the code gen may not be smart enough to turn a merged
+ // shuffle into two specific shuffles: it may produce worse code. As such,
+ // we only merge two shuffles if the result is one of the two input shuffle
+ // masks. In this case, merging the shuffles just removes one instruction,
+ // which we know is safe. This is good for things like turning:
+ // (splat(splat)) -> splat.
+ if (ShuffleVectorInst *LHSSVI = dyn_cast<ShuffleVectorInst>(LHS)) {
+ if (isa<UndefValue>(RHS)) {
+ std::vector<unsigned> LHSMask = getShuffleMask(LHSSVI);
+
+ if (LHSMask.size() == Mask.size()) {
+ std::vector<unsigned> NewMask;
+ for (unsigned i = 0, e = Mask.size(); i != e; ++i)
+ if (Mask[i] >= e)
+ NewMask.push_back(2*e);
+ else
+ NewMask.push_back(LHSMask[Mask[i]]);
+
+ // If the result mask is equal to the src shuffle or this
+ // shuffle mask, do the replacement.
+ if (NewMask == LHSMask || NewMask == Mask) {
+ unsigned LHSInNElts =
+ cast<VectorType>(LHSSVI->getOperand(0)->getType())->
+ getNumElements();
+ std::vector<Constant*> Elts;
+ for (unsigned i = 0, e = NewMask.size(); i != e; ++i) {
+ if (NewMask[i] >= LHSInNElts*2) {
+ Elts.push_back(UndefValue::get(
+ Type::getInt32Ty(SVI.getContext())));
+ } else {
+ Elts.push_back(ConstantInt::get(
+ Type::getInt32Ty(SVI.getContext()),
+ NewMask[i]));
+ }
+ }
+ return new ShuffleVectorInst(LHSSVI->getOperand(0),
+ LHSSVI->getOperand(1),
+ ConstantVector::get(Elts));
}
}
- return new ShuffleVectorInst(LHS, LSVI->getOperand(1),
- ConstantVector::get(Elts));
}
}
+
return MadeChange ? &SVI : 0;
}
+
Removed: llvm/branches/Apple/Morbo/test/DebugInfo/2010-09-16-EmptyFilename.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/test/DebugInfo/2010-09-16-EmptyFilename.ll?rev=115327&view=auto
==============================================================================
--- llvm/branches/Apple/Morbo/test/DebugInfo/2010-09-16-EmptyFilename.ll (original)
+++ llvm/branches/Apple/Morbo/test/DebugInfo/2010-09-16-EmptyFilename.ll (removed)
@@ -1,31 +0,0 @@
-; RUN: llc -O0 < %s - | FileCheck %s
-; Radar 8286101
-; CHECK: File size
-; CHECK-NEXT: stdin
-; CHECK-NEXT: Directory
-
-define i32 @foo() nounwind ssp {
-entry:
- ret i32 42, !dbg !8
-}
-
-define i32 @bar() nounwind ssp {
-entry:
- ret i32 21, !dbg !10
-}
-
-!llvm.dbg.sp = !{!0, !6}
-
-!0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 53, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @foo} ; [ DW_TAG_subprogram ]
-!1 = metadata !{i32 524329, metadata !"", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ]
-!2 = metadata !{i32 524305, i32 0, i32 12, metadata !"bug.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 114084)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
-!3 = metadata !{i32 524309, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ]
-!4 = metadata !{metadata !5}
-!5 = metadata !{i32 524324, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
-!6 = metadata !{i32 524334, i32 0, metadata !7, metadata !"bar", metadata !"bar", metadata !"bar", metadata !7, i32 4, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @bar} ; [ DW_TAG_subprogram ]
-!7 = metadata !{i32 524329, metadata !"bug.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ]
-!8 = metadata !{i32 53, i32 13, metadata !9, null}
-!9 = metadata !{i32 524299, metadata !0, i32 53, i32 11, metadata !1, i32 0} ; [ DW_TAG_lexical_block ]
-!10 = metadata !{i32 4, i32 13, metadata !11, null}
-!11 = metadata !{i32 524299, metadata !12, i32 4, i32 13, metadata !7, i32 2} ; [ DW_TAG_lexical_block ]
-!12 = metadata !{i32 524299, metadata !6, i32 4, i32 11, metadata !7, i32 1} ; [ DW_TAG_lexical_block ]
Removed: llvm/branches/Apple/Morbo/test/FrontendC/asm-reg-var-local.c
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/test/FrontendC/asm-reg-var-local.c?rev=115327&view=auto
==============================================================================
--- llvm/branches/Apple/Morbo/test/FrontendC/asm-reg-var-local.c (original)
+++ llvm/branches/Apple/Morbo/test/FrontendC/asm-reg-var-local.c (removed)
@@ -1,32 +0,0 @@
-// RUN: %llvmgcc %s -m64 -S -o - | FileCheck %s
-// Exercise various use cases for local asm "register variables".
-// XFAIL: *
-// XTARGET: x86_64
-
-int foo() {
-// CHECK: %a = alloca i32
-
- register int a asm("rsi")=5;
-// CHECK: store i32 5, i32* %a, align 4
-
- asm volatile("; %0 This asm defines rsi" : "=r"(a));
-// CHECK: %asmtmp = call i32 asm sideeffect "; $0 This asm defines rsi", "={rsi}
-// CHECK: store i32 %asmtmp, i32* %a
-
- a = 42;
-// CHECK: store i32 42, i32* %a, align 4
-
- asm volatile("; %0 This asm uses rsi" : : "r"(a));
-// CHECK: %1 = load i32* %a, align 4
-// CHECK: call void asm sideeffect "", "{rsi}"(i32 %1) nounwind
-// CHECK: %2 = call i32 asm sideeffect "", "={rsi}"() nounwind
-// CHECK: call void asm sideeffect "; $0 This asm uses rsi", "{rsi},~{dirflag},~{fpsr},~{flags}"(i32 %2)
-
- return a;
-// CHECK: %3 = load i32* %a, align 4
-// CHECK: call void asm sideeffect "", "{rsi}"(i32 %3) nounwind
-// CHECK: %4 = call i32 asm sideeffect "", "={rsi}"() nounwind
-// CHECK: store i32 %4, i32* %0, align 4
-// CHECK: %5 = load i32* %0, align 4
-// CHECK: store i32 %5, i32* %retval, align 4
-}
Modified: llvm/branches/Apple/Morbo/test/Transforms/InstCombine/vec_shuffle.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/test/Transforms/InstCombine/vec_shuffle.ll?rev=115328&r1=115327&r2=115328&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/test/Transforms/InstCombine/vec_shuffle.ll (original)
+++ llvm/branches/Apple/Morbo/test/Transforms/InstCombine/vec_shuffle.ll Fri Oct 1 14:23:54 2010
@@ -86,33 +86,4 @@
%tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> < i32 13, i32 9, i32 4, i32 13 > ; <<4 x i8>> [#uses=1]
%tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1]
ret <4 x i8> %tmp9
-}
-
-; Test fold of hi/lo vector halves
-; Test fold of unpack operation
-define void @test10(<16 x i8>* %out, <16 x i8> %r, <16 x i8> %g, <16 x i8> %b, <16 x i8> %a) nounwind ssp {
-; CHECK: @test10
-; CHECK-NEXT: shufflevector
-; CHECK-NEXT: shufflevector
-; CHECK-NEXT: store
-; CHECK-NEXT: getelementptr
-; CHECK-NEXT: store
-; CHECK-NEXT: ret
- %tmp1 = shufflevector <16 x i8> %r, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> ; <<8 x i8>> [#uses=1]
- %tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> ; <<16 x i8>> [#uses=1]
- %tmp4 = shufflevector <16 x i8> undef, <16 x i8> %tmp3, <16 x i32> <i32 16, i32 1, i32 17, i32 3, i32 18, i32 5, i32 19, i32 7, i32 20, i32 9, i32 21, i32 11, i32 22, i32 13, i32 23, i32 15> ; <<16 x i8>> [#uses=1]
- %tmp6 = shufflevector <16 x i8> %b, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> ; <<8 x i8>> [#uses=1]
- %tmp8 = shufflevector <8 x i8> %tmp6, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> ; <<16 x i8>> [#uses=1]
- %tmp9 = shufflevector <16 x i8> %tmp4, <16 x i8> %tmp8, <16 x i32> <i32 0, i32 16, i32 2, i32 17, i32 4, i32 18, i32 6, i32 19, i32 8, i32 20, i32 10, i32 21, i32 12, i32 22, i32 14, i32 23> ; <<16 x i8>> [#uses=1]
- %tmp11 = shufflevector <16 x i8> %r, <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> ; <<8 x i8>> [#uses=1]
- %tmp13 = shufflevector <8 x i8> %tmp11, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> ; <<16 x i8>> [#uses=1]
- %tmp14 = shufflevector <16 x i8> undef, <16 x i8> %tmp13, <16 x i32> <i32 16, i32 1, i32 17, i32 3, i32 18, i32 5, i32 19, i32 7, i32 20, i32 9, i32 21, i32 11, i32 22, i32 13, i32 23, i32 15> ; <<16 x i8>> [#uses=1]
- %tmp16 = shufflevector <16 x i8> %b, <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> ; <<8 x i8>> [#uses=1]
- %tmp18 = shufflevector <8 x i8> %tmp16, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> ; <<16 x i8>> [#uses=1]
- %tmp19 = shufflevector <16 x i8> %tmp14, <16 x i8> %tmp18, <16 x i32> <i32 0, i32 16, i32 2, i32 17, i32 4, i32 18, i32 6, i32 19, i32 8, i32 20, i32 10, i32 21, i32 12, i32 22, i32 14, i32 23> ; <<16 x i8>> [#uses=1]
- %arrayidx = getelementptr inbounds <16 x i8>* %out, i64 0 ; <<16 x i8>*> [#uses=1]
- store <16 x i8> %tmp9, <16 x i8>* %arrayidx
- %arrayidx24 = getelementptr inbounds <16 x i8>* %out, i64 1 ; <<16 x i8>*> [#uses=1]
- store <16 x i8> %tmp19, <16 x i8>* %arrayidx24
- ret void
-}
+}
\ No newline at end of file
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