[llvm-branch-commits] [llvm-branch] r119625 - in /llvm/branches/Apple/whitney: lib/CodeGen/SelectionDAG/SelectionDAG.cpp test/CodeGen/X86/memset64-on-x86-32.ll test/CodeGen/X86/misaligned-memset.ll

[Daniel Dunbar]

Author: ddunbar
Date: Wed Nov 17 20:36:25 2010
New Revision: 119625

URL: http://llvm.org/viewvc/llvm-project?rev=119625&view=rev
Log:
Merge r119605:
--
Author: Dale Johannesen <dalej at apple.com>
Date:   Thu Nov 18 01:35:23 2010 +0000

    Do not throw away alignment when generating the DAG for
    memset; we may need it to decide between MOVAPS and MOVUPS
    later.  Adjust a test that was looking for wrong code.
    PR 3866 / 8675131.

Added:
    llvm/branches/Apple/whitney/test/CodeGen/X86/misaligned-memset.ll
Modified:
    llvm/branches/Apple/whitney/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/branches/Apple/whitney/test/CodeGen/X86/memset64-on-x86-32.ll

Modified: llvm/branches/Apple/whitney/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=119625&r1=119624&r2=119625&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/branches/Apple/whitney/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Nov 17 20:36:25 2010
@@ -3486,7 +3486,7 @@
     SDValue Store = DAG.getStore(Chain, dl, Value,
                                  getMemBasePlusOffset(Dst, DstOff, DAG),
                                  DstPtrInfo.getWithOffset(DstOff),
-                                 isVol, false, 0);
+                                 isVol, false, Align);
     OutChains.push_back(Store);
     DstOff += VTSize;
   }

Modified: llvm/branches/Apple/whitney/test/CodeGen/X86/memset64-on-x86-32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/test/CodeGen/X86/memset64-on-x86-32.ll?rev=119625&r1=119624&r2=119625&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/test/CodeGen/X86/memset64-on-x86-32.ll (original)
+++ llvm/branches/Apple/whitney/test/CodeGen/X86/memset64-on-x86-32.ll Wed Nov 17 20:36:25 2010
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin   -mcpu=nehalem | grep movaps | count 5
+; RUN: llc < %s -mtriple=i386-apple-darwin   -mcpu=nehalem | grep movups | count 5
 ; RUN: llc < %s -mtriple=i386-apple-darwin   -mcpu=core2   | grep movl   | count 20
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2   | grep movq   | count 10
 

Added: llvm/branches/Apple/whitney/test/CodeGen/X86/misaligned-memset.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/test/CodeGen/X86/misaligned-memset.ll?rev=119625&view=auto
==============================================================================
--- llvm/branches/Apple/whitney/test/CodeGen/X86/misaligned-memset.ll (added)
+++ llvm/branches/Apple/whitney/test/CodeGen/X86/misaligned-memset.ll Wed Nov 17 20:36:25 2010
@@ -0,0 +1,15 @@
+; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=nehalem < %s | FileCheck %s
+
+ at a = common global [3 x i64] zeroinitializer, align 16
+
+define i32 @main() nounwind ssp {
+; CHECK: movups
+entry:
+  %retval = alloca i32, align 4
+  store i32 0, i32* %retval
+  call void @llvm.memset.p0i8.i64(i8* bitcast (i64* getelementptr inbounds ([3 x i64]* @a, i32 0, i64 1) to i8*), i8 0, i64 16, i32 1, i1 false)
+  %0 = load i32* %retval
+  ret i32 %0
+}
+
+declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind