[llvm-branch-commits] [llvm-branch] r104769 - in /llvm/branches/Apple/whitney: include/llvm/Target/TargetAsmBackend.h lib/MC/MCAssembler.cpp lib/MC/MCMachOStreamer.cpp lib/Target/X86/X86AsmBackend.cpp
Daniel Dunbar
daniel at zuster.org
Wed May 26 15:29:05 PDT 2010
Author: ddunbar
Date: Wed May 26 17:29:05 2010
New Revision: 104769
URL: http://llvm.org/viewvc/llvm-project?rev=104769&view=rev
Log:
MC: Simplify MayNeedRelaxation to not provide the fixups, so we can query it before encoding.
Modified:
llvm/branches/Apple/whitney/include/llvm/Target/TargetAsmBackend.h
llvm/branches/Apple/whitney/lib/MC/MCAssembler.cpp
llvm/branches/Apple/whitney/lib/MC/MCMachOStreamer.cpp
llvm/branches/Apple/whitney/lib/Target/X86/X86AsmBackend.cpp
Modified: llvm/branches/Apple/whitney/include/llvm/Target/TargetAsmBackend.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/include/llvm/Target/TargetAsmBackend.h?rev=104769&r1=104768&r2=104769&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/include/llvm/Target/TargetAsmBackend.h (original)
+++ llvm/branches/Apple/whitney/include/llvm/Target/TargetAsmBackend.h Wed May 26 17:29:05 2010
@@ -112,10 +112,7 @@
/// relaxation.
///
/// \arg Inst - The instruction to test.
- /// \arg Fixups - The actual fixups this instruction encoded to, for potential
- /// use by the target backend.
- virtual bool MayNeedRelaxation(const MCInst &Inst,
- const SmallVectorImpl<MCFixup> &Fixups) const = 0;
+ virtual bool MayNeedRelaxation(const MCInst &Inst) const = 0;
/// RelaxInstruction - Relax the instruction in the given fragment to the next
/// wider instruction.
Modified: llvm/branches/Apple/whitney/lib/MC/MCAssembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/lib/MC/MCAssembler.cpp?rev=104769&r1=104768&r2=104769&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/lib/MC/MCAssembler.cpp (original)
+++ llvm/branches/Apple/whitney/lib/MC/MCAssembler.cpp Wed May 26 17:29:05 2010
@@ -787,7 +787,7 @@
// If this inst doesn't ever need relaxation, ignore it. This occurs when we
// are intentionally pushing out inst fragments, or because we relaxed a
// previous instruction to one that doesn't need relaxation.
- if (!getBackend().MayNeedRelaxation(IF->getInst(), IF->getFixups()))
+ if (!getBackend().MayNeedRelaxation(IF->getInst()))
return false;
for (MCInstFragment::const_fixup_iterator it = IF->fixup_begin(),
Modified: llvm/branches/Apple/whitney/lib/MC/MCMachOStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/lib/MC/MCMachOStreamer.cpp?rev=104769&r1=104768&r2=104769&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/lib/MC/MCMachOStreamer.cpp (original)
+++ llvm/branches/Apple/whitney/lib/MC/MCMachOStreamer.cpp Wed May 26 17:29:05 2010
@@ -451,7 +451,7 @@
// total knowledge about undefined symbols at that point). Even now, though,
// we can do a decent job, especially on Darwin where scattering means that we
// are going to often know that we can never fully resolve a fixup.
- if (Assembler.getBackend().MayNeedRelaxation(Inst, AsmFixups)) {
+ if (Assembler.getBackend().MayNeedRelaxation(Inst)) {
MCInstFragment *IF = new MCInstFragment(Inst, CurSectionData);
IF->setAtom(CurrentAtomMap.lookup(CurSectionData));
Modified: llvm/branches/Apple/whitney/lib/Target/X86/X86AsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/lib/Target/X86/X86AsmBackend.cpp?rev=104769&r1=104768&r2=104769&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/lib/Target/X86/X86AsmBackend.cpp (original)
+++ llvm/branches/Apple/whitney/lib/Target/X86/X86AsmBackend.cpp Wed May 26 17:29:05 2010
@@ -54,8 +54,7 @@
DF.getContents()[Fixup.getOffset() + i] = uint8_t(Value >> (i * 8));
}
- bool MayNeedRelaxation(const MCInst &Inst,
- const SmallVectorImpl<MCFixup> &Fixups) const;
+ bool MayNeedRelaxation(const MCInst &Inst) const;
void RelaxInstruction(const MCInstFragment *IF, MCInst &Res) const;
@@ -88,31 +87,16 @@
}
}
-bool X86AsmBackend::MayNeedRelaxation(const MCInst &Inst,
- const SmallVectorImpl<MCFixup> &Fixups) const {
- for (unsigned i = 0, e = Fixups.size(); i != e; ++i) {
- const MCFixup &F = Fixups[i];
-
- // We don't support relaxing anything else currently. Make sure we error out
- // if we see a non-constant 1 or 2 byte fixup.
- //
- // FIXME: We should need to check this here, this is better checked in the
- // object writer which should be verifying that any final relocations match
- // the expected fixup. However, that code is more complicated and hasn't
- // been written yet. See the FIXMEs in MachObjectWriter.cpp.
- if ((F.getKind() == FK_Data_1 || F.getKind() == FK_Data_2) &&
- !isa<MCConstantExpr>(F.getValue()))
- report_fatal_error("unexpected small fixup with a non-constant operand!");
-
- // Check for a 1byte pcrel fixup, and enforce that we would know how to
- // relax this instruction.
- if (unsigned(F.getKind()) == X86::reloc_pcrel_1byte) {
- assert(getRelaxedOpcode(Inst.getOpcode()) != Inst.getOpcode());
- return true;
- }
- }
-
- return false;
+bool X86AsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
+ // Check if this instruction is ever relaxable.
+ if (getRelaxedOpcode(Inst.getOpcode()) == Inst.getOpcode())
+ return false;
+
+ // If so, just assume it can be relaxed. Once we support relaxing more complex
+ // instructions we should check that the instruction actually has symbolic
+ // operands before doing this, but we need to be careful about things like
+ // PCrel.
+ return true;
}
// FIXME: Can tblgen help at all here to verify there aren't other instructions
More information about the llvm-branch-commits
mailing list