[llvm-branch-commits] [llvm-branch] r104425 - in /llvm/branches/Apple/Hermes: include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/Target/ARM/ lib/Target/MSP430/ lib/Target/PowerPC/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/XCore/ test/CodeGen/ARM/

Evan Cheng evan.cheng at apple.com
Fri May 21 19:04:34 PDT 2010


Author: evancheng
Date: Fri May 21 21:04:34 2010
New Revision: 104425

URL: http://llvm.org/viewvc/llvm-project?rev=104425&view=rev
Log:
Merge: 104421.

Added:
    llvm/branches/Apple/Hermes/test/CodeGen/ARM/arm-returnaddr.ll
      - copied, changed from r104421, llvm/trunk/test/CodeGen/ARM/arm-returnaddr.ll
Modified:
    llvm/branches/Apple/Hermes/include/llvm/CodeGen/MachineFrameInfo.h
    llvm/branches/Apple/Hermes/include/llvm/Target/TargetInstrInfo.h
    llvm/branches/Apple/Hermes/lib/CodeGen/PrologEpilogInserter.cpp
    llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.h
    llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp
    llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.h
    llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrFormats.td   (props changed)
    llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1InstrInfo.cpp
    llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1InstrInfo.h
    llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430ISelLowering.cpp
    llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430InstrInfo.cpp
    llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430InstrInfo.h
    llvm/branches/Apple/Hermes/lib/Target/PowerPC/PPCISelLowering.cpp
    llvm/branches/Apple/Hermes/lib/Target/SystemZ/SystemZInstrInfo.cpp
    llvm/branches/Apple/Hermes/lib/Target/SystemZ/SystemZInstrInfo.h
    llvm/branches/Apple/Hermes/lib/Target/X86/X86ISelLowering.cpp
    llvm/branches/Apple/Hermes/lib/Target/X86/X86InstrInfo.cpp
    llvm/branches/Apple/Hermes/lib/Target/X86/X86InstrInfo.h
    llvm/branches/Apple/Hermes/lib/Target/XCore/XCoreInstrInfo.cpp
    llvm/branches/Apple/Hermes/lib/Target/XCore/XCoreInstrInfo.h
    llvm/branches/Apple/Hermes/test/CodeGen/ARM/arm-frameaddr.ll

Modified: llvm/branches/Apple/Hermes/include/llvm/CodeGen/MachineFrameInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/include/llvm/CodeGen/MachineFrameInfo.h?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/include/llvm/CodeGen/MachineFrameInfo.h (original)
+++ llvm/branches/Apple/Hermes/include/llvm/CodeGen/MachineFrameInfo.h Fri May 21 21:04:34 2010
@@ -133,6 +133,10 @@
   /// to builtin \@llvm.frameaddress.
   bool FrameAddressTaken;
 
+  /// ReturnAddressTaken - This boolean keeps track of whether there is a call
+  /// to builtin \@llvm.returnaddress.
+  bool ReturnAddressTaken;
+
   /// StackSize - The prolog/epilog code inserter calculates the final stack
   /// offsets for all of the fixed size objects, updating the Objects list
   /// above.  It then updates StackSize to contain the number of bytes that need
@@ -204,6 +208,7 @@
     StackSize = NumFixedObjects = OffsetAdjustment = MaxAlignment = 0;
     HasVarSizedObjects = false;
     FrameAddressTaken = false;
+    ReturnAddressTaken = false;
     HasCalls = false;
     StackProtectorIdx = -1;
     MaxCallFrameSize = 0;
@@ -234,6 +239,12 @@
   bool isFrameAddressTaken() const { return FrameAddressTaken; }
   void setFrameAddressIsTaken(bool T) { FrameAddressTaken = T; }
 
+  /// isReturnAddressTaken - This method may be called any time after instruction
+  /// selection is complete to determine if there is a call to
+  /// \@llvm.returnaddress in this function.
+  bool isReturnAddressTaken() const { return ReturnAddressTaken; }
+  void setReturnAddressIsTaken(bool s) { ReturnAddressTaken = s; }
+
   /// getObjectIndexBegin - Return the minimum frame object index.
   ///
   int getObjectIndexBegin() const { return -NumFixedObjects; }

Modified: llvm/branches/Apple/Hermes/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/include/llvm/Target/TargetInstrInfo.h?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/branches/Apple/Hermes/include/llvm/Target/TargetInstrInfo.h Fri May 21 21:04:34 2010
@@ -349,7 +349,8 @@
   /// storeRegToStackSlot(). Returns false otherwise.
   virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                          MachineBasicBlock::iterator MI,
-                                const std::vector<CalleeSavedInfo> &CSI) const {
+                                         const std::vector<CalleeSavedInfo> &CSI,
+                                         const TargetRegisterInfo *TRI) const {
     return false;
   }
 
@@ -359,7 +360,8 @@
   /// Returns false otherwise.
   virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                                            MachineBasicBlock::iterator MI,
-                                const std::vector<CalleeSavedInfo> &CSI) const {
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                        const TargetRegisterInfo *TRI) const {
     return false;
   }
   

Modified: llvm/branches/Apple/Hermes/lib/CodeGen/PrologEpilogInserter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/CodeGen/PrologEpilogInserter.cpp?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/CodeGen/PrologEpilogInserter.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/CodeGen/PrologEpilogInserter.cpp Fri May 21 21:04:34 2010
@@ -291,12 +291,13 @@
     return;
 
   const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
+  const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
   MachineBasicBlock::iterator I;
 
   if (! ShrinkWrapThisFunction) {
     // Spill using target interface.
     I = EntryBlock->begin();
-    if (!TII.spillCalleeSavedRegisters(*EntryBlock, I, CSI)) {
+    if (!TII.spillCalleeSavedRegisters(*EntryBlock, I, CSI, TRI)) {
       for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
         // Add the callee-saved register as live-in.
         // It's killed at the spill.
@@ -326,7 +327,7 @@
 
       // Restore all registers immediately before the return and any
       // terminators that preceed it.
-      if (!TII.restoreCalleeSavedRegisters(*MBB, I, CSI)) {
+      if (!TII.restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
         for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
           TII.loadRegFromStackSlot(*MBB, I, CSI[i].getReg(),
                                    CSI[i].getFrameIdx(),

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.cpp Fri May 21 21:04:34 2010
@@ -28,6 +28,7 @@
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineJumpTableInfo.h"
 #include "llvm/CodeGen/MachineMemOperand.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/PseudoSourceValue.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/Support/CommandLine.h"
@@ -196,6 +197,42 @@
   return NewMIs[0];
 }
 
+bool
+ARMBaseInstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
+                                            MachineBasicBlock::iterator MI,
+                                            const std::vector<CalleeSavedInfo> &CSI,
+                                            const TargetRegisterInfo *TRI) const {
+  if (CSI.empty())
+    return false;
+
+  DebugLoc DL;
+  if (MI != MBB.end()) DL = MI->getDebugLoc();
+
+  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
+    unsigned Reg = CSI[i].getReg();
+    bool isKill = true;
+
+    // Add the callee-saved register as live-in unless it's LR and
+    // @llvm.returnaddress is called. If LR is returned for @llvm.returnaddress
+    // then it's already added to the function and entry block live-in sets.
+    if (Reg == ARM::LR) {
+      MachineFunction &MF = *MBB.getParent();
+      if (MF.getFrameInfo()->isReturnAddressTaken() &&
+          MF.getRegInfo().isLiveIn(Reg))
+        isKill = false;
+    }
+
+    if (isKill)
+      MBB.addLiveIn(Reg);
+
+    // Insert the spill to the stack frame. The register is killed at the spill
+    // 
+    storeRegToStackSlot(MBB, MI, Reg, isKill,
+                        CSI[i].getFrameIdx(), CSI[i].getRegClass());
+  }
+  return true;
+}
+
 // Branch analysis.
 bool
 ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.h?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.h Fri May 21 21:04:34 2010
@@ -200,6 +200,11 @@
   virtual const ARMBaseRegisterInfo &getRegisterInfo() const =0;
   const ARMSubtarget &getSubtarget() const { return Subtarget; }
 
+  bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
+                                 MachineBasicBlock::iterator MI,
+                                 const std::vector<CalleeSavedInfo> &CSI,
+                                 const TargetRegisterInfo *TRI) const;
+
   // Branch analysis.
   virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
                              MachineBasicBlock *&FBB,

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp Fri May 21 21:04:34 2010
@@ -1621,7 +1621,7 @@
     RC = ARM::GPRRegisterClass;
 
   // Transform the arguments stored in physical registers into virtual ones.
-  unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
+  unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); 
   SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, MVT::i32);
 
   SDValue ArgValue2;
@@ -2030,9 +2030,34 @@
   return DAG.getNode(ARMISD::CNEG, dl, VT, AbsVal, AbsVal, ARMCC, CCR, Cmp);
 }
 
+SDValue ARMTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) {
+  MachineFunction &MF = DAG.getMachineFunction();
+  MachineFrameInfo *MFI = MF.getFrameInfo();
+  MFI->setReturnAddressIsTaken(true);
+
+  EVT VT = Op.getValueType();
+  DebugLoc dl = Op.getDebugLoc();
+  unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
+  if (Depth) {
+    SDValue FrameAddr = LowerFRAMEADDR(Op, DAG);
+    SDValue Offset = DAG.getConstant(4, MVT::i32);
+    return DAG.getLoad(VT, dl, DAG.getEntryNode(),
+                       DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset),
+                       NULL, 0, false, 0);
+  }
+
+  // Return LR, which contains the return address. Mark it an implicit live-in.
+  ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
+  TargetRegisterClass *RC = AFI->isThumb1OnlyFunction()
+    ? ARM::tGPRRegisterClass : ARM::GPRRegisterClass;
+  unsigned Reg = MF.addLiveIn(ARM::LR, RC); 
+  return DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg, VT);
+}
+
 SDValue ARMTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) {
   MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
   MFI->setFrameAddressIsTaken(true);
+
   EVT VT = Op.getValueType();
   DebugLoc dl = Op.getDebugLoc();  // FIXME probably not meaningful
   unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
@@ -3091,7 +3116,7 @@
   case ISD::FP_TO_SINT:
   case ISD::FP_TO_UINT:    return LowerFP_TO_INT(Op, DAG);
   case ISD::FCOPYSIGN:     return LowerFCOPYSIGN(Op, DAG);
-  case ISD::RETURNADDR:    break;
+  case ISD::RETURNADDR:    return LowerRETURNADDR(Op, DAG);
   case ISD::FRAMEADDR:     return LowerFRAMEADDR(Op, DAG);
   case ISD::GLOBAL_OFFSET_TABLE: return LowerGLOBAL_OFFSET_TABLE(Op, DAG);
   case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG,

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.h?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.h (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.h Fri May 21 21:04:34 2010
@@ -296,6 +296,7 @@
     SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG);
     SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
     SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG);
+    SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG);
     SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG);
     SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG);
     SDValue LowerShiftRightParts(SDValue Op, SelectionDAG &DAG);

Propchange: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrFormats.td
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Fri May 21 21:04:34 2010
@@ -1 +1 @@
-/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td:96032,96521,96525,96572,96621,96775,96825,96827,96990,97025,97065,97071,97538,97707,97757,97782,97797,98210,98270,98395,98398,98402,98409,98416,98427,98561,98586,98845,98977,99043,99630,99678,100568,100892,101181,101282,101303,101383,101615,102526,103995,104060
+/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td:96032,96521,96525,96572,96621,96775,96825,96827,96990,97025,97065,97071,97538,97707,97757,97782,97797,98210,98270,98395,98398,98402,98409,98416,98427,98561,98586,98845,98977,99043,99630,99678,100568,100892,101181,101282,101303,101383,101615,102526,103995,104060,104421

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1InstrInfo.cpp?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1InstrInfo.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1InstrInfo.cpp Fri May 21 21:04:34 2010
@@ -17,6 +17,7 @@
 #include "ARMMachineFunctionInfo.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/MachineMemOperand.h"
 #include "llvm/CodeGen/PseudoSourceValue.h"
 #include "llvm/ADT/SmallVector.h"
@@ -150,7 +151,8 @@
 bool Thumb1InstrInfo::
 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                           MachineBasicBlock::iterator MI,
-                          const std::vector<CalleeSavedInfo> &CSI) const {
+                          const std::vector<CalleeSavedInfo> &CSI,
+                          const TargetRegisterInfo *TRI) const {
   if (CSI.empty())
     return false;
 
@@ -161,9 +163,22 @@
   AddDefaultPred(MIB);
   for (unsigned i = CSI.size(); i != 0; --i) {
     unsigned Reg = CSI[i-1].getReg();
-    // Add the callee-saved register as live-in. It's killed at the spill.
-    MBB.addLiveIn(Reg);
-    MIB.addReg(Reg, RegState::Kill);
+    bool isKill = true;
+
+    // Add the callee-saved register as live-in unless it's LR and
+    // @llvm.returnaddress is called. If LR is returned for @llvm.returnaddress
+    // then it's already added to the function and entry block live-in sets.
+    if (Reg == ARM::LR) {
+      MachineFunction &MF = *MBB.getParent();
+      if (MF.getFrameInfo()->isReturnAddressTaken() &&
+          MF.getRegInfo().isLiveIn(Reg))
+        isKill = false;
+    }
+
+    if (isKill) {
+      MBB.addLiveIn(Reg);
+      MIB.addReg(Reg, RegState::Kill);
+    }
   }
   return true;
 }
@@ -171,7 +186,8 @@
 bool Thumb1InstrInfo::
 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                             MachineBasicBlock::iterator MI,
-                            const std::vector<CalleeSavedInfo> &CSI) const {
+                            const std::vector<CalleeSavedInfo> &CSI,
+                            const TargetRegisterInfo *TRI) const {
   MachineFunction &MF = *MBB.getParent();
   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
   if (CSI.empty())

Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1InstrInfo.h?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1InstrInfo.h (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/Thumb1InstrInfo.h Fri May 21 21:04:34 2010
@@ -39,10 +39,12 @@
 
   bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                  MachineBasicBlock::iterator MI,
-                                 const std::vector<CalleeSavedInfo> &CSI) const;
+                                 const std::vector<CalleeSavedInfo> &CSI,
+                                 const TargetRegisterInfo *TRI) const;
   bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                                    MachineBasicBlock::iterator MI,
-                                   const std::vector<CalleeSavedInfo> &CSI) const;
+                                   const std::vector<CalleeSavedInfo> &CSI,
+                                   const TargetRegisterInfo *TRI) const;
 
   bool copyRegToReg(MachineBasicBlock &MBB,
                             MachineBasicBlock::iterator I,

Modified: llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430ISelLowering.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430ISelLowering.cpp Fri May 21 21:04:34 2010
@@ -883,6 +883,9 @@
 }
 
 SDValue MSP430TargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) {
+  MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
+  MFI->setReturnAddressIsTaken(true);
+
   unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
   DebugLoc dl = Op.getDebugLoc();
 
@@ -905,6 +908,7 @@
 SDValue MSP430TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) {
   MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
   MFI->setFrameAddressIsTaken(true);
+
   EVT VT = Op.getValueType();
   DebugLoc dl = Op.getDebugLoc();  // FIXME probably not meaningful
   unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

Modified: llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430InstrInfo.cpp?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430InstrInfo.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430InstrInfo.cpp Fri May 21 21:04:34 2010
@@ -130,7 +130,8 @@
 bool
 MSP430InstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                            MachineBasicBlock::iterator MI,
-                                const std::vector<CalleeSavedInfo> &CSI) const {
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                          const TargetRegisterInfo *TRI) const {
   if (CSI.empty())
     return false;
 
@@ -154,7 +155,8 @@
 bool
 MSP430InstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                                              MachineBasicBlock::iterator MI,
-                                const std::vector<CalleeSavedInfo> &CSI) const {
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                          const TargetRegisterInfo *TRI) const {
   if (CSI.empty())
     return false;
 

Modified: llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430InstrInfo.h?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430InstrInfo.h (original)
+++ llvm/branches/Apple/Hermes/lib/Target/MSP430/MSP430InstrInfo.h Fri May 21 21:04:34 2010
@@ -70,10 +70,12 @@
 
   virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                          MachineBasicBlock::iterator MI,
-                                 const std::vector<CalleeSavedInfo> &CSI) const;
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                         const TargetRegisterInfo *TRI) const;
   virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                                            MachineBasicBlock::iterator MI,
-                                 const std::vector<CalleeSavedInfo> &CSI) const;
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                           const TargetRegisterInfo *TRI) const;
 
   unsigned GetInstSizeInBytes(const MachineInstr *MI) const;
 

Modified: llvm/branches/Apple/Hermes/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/PowerPC/PPCISelLowering.cpp?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/PowerPC/PPCISelLowering.cpp Fri May 21 21:04:34 2010
@@ -5455,12 +5455,15 @@
 }
 
 SDValue PPCTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) {
+  MachineFunction &MF = DAG.getMachineFunction();
+  MachineFrameInfo *MFI = MF.getFrameInfo();
+  MFI->setReturnAddressIsTaken(true);
+
   DebugLoc dl = Op.getDebugLoc();
   // Depths > 0 not supported yet!
   if (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() > 0)
     return SDValue();
 
-  MachineFunction &MF = DAG.getMachineFunction();
   PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
 
   // Just load the return address off the stack.

Modified: llvm/branches/Apple/Hermes/lib/Target/SystemZ/SystemZInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/SystemZ/SystemZInstrInfo.cpp?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/SystemZ/SystemZInstrInfo.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/SystemZ/SystemZInstrInfo.cpp Fri May 21 21:04:34 2010
@@ -269,7 +269,8 @@
 bool
 SystemZInstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                            MachineBasicBlock::iterator MI,
-                                const std::vector<CalleeSavedInfo> &CSI) const {
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                          const TargetRegisterInfo *TRI) const {
   if (CSI.empty())
     return false;
 
@@ -343,7 +344,8 @@
 bool
 SystemZInstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                                              MachineBasicBlock::iterator MI,
-                                const std::vector<CalleeSavedInfo> &CSI) const {
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                          const TargetRegisterInfo *TRI) const {
   if (CSI.empty())
     return false;
 

Modified: llvm/branches/Apple/Hermes/lib/Target/SystemZ/SystemZInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/SystemZ/SystemZInstrInfo.h?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/SystemZ/SystemZInstrInfo.h (original)
+++ llvm/branches/Apple/Hermes/lib/Target/SystemZ/SystemZInstrInfo.h Fri May 21 21:04:34 2010
@@ -83,10 +83,12 @@
 
   virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                          MachineBasicBlock::iterator MI,
-                                 const std::vector<CalleeSavedInfo> &CSI) const;
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                         const TargetRegisterInfo *TRI) const;
   virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                                            MachineBasicBlock::iterator MI,
-                                 const std::vector<CalleeSavedInfo> &CSI) const;
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                           const TargetRegisterInfo *TRI) const;
 
   bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
   virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const;

Modified: llvm/branches/Apple/Hermes/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/X86/X86ISelLowering.cpp?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/X86/X86ISelLowering.cpp Fri May 21 21:04:34 2010
@@ -6980,6 +6980,9 @@
 }
 
 SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) {
+  MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
+  MFI->setReturnAddressIsTaken(true);
+
   unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
   DebugLoc dl = Op.getDebugLoc();
 
@@ -7003,6 +7006,7 @@
 SDValue X86TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) {
   MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
   MFI->setFrameAddressIsTaken(true);
+
   EVT VT = Op.getValueType();
   DebugLoc dl = Op.getDebugLoc();  // FIXME probably not meaningful
   unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();

Modified: llvm/branches/Apple/Hermes/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/X86/X86InstrInfo.cpp?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/X86/X86InstrInfo.cpp Fri May 21 21:04:34 2010
@@ -2192,7 +2192,8 @@
 
 bool X86InstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                              MachineBasicBlock::iterator MI,
-                                const std::vector<CalleeSavedInfo> &CSI) const {
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                          const TargetRegisterInfo *TRI) const {
   if (CSI.empty())
     return false;
 
@@ -2230,7 +2231,8 @@
 
 bool X86InstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                                                MachineBasicBlock::iterator MI,
-                                const std::vector<CalleeSavedInfo> &CSI) const {
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                          const TargetRegisterInfo *TRI) const {
   if (CSI.empty())
     return false;
 

Modified: llvm/branches/Apple/Hermes/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/X86/X86InstrInfo.h?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/branches/Apple/Hermes/lib/Target/X86/X86InstrInfo.h Fri May 21 21:04:34 2010
@@ -578,11 +578,13 @@
   
   virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                          MachineBasicBlock::iterator MI,
-                                 const std::vector<CalleeSavedInfo> &CSI) const;
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                         const TargetRegisterInfo *TRI) const;
 
   virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                                            MachineBasicBlock::iterator MI,
-                                 const std::vector<CalleeSavedInfo> &CSI) const;
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                           const TargetRegisterInfo *TRI) const;
   
   /// foldMemoryOperand - If this target supports it, fold a load or store of
   /// the specified stack slot into the specified machine instruction for the

Modified: llvm/branches/Apple/Hermes/lib/Target/XCore/XCoreInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/XCore/XCoreInstrInfo.cpp?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/XCore/XCoreInstrInfo.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/XCore/XCoreInstrInfo.cpp Fri May 21 21:04:34 2010
@@ -393,8 +393,8 @@
 
 bool XCoreInstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                                MachineBasicBlock::iterator MI,
-                                  const std::vector<CalleeSavedInfo> &CSI) const
-{
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                          const TargetRegisterInfo *TRI) const {
   if (CSI.empty()) {
     return true;
   }
@@ -427,7 +427,8 @@
 
 bool XCoreInstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                                          MachineBasicBlock::iterator MI,
-                               const std::vector<CalleeSavedInfo> &CSI) const
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                            const TargetRegisterInfo *TRI) const
 {
   bool AtStart = MI == MBB.begin();
   MachineBasicBlock::iterator BeforeI = MI;

Modified: llvm/branches/Apple/Hermes/lib/Target/XCore/XCoreInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/XCore/XCoreInstrInfo.h?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/XCore/XCoreInstrInfo.h (original)
+++ llvm/branches/Apple/Hermes/lib/Target/XCore/XCoreInstrInfo.h Fri May 21 21:04:34 2010
@@ -81,11 +81,13 @@
 
   virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
                                         MachineBasicBlock::iterator MI,
-                                const std::vector<CalleeSavedInfo> &CSI) const;
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                         const TargetRegisterInfo *TRI) const;
   
   virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
                                          MachineBasicBlock::iterator MI,
-                               const std::vector<CalleeSavedInfo> &CSI) const;
+                                        const std::vector<CalleeSavedInfo> &CSI,
+                                           const TargetRegisterInfo *TRI) const;
 
   virtual bool ReverseBranchCondition(
                             SmallVectorImpl<MachineOperand> &Cond) const;

Modified: llvm/branches/Apple/Hermes/test/CodeGen/ARM/arm-frameaddr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/test/CodeGen/ARM/arm-frameaddr.ll?rev=104425&r1=104424&r2=104425&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/test/CodeGen/ARM/arm-frameaddr.ll (original)
+++ llvm/branches/Apple/Hermes/test/CodeGen/ARM/arm-frameaddr.ll Fri May 21 21:04:34 2010
@@ -1,10 +1,15 @@
-; RUN: llc < %s -mtriple=arm-apple-darwin  | grep mov | grep r7
-; RUN: llc < %s -mtriple=arm-linux-gnueabi | grep mov | grep r11
+; RUN: llc < %s -mtriple=arm-apple-darwin  | FileCheck %s -check-prefix=DARWIN
+; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=LINUX
 ; PR4344
 ; PR4416
 
 define arm_aapcscc i8* @t() nounwind {
 entry:
+; DARWIN: t:
+; DARWIN: mov r0, r7
+
+; LINUX: t:
+; LINUX: mov r0, r11
 	%0 = call i8* @llvm.frameaddress(i32 0)
         ret i8* %0
 }

Copied: llvm/branches/Apple/Hermes/test/CodeGen/ARM/arm-returnaddr.ll (from r104421, llvm/trunk/test/CodeGen/ARM/arm-returnaddr.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/test/CodeGen/ARM/arm-returnaddr.ll?p2=llvm/branches/Apple/Hermes/test/CodeGen/ARM/arm-returnaddr.ll&p1=llvm/trunk/test/CodeGen/ARM/arm-returnaddr.ll&r1=104421&r2=104425&rev=104425&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/arm-returnaddr.ll (original)
+++ llvm/branches/Apple/Hermes/test/CodeGen/ARM/arm-returnaddr.ll Fri May 21 21:04:34 2010
@@ -14,7 +14,7 @@
 ; CHECK: rt2:
 ; CHECK: ldr r0, [r7]
 ; CHECK: ldr r0, [r0]
-; CHECK: ldr r0, [r0, #4]
+; CHECK: ldr r0, [r0, #+4]
   %0 = tail call i8* @llvm.returnaddress(i32 2)
   ret i8* %0
 }





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