[llvm-branch-commits] [llvm-branch] r104355 - in /llvm/branches/Apple/whitney/lib/Target/X86: AsmParser/X86AsmParser.cpp X86Instr64bit.td X86InstrInfo.td

[Daniel Dunbar]

Author: ddunbar
Date: Fri May 21 14:06:44 2010
New Revision: 104355

URL: http://llvm.org/viewvc/llvm-project?rev=104355&view=rev
Log:
X86: Model i64i32imm properly, as a subclass of all immediates.

Modified:
    llvm/branches/Apple/whitney/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/branches/Apple/whitney/lib/Target/X86/X86Instr64bit.td
    llvm/branches/Apple/whitney/lib/Target/X86/X86InstrInfo.td

Modified: llvm/branches/Apple/whitney/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=104355&r1=104354&r2=104355&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/branches/Apple/whitney/lib/Target/X86/AsmParser/X86AsmParser.cpp Fri May 21 14:06:44 2010
@@ -200,6 +200,20 @@
     return true;
   }
   
+  bool isImmSExt32() const {
+    // Accept immediates which fit in 32 bits when sign extended, and
+    // non-absolute immediates.
+    if (!isImm())
+      return false;
+
+    if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm())) {
+      int64_t Value = CE->getValue();
+      return Value == (int64_t) (int32_t) Value;
+    }
+
+    return true;
+  }
+
   bool isMem() const { return Kind == Memory; }
 
   bool isAbsMem() const {
@@ -237,6 +251,12 @@
     addExpr(Inst, getImm());
   }
 
+  void addImmSExt32Operands(MCInst &Inst, unsigned N) const {
+    // FIXME: Support user customization of the render method.
+    assert(N == 1 && "Invalid number of operands!");
+    addExpr(Inst, getImm());
+  }
+
   void addMemOperands(MCInst &Inst, unsigned N) const {
     assert((N == 5) && "Invalid number of operands!");
     Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));

Modified: llvm/branches/Apple/whitney/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/lib/Target/X86/X86Instr64bit.td?rev=104355&r1=104354&r2=104355&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/branches/Apple/whitney/lib/Target/X86/X86Instr64bit.td Fri May 21 14:06:44 2010
@@ -18,7 +18,9 @@
 //
 
 // 64-bits but only 32 bits are significant.
-def i64i32imm  : Operand<i64>;
+def i64i32imm  : Operand<i64> {
+  let ParserMatchClass = ImmSExt32AsmOperand;
+}
 
 // 64-bits but only 32 bits are significant, and those bits are treated as being
 // pc relative.

Modified: llvm/branches/Apple/whitney/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/whitney/lib/Target/X86/X86InstrInfo.td?rev=104355&r1=104354&r2=104355&view=diff
==============================================================================
--- llvm/branches/Apple/whitney/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/branches/Apple/whitney/lib/Target/X86/X86InstrInfo.td Fri May 21 14:06:44 2010
@@ -270,9 +270,14 @@
   let PrintMethod = "printSSECC";
 }
 
+def ImmSExt32AsmOperand : AsmOperandClass {
+  let Name = "ImmSExt32";
+  let SuperClass = ImmAsmOperand;
+}
+
 def ImmSExt8AsmOperand : AsmOperandClass {
   let Name = "ImmSExt8";
-  let SuperClass = ImmAsmOperand;
+  let SuperClass = ImmSExt32AsmOperand;
 }
 
 // A couple of more descriptive operand definitions.