[llvm-branch-commits] [llvm-branch] r99456 - /llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.td

[Evan Cheng]

Author: evancheng
Date: Wed Mar 24 19:17:29 2010
New Revision: 99456

URL: http://llvm.org/viewvc/llvm-project?rev=99456&view=rev
Log:
Merge 99455.

Modified:
    llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.td

Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.td?rev=99456&r1=99455&r2=99456&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.td Wed Mar 24 19:17:29 2010
@@ -323,6 +323,7 @@
 def NearData     : Predicate<"TM.getCodeModel() == CodeModel::Small ||"
                              "TM.getCodeModel() == CodeModel::Kernel">;
 def IsStatic     : Predicate<"TM.getRelocationModel() == Reloc::Static">;
+def IsNotPIC     : Predicate<"TM.getRelocationModel() != Reloc::PIC_">;
 def OptForSize   : Predicate<"OptForSize">;
 def OptForSpeed  : Predicate<"!OptForSize">;
 def FastBTMem    : Predicate<"!Subtarget->isBTMemSlow()">;
@@ -4359,9 +4360,12 @@
           (TCRETURNri GR32_TC:$dst, imm:$off)>,
 	  Requires<[In32BitMode]>;
 
+// FIXME: This is disabled for 32-bit PIC mode because the global base
+// register which is part of the address mode may be assigned a 
+// callee-saved register.
 def : Pat<(X86tcret (load addr:$dst), imm:$off),
           (TCRETURNmi addr:$dst, imm:$off)>,
-	  Requires<[In32BitMode]>;
+	  Requires<[In32BitMode, IsNotPIC]>;
 
 def : Pat<(X86tcret (i32 tglobaladdr:$dst), imm:$off),
           (TCRETURNdi texternalsym:$dst, imm:$off)>,