[llvm-branch-commits] [llvm-branch] r98844 - in /llvm/branches/Apple/Morbo: ./ lib/Target/X86/X86FixupKinds.h lib/Target/X86/X86Instr64bit.td lib/Target/X86/X86MCCodeEmitter.cpp test/MC/AsmParser/X86/x86_64-new-encoder.s
Bill Wendling
isanbard at gmail.com
Thu Mar 18 11:42:25 PDT 2010
Author: void
Date: Thu Mar 18 13:42:24 2010
New Revision: 98844
URL: http://llvm.org/viewvc/llvm-project?rev=98844&view=rev
Log:
$ svn merge -c 98835 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r98835 into '.':
U lib/Target/X86/X86Instr64bit.td
$ svn merge -c 98839 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r98839 into '.':
U test/MC/AsmParser/X86/x86_64-new-encoder.s
U lib/Target/X86/X86FixupKinds.h
U lib/Target/X86/X86MCCodeEmitter.cpp
Modified:
llvm/branches/Apple/Morbo/ (props changed)
llvm/branches/Apple/Morbo/lib/Target/X86/X86FixupKinds.h
llvm/branches/Apple/Morbo/lib/Target/X86/X86Instr64bit.td
llvm/branches/Apple/Morbo/lib/Target/X86/X86MCCodeEmitter.cpp
llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_64-new-encoder.s
Propchange: llvm/branches/Apple/Morbo/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Thu Mar 18 13:42:24 2010
@@ -1,2 +1,2 @@
/llvm/branches/Apple/Hermes:96832,96835,96858,96870,96876,96879
-/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98773,98778,98780,98810
+/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98773,98778,98780,98810,98835,98839
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86FixupKinds.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86FixupKinds.h?rev=98844&r1=98843&r2=98844&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86FixupKinds.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86FixupKinds.h Thu Mar 18 13:42:24 2010
@@ -17,7 +17,8 @@
enum Fixups {
reloc_pcrel_4byte = FirstTargetFixupKind, // 32-bit pcrel, e.g. a branch.
reloc_pcrel_1byte, // 8-bit pcrel, e.g. branch_1
- reloc_riprel_4byte // 32-bit rip-relative
+ reloc_riprel_4byte, // 32-bit rip-relative
+ reloc_riprel_4byte_movq_load // 32-bit rip-relative in movq
};
}
}
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86Instr64bit.td?rev=98844&r1=98843&r2=98844&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86Instr64bit.td Thu Mar 18 13:42:24 2010
@@ -144,7 +144,7 @@
// NOTE: this pattern doesn't match "X86call imm", because we do not know
// that the offset between an arbitrary immediate and the call will fit in
// the 32-bit pcrel field that we have.
- def CALL64pcrel32 : Ii32<0xE8, RawFrm,
+ def CALL64pcrel32 : Ii32PCRel<0xE8, RawFrm,
(outs), (ins i64i32imm_pcrel:$dst, variable_ops),
"call{q}\t$dst", []>,
Requires<[In64BitMode, NotWin64]>;
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86MCCodeEmitter.cpp?rev=98844&r1=98843&r2=98844&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86MCCodeEmitter.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86MCCodeEmitter.cpp Thu Mar 18 13:42:24 2010
@@ -38,14 +38,15 @@
~X86MCCodeEmitter() {}
unsigned getNumFixupKinds() const {
- return 3;
+ return 4;
}
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
const static MCFixupKindInfo Infos[] = {
{ "reloc_pcrel_4byte", 0, 4 * 8 },
{ "reloc_pcrel_1byte", 0, 1 * 8 },
- { "reloc_riprel_4byte", 0, 4 * 8 }
+ { "reloc_riprel_4byte", 0, 4 * 8 },
+ { "reloc_riprel_4byte_movq_load", 0, 4 * 8 }
};
if (Kind < FirstTargetFixupKind)
@@ -197,6 +198,14 @@
"Invalid rip-relative address");
EmitByte(ModRMByte(0, RegOpcodeField, 5), CurByte, OS);
+ unsigned FixupKind = X86::reloc_riprel_4byte;
+
+ // movq loads are handled with a special relocation form which allows the
+ // linker to eliminate some loads for GOT references which end up in the
+ // same linkage unit.
+ if (MI.getOpcode() == X86::MOV64rm_TC)
+ FixupKind = X86::reloc_riprel_4byte_movq_load;
+
// rip-relative addressing is actually relative to the *next* instruction.
// Since an immediate can follow the mod/rm byte for an instruction, this
// means that we need to bias the immediate field of the instruction with
@@ -204,7 +213,7 @@
// expression to emit.
int ImmSize = X86II::hasImm(TSFlags) ? X86II::getSizeOfImm(TSFlags) : 0;
- EmitImmediate(Disp, 4, MCFixupKind(X86::reloc_riprel_4byte),
+ EmitImmediate(Disp, 4, MCFixupKind(FixupKind),
CurByte, OS, Fixups, -ImmSize);
return;
}
Modified: llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_64-new-encoder.s
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_64-new-encoder.s?rev=98844&r1=98843&r2=98844&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_64-new-encoder.s (original)
+++ llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_64-new-encoder.s Thu Mar 18 13:42:24 2010
@@ -25,5 +25,13 @@
// CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
// CHECK: fixup A - offset: 3, value: foo-8, kind: reloc_riprel_4byte
-// CHECK: addq $-424, %rax # encoding: [0x48,0x05,0x58,0xfe,0xff,0xff]
+// CHECK: addq $-424, %rax
+// CHECK: encoding: [0x48,0x05,0x58,0xfe,0xff,0xff]
addq $-424, %rax
+
+
+// CHECK: movq _foo at GOTPCREL(%rip), %rax
+// CHECK: encoding: [0x48,0x8b,0x05,A,A,A,A]
+// CHECK: fixup A - offset: 3, value: _foo at GOTPCREL, kind: reloc_riprel_4byte_movq_load
+movq _foo at GOTPCREL(%rip), %rax
+
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