[llvm-branch-commits] [llvm-branch] r97636 - in /llvm/branches/Apple/Hermes: ./ lib/CodeGen/SelectionDAG/DAGCombiner.cpp lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp lib/CodeGen/SelectionDAG/TargetLowering.cpp test/CodeGen/X86/vec_cast.ll
Dan Gohman
gohman at apple.com
Tue Mar 2 19:29:01 PST 2010
Author: djg
Date: Tue Mar 2 21:29:01 2010
New Revision: 97636
URL: http://llvm.org/viewvc/llvm-project?rev=97636&view=rev
Log:
$ svn merge -c 97538 https://djg@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r97538 into '.':
U test/CodeGen/X86/vec_cast.ll
U lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
U lib/CodeGen/SelectionDAG/DAGCombiner.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
Modified:
llvm/branches/Apple/Hermes/ (props changed)
llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/branches/Apple/Hermes/test/CodeGen/X86/vec_cast.ll
Propchange: llvm/branches/Apple/Hermes/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Tue Mar 2 21:29:01 2010
@@ -1 +1 @@
-/llvm/trunk:96621
+/llvm/trunk:96621,97538
Modified: llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=97636&r1=97635&r2=97636&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Mar 2 21:29:01 2010
@@ -1064,7 +1064,7 @@
if (VT.isInteger() && !VT.isVector()) {
APInt LHSZero, LHSOne;
APInt RHSZero, RHSOne;
- APInt Mask = APInt::getAllOnesValue(VT.getSizeInBits());
+ APInt Mask = APInt::getAllOnesValue(VT.getScalarType().getSizeInBits());
DAG.ComputeMaskedBits(N0, Mask, LHSZero, LHSOne);
if (LHSZero.getBoolValue()) {
@@ -1136,7 +1136,7 @@
// fold (addc a, b) -> (or a, b), CARRY_FALSE iff a and b share no bits.
APInt LHSZero, LHSOne;
APInt RHSZero, RHSOne;
- APInt Mask = APInt::getAllOnesValue(VT.getSizeInBits());
+ APInt Mask = APInt::getAllOnesValue(VT.getScalarType().getSizeInBits());
DAG.ComputeMaskedBits(N0, Mask, LHSZero, LHSOne);
if (LHSZero.getBoolValue()) {
@@ -2750,7 +2750,7 @@
if (N1C && N0.getOpcode() == ISD::CTLZ &&
N1C->getAPIntValue() == Log2_32(VT.getSizeInBits())) {
APInt KnownZero, KnownOne;
- APInt Mask = APInt::getAllOnesValue(VT.getSizeInBits());
+ APInt Mask = APInt::getAllOnesValue(VT.getScalarType().getSizeInBits());
DAG.ComputeMaskedBits(N0.getOperand(0), Mask, KnownZero, KnownOne);
// If any of the input bits are KnownOne, then the input couldn't be all
Modified: llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=97636&r1=97635&r2=97636&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Tue Mar 2 21:29:01 2010
@@ -1079,8 +1079,8 @@
SDValue Amt = N->getOperand(1);
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
EVT ShTy = Amt.getValueType();
- unsigned ShBits = ShTy.getSizeInBits();
- unsigned NVTBits = NVT.getSizeInBits();
+ unsigned ShBits = ShTy.getScalarType().getSizeInBits();
+ unsigned NVTBits = NVT.getScalarType().getSizeInBits();
assert(isPowerOf2_32(NVTBits) &&
"Expanded integer type size not a power of two!");
DebugLoc dl = N->getDebugLoc();
Modified: llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=97636&r1=97635&r2=97636&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/CodeGen/SelectionDAG/TargetLowering.cpp Tue Mar 2 21:29:01 2010
@@ -1607,7 +1607,7 @@
// Fall back to ComputeMaskedBits to catch other known cases.
EVT OpVT = Val.getValueType();
- unsigned BitWidth = OpVT.getSizeInBits();
+ unsigned BitWidth = OpVT.getScalarType().getSizeInBits();
APInt Mask = APInt::getAllOnesValue(BitWidth);
APInt KnownZero, KnownOne;
DAG.ComputeMaskedBits(Val, Mask, KnownZero, KnownOne);
Modified: llvm/branches/Apple/Hermes/test/CodeGen/X86/vec_cast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/test/CodeGen/X86/vec_cast.ll?rev=97636&r1=97635&r2=97636&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/test/CodeGen/X86/vec_cast.ll (original)
+++ llvm/branches/Apple/Hermes/test/CodeGen/X86/vec_cast.ll Tue Mar 2 21:29:01 2010
@@ -31,11 +31,10 @@
ret <1 x i32> %c
}
-; TODO: Legalize doesn't yet handle this.
-;define <8 x i16> @g(<8 x i32> %a) nounwind {
-; %c = trunc <8 x i32> %a to <8 x i16>
-; ret <8 x i16> %c
-;}
+define <8 x i16> @g(<8 x i32> %a) nounwind {
+ %c = trunc <8 x i32> %a to <8 x i16>
+ ret <8 x i16> %c
+}
define <3 x i16> @h(<3 x i32> %a) nounwind {
%c = trunc <3 x i32> %a to <3 x i16>
@@ -46,3 +45,12 @@
%c = trunc <1 x i32> %a to <1 x i16>
ret <1 x i16> %c
}
+
+; PR6438
+define void @__OpenCL_math_kernel4_kernel() nounwind {
+ %tmp12.i = and <4 x i32> zeroinitializer, <i32 2139095040, i32 2139095040, i32 2139095040, i32 2139095040> ; <<4 x i32>> [#uses=1]
+ %cmp13.i = icmp eq <4 x i32> %tmp12.i, <i32 2139095040, i32 2139095040, i32 2139095040, i32 2139095040> ; <<4 x i1>> [#uses=2]
+ %cmp.ext14.i = sext <4 x i1> %cmp13.i to <4 x i32> ; <<4 x i32>> [#uses=0]
+ %tmp2110.i = and <4 x i1> %cmp13.i, zeroinitializer ; <<4 x i1>> [#uses=0]
+ ret void
+}
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