[llvm-branch-commits] [llvm-branch] r97503 - in /llvm/branches/Apple/Hermes: include/llvm/CodeGen/SelectionDAGNodes.h test/CodeGen/X86/vec_shuffle-36.ll

[Bill Wendling]

Author: void
Date: Mon Mar  1 15:46:03 2010
New Revision: 97503

URL: http://llvm.org/viewvc/llvm-project?rev=97503&view=rev
Log:
$ svn merge -c 96621 https://llvm.org/svn/llvm-project/llvm/trunk

Modified:
    llvm/branches/Apple/Hermes/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/branches/Apple/Hermes/test/CodeGen/X86/vec_shuffle-36.ll

Modified: llvm/branches/Apple/Hermes/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/include/llvm/CodeGen/SelectionDAGNodes.h?rev=97503&r1=97502&r2=97503&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/branches/Apple/Hermes/include/llvm/CodeGen/SelectionDAGNodes.h Mon Mar  1 15:46:03 2010
@@ -1759,7 +1759,12 @@
   bool isSplat() const { return isSplatMask(Mask, getValueType(0)); }
   int  getSplatIndex() const { 
     assert(isSplat() && "Cannot get splat index for non-splat!");
-    return Mask[0];
+    EVT VT = getValueType(0);
+    for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
+      if (Mask[i] != -1)
+        return Mask[i];
+    }
+    return -1;
   }
   static bool isSplatMask(const int *Mask, EVT VT);
 

Modified: llvm/branches/Apple/Hermes/test/CodeGen/X86/vec_shuffle-36.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/test/CodeGen/X86/vec_shuffle-36.ll?rev=97503&r1=97502&r2=97503&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/test/CodeGen/X86/vec_shuffle-36.ll (original)
+++ llvm/branches/Apple/Hermes/test/CodeGen/X86/vec_shuffle-36.ll Mon Mar  1 15:46:03 2010
@@ -1,9 +1,16 @@
-; RUN: llc < %s -march=x86 -mattr=sse41 -o %t
-; RUN: grep pshufb %t | count 1
-
+; RUN: llc < %s -march=x86-64 -mattr=sse41 | FileCheck %s
 
 define <8 x i16> @shuf6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
+; CHECK: pshufb
+; CHECK-NOT: pshufb
+; CHECK: ret
 entry:
-	%tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 3, i32 2, i32 0, i32 2, i32 1, i32 5, i32 6 , i32 undef >
-	ret <8 x i16> %tmp9
+  %tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 3, i32 2, i32 0, i32 2, i32 1, i32 5, i32 6 , i32 undef >
+  ret <8 x i16> %tmp9
+}
+
+define <8 x i16> @shuf7(<8 x i16> %t0) {
+; CHECK: pshufd
+  %tmp10 = shufflevector <8 x i16> %t0, <8 x i16> undef, <8 x i32> < i32 undef, i32 2, i32 2, i32 2, i32 2, i32 2, i32 undef, i32 undef >
+  ret <8 x i16> %tmp10
 }