[llvm-branch-commits] [llvm-branch] r106308 - in /llvm/branches/Apple/Morbo: ./ include/llvm/CodeGen/ include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/MBlaze/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/XCore/
Stuart Hastings
stuart at apple.com
Fri Jun 18 13:24:47 PDT 2010
Author: stuart
Date: Fri Jun 18 15:24:46 2010
New Revision: 106308
URL: http://llvm.org/viewvc/llvm-project?rev=106308&view=rev
Log:
Morbonize r106243, r106244, r106270. Radar 7421831.
Modified:
llvm/branches/Apple/Morbo/ (props changed)
llvm/branches/Apple/Morbo/include/llvm/CodeGen/FastISel.h
llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h
llvm/branches/Apple/Morbo/lib/CodeGen/BranchFolding.cpp
llvm/branches/Apple/Morbo/lib/CodeGen/IfConversion.cpp
llvm/branches/Apple/Morbo/lib/CodeGen/MachineBasicBlock.cpp
llvm/branches/Apple/Morbo/lib/CodeGen/PHIElimination.cpp
llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/FastISel.cpp
llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/ARM/ARMInstrFormats.td (props changed)
llvm/branches/Apple/Morbo/lib/Target/Alpha/AlphaInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/Alpha/AlphaInstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/Blackfin/BlackfinInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/Blackfin/BlackfinInstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/CellSPU/SPUInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/CellSPU/SPUInstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/MBlaze/MBlazeInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/MBlaze/MBlazeInstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/MSP430/MSP430InstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/MSP430/MSP430InstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/Mips/MipsInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/Mips/MipsInstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/PIC16/PIC16InstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/PIC16/PIC16InstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/Sparc/SparcInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/Sparc/SparcInstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/SystemZ/SystemZInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/SystemZ/SystemZInstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/X86/X86FastISel.cpp
llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/XCore/XCoreInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/XCore/XCoreInstrInfo.h
Propchange: llvm/branches/Apple/Morbo/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Fri Jun 18 15:24:46 2010
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Hermes:96832,96835,96858,96870,96876,96879,104427,104930,104971
-/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98768,98773,98778,98780,98810,98835,98839,98845,98855,98862,98881,98920,98977,98980,99032-99033,99043,99196,99223,99263,99282-99284,99306,99319-99321,99324,99336,99378,99418,99423,99429,99440,99455,99463,99465,99469,99484,99490,99492-99494,99507,99524,99537,99539-99540,99544,99570,99575,99598,99620,99629-99630,99636,99671,99692,99695,99697,99699,99722,99816,99835-99836,99845-99846,99848,99850,99855,99879,99881-99883,99895,99899,99910,99916,99919,99952-99954,99957,99959,99974-99975,99982,99984-99986,99988-99989,99992-99993,99995,99997-99999,100016,100035,100037-100038,100042,100044,100056,100072,100074,100078,100081-100090,100092,100094-100095,100116,100134,100184,100209,100214-100218,100220-100221,100223-100225,100231,100250,100252,100257,100261,100304,100332,100353,100384,100454-100455,100457,100466,100478,100480,100487,100494,100497,100505,100521,100553,100568,100584,100592,100609-100610,100636,100710,100736
,100742,100751,100768-100769,100771,100781,100797,100804,100837,100867,100892,100936-100937,101011,101023,101075,101077,101079,101081,101085,101154,101158,101162,101165,101181,101190,101202,101282,101294,101303,101314-101315,101317,101331,101343,101383,101392,101420,101453,101604,101615,101629,101684-101686,101805,101845,101847,101851,101855,101870,101879,101897,101925,101930,101965,101971,101979,102111,102120,102192,102202,102225,102236-102237,102358,102366,102394,102396,102405,102421,102454-102456,102463,102467-102468,102470,102481,102486-102488,102492-102493,102504-102505,102508-102510,102513,102519,102524,102526,102531,102558,102646,102653,102655,102661-102662,102672,102743,102760,102770,102791,102948,102970,102980,103001,103126,103133,103233,103314,103356,103415,103419,103439,103451,103455,103459,103798,103801-103802,103804,103808,103813,103824,103829,103990,103995,104066,104182,104233,104236,104265,104274,104302,104338,104412,104419,104524,104531,104640,104646,104649,1
04655-104656,104661,104664,104705-104706,104720,104722,104732,104737,104740,104785,104848,104858,104872,104884,104900,104967,105285,105292,105295,105360,105387,105490,105505,105741,105828-105829,105872,105948-105949,106005,106066
+/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98768,98773,98778,98780,98810,98835,98839,98845,98855,98862,98881,98920,98977,98980,99032-99033,99043,99196,99223,99263,99282-99284,99306,99319-99321,99324,99336,99378,99418,99423,99429,99440,99455,99463,99465,99469,99484,99490,99492-99494,99507,99524,99537,99539-99540,99544,99570,99575,99598,99620,99629-99630,99636,99671,99692,99695,99697,99699,99722,99816,99835-99836,99845-99846,99848,99850,99855,99879,99881-99883,99895,99899,99910,99916,99919,99952-99954,99957,99959,99974-99975,99982,99984-99986,99988-99989,99992-99993,99995,99997-99999,100016,100035,100037-100038,100042,100044,100056,100072,100074,100078,100081-100090,100092,100094-100095,100116,100134,100184,100209,100214-100218,100220-100221,100223-100225,100231,100250,100252,100257,100261,100304,100332,100353,100384,100454-100455,100457,100466,100478,100480,100487,100494,100497,100505,100521,100553,100568,100584,100592,100609-100610,100636,100710,100736
,100742,100751,100768-100769,100771,100781,100797,100804,100837,100867,100892,100936-100937,101011,101023,101075,101077,101079,101081,101085,101154,101158,101162,101165,101181,101190,101202,101282,101294,101303,101314-101315,101317,101331,101343,101383,101392,101420,101453,101604,101615,101629,101684-101686,101805,101845,101847,101851,101855,101870,101879,101897,101925,101930,101965,101971,101979,102111,102120,102192,102202,102225,102236-102237,102358,102366,102394,102396,102405,102421,102454-102456,102463,102467-102468,102470,102481,102486-102488,102492-102493,102504-102505,102508-102510,102513,102519,102524,102526,102531,102558,102646,102653,102655,102661-102662,102672,102743,102760,102770,102791,102948,102970,102980,103001,103126,103133,103233,103314,103356,103415,103419,103439,103451,103455,103459,103798,103801-103802,103804,103808,103813,103824,103829,103990,103995,104066,104182,104233,104236,104265,104274,104302,104338,104412,104419,104524,104531,104640,104646,104649,1
04655-104656,104661,104664,104705-104706,104720,104722,104732,104737,104740,104785,104848,104858,104872,104884,104900,104967,105285,105292,105295,105360,105387,105490,105505,105741,105828-105829,105872,105948-105949,106005,106066,106243-106244,106270
/llvm-gcc-4.2/trunk:104182
Modified: llvm/branches/Apple/Morbo/include/llvm/CodeGen/FastISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/include/llvm/CodeGen/FastISel.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/include/llvm/CodeGen/FastISel.h (original)
+++ llvm/branches/Apple/Morbo/include/llvm/CodeGen/FastISel.h Fri Jun 18 15:24:46 2010
@@ -279,7 +279,7 @@
/// FastEmitBranch - Emit an unconditional branch to the given block,
/// unless it is the immediate (fall-through) successor, and update
/// the CFG.
- void FastEmitBranch(MachineBasicBlock *MBB);
+ void FastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL);
unsigned UpdateValueMap(Value* I, unsigned Reg);
Modified: llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h Fri Jun 18 15:24:46 2010
@@ -301,8 +301,9 @@
/// branch to analyze. At least this much must be implemented, else tail
/// merging needs to be disabled.
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
- MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
+ MachineBasicBlock *FBB,
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
assert(0 && "Target didn't implement TargetInstrInfo::InsertBranch!");
return 0;
}
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/BranchFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/BranchFolding.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/BranchFolding.cpp Fri Jun 18 15:24:46 2010
@@ -391,7 +391,8 @@
// If OldBB isn't immediately before OldBB, insert a branch to it.
if (++MachineFunction::iterator(OldBB) != MachineFunction::iterator(NewDest))
- TII->InsertBranch(*OldBB, NewDest, 0, SmallVector<MachineOperand, 0>());
+ TII->InsertBranch(*OldBB, NewDest, 0, SmallVector<MachineOperand, 0>(),
+ OldInst->getDebugLoc());
OldBB->addSuccessor(NewDest);
++NumTailMerge;
}
@@ -461,18 +462,20 @@
MachineFunction::iterator I = llvm::next(MachineFunction::iterator(CurMBB));
MachineBasicBlock *TBB = 0, *FBB = 0;
SmallVector<MachineOperand, 4> Cond;
+ DebugLoc dl; // FIXME: this is nowhere
if (I != MF->end() &&
!TII->AnalyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
MachineBasicBlock *NextBB = I;
if (TBB == NextBB && !Cond.empty() && !FBB) {
if (!TII->ReverseBranchCondition(Cond)) {
TII->RemoveBranch(*CurMBB);
- TII->InsertBranch(*CurMBB, SuccBB, NULL, Cond);
+ TII->InsertBranch(*CurMBB, SuccBB, NULL, Cond, dl);
return;
}
}
}
- TII->InsertBranch(*CurMBB, SuccBB, NULL, SmallVector<MachineOperand, 0>());
+ TII->InsertBranch(*CurMBB, SuccBB, NULL,
+ SmallVector<MachineOperand, 0>(), dl);
}
bool
@@ -892,10 +895,11 @@
}
// Remove the unconditional branch at the end, if any.
if (TBB && (Cond.empty() || FBB)) {
+ DebugLoc dl; // FIXME: this is nowhere
TII->RemoveBranch(*PBB);
if (!Cond.empty())
// reinsert conditional branch only, for now
- TII->InsertBranch(*PBB, (TBB == IBB) ? FBB : TBB, 0, NewCond);
+ TII->InsertBranch(*PBB, (TBB == IBB) ? FBB : TBB, 0, NewCond, dl);
}
MergePotentials.push_back(MergePotentialsElt(HashEndOfMBB(PBB, 1U),
*P));
@@ -989,6 +993,7 @@
bool BranchFolder::OptimizeBlock(MachineBasicBlock *MBB) {
bool MadeChange = false;
MachineFunction &MF = *MBB->getParent();
+ DebugLoc dl; // FIXME: this is nowhere
ReoptimizeBlock:
MachineFunction::iterator FallThrough = MBB;
@@ -1040,7 +1045,7 @@
TII->RemoveBranch(PrevBB);
PriorCond.clear();
if (PriorTBB != MBB)
- TII->InsertBranch(PrevBB, PriorTBB, 0, PriorCond);
+ TII->InsertBranch(PrevBB, PriorTBB, 0, PriorCond, dl);
MadeChange = true;
++NumBranchOpts;
goto ReoptimizeBlock;
@@ -1079,7 +1084,7 @@
// the condition is false, remove the uncond second branch.
if (PriorFBB == MBB) {
TII->RemoveBranch(PrevBB);
- TII->InsertBranch(PrevBB, PriorTBB, 0, PriorCond);
+ TII->InsertBranch(PrevBB, PriorTBB, 0, PriorCond, dl);
MadeChange = true;
++NumBranchOpts;
goto ReoptimizeBlock;
@@ -1092,7 +1097,7 @@
SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
if (!TII->ReverseBranchCondition(NewPriorCond)) {
TII->RemoveBranch(PrevBB);
- TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond);
+ TII->InsertBranch(PrevBB, PriorFBB, 0, NewPriorCond, dl);
MadeChange = true;
++NumBranchOpts;
goto ReoptimizeBlock;
@@ -1145,7 +1150,7 @@
<< "To make fallthrough to: " << *PriorTBB << "\n");
TII->RemoveBranch(PrevBB);
- TII->InsertBranch(PrevBB, MBB, 0, NewPriorCond);
+ TII->InsertBranch(PrevBB, MBB, 0, NewPriorCond, dl);
// Move this block to the end of the function.
MBB->moveAfter(--MF.end());
@@ -1174,7 +1179,7 @@
SmallVector<MachineOperand, 4> NewCond(CurCond);
if (!TII->ReverseBranchCondition(NewCond)) {
TII->RemoveBranch(*MBB);
- TII->InsertBranch(*MBB, CurFBB, CurTBB, NewCond);
+ TII->InsertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
MadeChange = true;
++NumBranchOpts;
goto ReoptimizeBlock;
@@ -1229,7 +1234,7 @@
PriorFBB = MBB;
}
TII->RemoveBranch(PrevBB);
- TII->InsertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond);
+ TII->InsertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, dl);
}
// Iterate through all the predecessors, revectoring each in-turn.
@@ -1255,7 +1260,7 @@
if (!NewCurUnAnalyzable && NewCurTBB && NewCurTBB == NewCurFBB) {
TII->RemoveBranch(*PMBB);
NewCurCond.clear();
- TII->InsertBranch(*PMBB, NewCurTBB, 0, NewCurCond);
+ TII->InsertBranch(*PMBB, NewCurTBB, 0, NewCurCond, dl);
MadeChange = true;
++NumBranchOpts;
PMBB->CorrectExtraCFGEdges(NewCurTBB, 0, false);
@@ -1275,7 +1280,7 @@
}
// Add the branch back if the block is more than just an uncond branch.
- TII->InsertBranch(*MBB, CurTBB, 0, CurCond);
+ TII->InsertBranch(*MBB, CurTBB, 0, CurCond, dl);
}
}
@@ -1315,7 +1320,7 @@
if (CurFallsThru) {
MachineBasicBlock *NextBB = llvm::next(MachineFunction::iterator(MBB));
CurCond.clear();
- TII->InsertBranch(*MBB, NextBB, 0, CurCond);
+ TII->InsertBranch(*MBB, NextBB, 0, CurCond, dl);
}
MBB->moveAfter(PredBB);
MadeChange = true;
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/IfConversion.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/IfConversion.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/IfConversion.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/IfConversion.cpp Fri Jun 18 15:24:46 2010
@@ -387,9 +387,10 @@
/// ReverseBranchCondition - Reverse the condition of the end of the block
/// branch. Swap block's 'true' and 'false' successors.
bool IfConverter::ReverseBranchCondition(BBInfo &BBI) {
+ DebugLoc dl; // FIXME: this is nowhere
if (!TII->ReverseBranchCondition(BBI.BrCond)) {
TII->RemoveBranch(*BBI.BB);
- TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond);
+ TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
std::swap(BBI.TrueBB, BBI.FalseBB);
return true;
}
@@ -836,8 +837,9 @@
///
static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB,
const TargetInstrInfo *TII) {
+ DebugLoc dl; // FIXME: this is nowhere
SmallVector<MachineOperand, 0> NoCond;
- TII->InsertBranch(*BB, ToBB, NULL, NoCond);
+ TII->InsertBranch(*BB, ToBB, NULL, NoCond, dl);
}
/// RemoveExtraEdges - Remove true / false edges if either / both are no longer
@@ -922,6 +924,7 @@
BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
BBInfo *CvtBBI = &TrueBBI;
BBInfo *NextBBI = &FalseBBI;
+ DebugLoc dl; // FIXME: this is nowhere
SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
@@ -980,7 +983,7 @@
CvtBBI->BrCond.end());
if (TII->ReverseBranchCondition(RevCond))
assert(false && "Unable to reverse branch condition!");
- TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, NULL, RevCond);
+ TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, NULL, RevCond, dl);
BBI.BB->addSuccessor(CvtBBI->FalseBB);
}
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/MachineBasicBlock.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/MachineBasicBlock.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/MachineBasicBlock.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/MachineBasicBlock.cpp Fri Jun 18 15:24:46 2010
@@ -244,6 +244,7 @@
MachineBasicBlock *TBB = 0, *FBB = 0;
SmallVector<MachineOperand, 4> Cond;
+ DebugLoc dl; // FIXME: this is nowhere
bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
(void) B;
assert(!B && "UpdateTerminators requires analyzable predecessors!");
@@ -258,7 +259,7 @@
// its layout successor, insert a branch.
TBB = *succ_begin();
if (!isLayoutSuccessor(TBB))
- TII->InsertBranch(*this, TBB, 0, Cond);
+ TII->InsertBranch(*this, TBB, 0, Cond, dl);
}
} else {
if (FBB) {
@@ -269,10 +270,10 @@
if (TII->ReverseBranchCondition(Cond))
return;
TII->RemoveBranch(*this);
- TII->InsertBranch(*this, FBB, 0, Cond);
+ TII->InsertBranch(*this, FBB, 0, Cond, dl);
} else if (isLayoutSuccessor(FBB)) {
TII->RemoveBranch(*this);
- TII->InsertBranch(*this, TBB, 0, Cond);
+ TII->InsertBranch(*this, TBB, 0, Cond, dl);
}
} else {
// The block has a fallthrough conditional branch.
@@ -283,14 +284,14 @@
if (TII->ReverseBranchCondition(Cond)) {
// We can't reverse the condition, add an unconditional branch.
Cond.clear();
- TII->InsertBranch(*this, MBBA, 0, Cond);
+ TII->InsertBranch(*this, MBBA, 0, Cond, dl);
return;
}
TII->RemoveBranch(*this);
- TII->InsertBranch(*this, MBBA, 0, Cond);
+ TII->InsertBranch(*this, MBBA, 0, Cond, dl);
} else if (!isLayoutSuccessor(MBBA)) {
TII->RemoveBranch(*this);
- TII->InsertBranch(*this, TBB, MBBA, Cond);
+ TII->InsertBranch(*this, TBB, MBBA, Cond, dl);
}
}
}
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/PHIElimination.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/PHIElimination.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/PHIElimination.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/PHIElimination.cpp Fri Jun 18 15:24:46 2010
@@ -400,6 +400,7 @@
assert(A && B && "Missing MBB end point");
MachineFunction *MF = A->getParent();
+ DebugLoc dl; // FIXME: this is nowhere
// We may need to update A's terminator, but we can't do that if AnalyzeBranch
// fails. If A uses a jump table, we won't touch it.
@@ -425,7 +426,7 @@
NMBB->addSuccessor(B);
if (!NMBB->isLayoutSuccessor(B)) {
Cond.clear();
- MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, B, NULL, Cond);
+ MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, B, NULL, Cond, dl);
}
// Fix PHI nodes in B so they refer to NMBB instead of A
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/FastISel.cpp Fri Jun 18 15:24:46 2010
@@ -570,12 +570,12 @@
/// unless it is the immediate (fall-through) successor, and update
/// the CFG.
void
-FastISel::FastEmitBranch(MachineBasicBlock *MSucc) {
+FastISel::FastEmitBranch(MachineBasicBlock *MSucc, DebugLoc DL) {
if (MBB->isLayoutSuccessor(MSucc)) {
// The unconditional fall-through case, which needs no instructions.
} else {
// The unconditional branch case.
- TII.InsertBranch(*MBB, MSucc, NULL, SmallVector<MachineOperand, 0>());
+ TII.InsertBranch(*MBB, MSucc, NULL, SmallVector<MachineOperand, 0>(), DL);
}
MBB->addSuccessor(MSucc);
}
@@ -675,7 +675,7 @@
if (BI->isUnconditional()) {
BasicBlock *LLVMSucc = BI->getSuccessor(0);
MachineBasicBlock *MSucc = MBBMap[LLVMSucc];
- FastEmitBranch(MSucc);
+ FastEmitBranch(MSucc, BI->getDebugLoc());
return true;
}
Modified: llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -334,10 +334,8 @@
unsigned
ARMBaseInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
- // FIXME this should probably have a DebugLoc argument
- DebugLoc dl;
-
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
ARMFunctionInfo *AFI = MBB.getParent()->getInfo<ARMFunctionInfo>();
int BOpc = !AFI->isThumbFunction()
? ARM::B : (AFI->isThumb2Function() ? ARM::t2B : ARM::tB);
@@ -351,17 +349,17 @@
if (FBB == 0) {
if (Cond.empty()) // Unconditional branch?
- BuildMI(&MBB, dl, get(BOpc)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
else
- BuildMI(&MBB, dl, get(BccOpc)).addMBB(TBB)
+ BuildMI(&MBB, DL, get(BccOpc)).addMBB(TBB)
.addImm(Cond[0].getImm()).addReg(Cond[1].getReg());
return 1;
}
// Two-way conditional branch.
- BuildMI(&MBB, dl, get(BccOpc)).addMBB(TBB)
+ BuildMI(&MBB, DL, get(BccOpc)).addMBB(TBB)
.addImm(Cond[0].getImm()).addReg(Cond[1].getReg());
- BuildMI(&MBB, dl, get(BOpc)).addMBB(FBB);
+ BuildMI(&MBB, DL, get(BOpc)).addMBB(FBB);
return 2;
}
Modified: llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.h Fri Jun 18 15:24:46 2010
@@ -213,7 +213,8 @@
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
virtual
bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
Propchange: llvm/branches/Apple/Morbo/lib/Target/ARM/ARMInstrFormats.td
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Fri Jun 18 15:24:46 2010
@@ -1,2 +1,2 @@
/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrFormats.td:104930
-/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td:98980,103126,104182,104233,104236,104265,104274,104302,104338,104412,104419,104524,104531,104640,104646,104649,104655-104656,104661,104664,104705-104706,104720,104722,104732,104737,104740,104785,104848,104858,104872,104884,104900,105092,105285,105292,105295,105360,105387,105490,105505,105741,105828-105829,105872,106066
+/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td:98980,103126,104182,104233,104236,104265,104274,104302,104338,104412,104419,104524,104531,104640,104646,104649,104655-104656,104661,104664,104705-104706,104720,104722,104732,104737,104740,104785,104848,104858,104872,104884,104900,105092,105285,105292,105295,105360,105387,105490,105505,105741,105828-105829,105872,106066,106243-106244,106270
Modified: llvm/branches/Apple/Morbo/lib/Target/Alpha/AlphaInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/Alpha/AlphaInstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/Alpha/AlphaInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/Alpha/AlphaInstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -110,9 +110,8 @@
unsigned AlphaInstrInfo::InsertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
- // FIXME this should probably have a DebugLoc argument
- DebugLoc dl;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 2 || Cond.size() == 0) &&
"Alpha branch conditions have two components!");
@@ -120,25 +119,25 @@
// One-way branch.
if (FBB == 0) {
if (Cond.empty()) // Unconditional branch
- BuildMI(&MBB, dl, get(Alpha::BR)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(Alpha::BR)).addMBB(TBB);
else // Conditional branch
if (isAlphaIntCondCode(Cond[0].getImm()))
- BuildMI(&MBB, dl, get(Alpha::COND_BRANCH_I))
+ BuildMI(&MBB, DL, get(Alpha::COND_BRANCH_I))
.addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB);
else
- BuildMI(&MBB, dl, get(Alpha::COND_BRANCH_F))
+ BuildMI(&MBB, DL, get(Alpha::COND_BRANCH_F))
.addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB);
return 1;
}
// Two-way Conditional Branch.
if (isAlphaIntCondCode(Cond[0].getImm()))
- BuildMI(&MBB, dl, get(Alpha::COND_BRANCH_I))
+ BuildMI(&MBB, DL, get(Alpha::COND_BRANCH_I))
.addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB);
else
- BuildMI(&MBB, dl, get(Alpha::COND_BRANCH_F))
+ BuildMI(&MBB, DL, get(Alpha::COND_BRANCH_F))
.addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB);
- BuildMI(&MBB, dl, get(Alpha::BR)).addMBB(FBB);
+ BuildMI(&MBB, DL, get(Alpha::BR)).addMBB(FBB);
return 2;
}
Modified: llvm/branches/Apple/Morbo/lib/Target/Alpha/AlphaInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/Alpha/AlphaInstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/Alpha/AlphaInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/Alpha/AlphaInstrInfo.h Fri Jun 18 15:24:46 2010
@@ -42,8 +42,9 @@
int &FrameIndex) const;
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
- MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ MachineBasicBlock *FBB,
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
virtual bool copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
Modified: llvm/branches/Apple/Morbo/lib/Target/Blackfin/BlackfinInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/Blackfin/BlackfinInstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/Blackfin/BlackfinInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/Blackfin/BlackfinInstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -104,10 +104,8 @@
InsertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
- // FIXME this should probably have a DebugLoc operand
- DebugLoc DL;
-
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 1 || Cond.size() == 0) &&
Modified: llvm/branches/Apple/Morbo/lib/Target/Blackfin/BlackfinInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/Blackfin/BlackfinInstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/Blackfin/BlackfinInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/Blackfin/BlackfinInstrInfo.h Fri Jun 18 15:24:46 2010
@@ -44,7 +44,8 @@
InsertBranch(MachineBasicBlock &MBB,
MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
virtual bool copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
Modified: llvm/branches/Apple/Morbo/lib/Target/CellSPU/SPUInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/CellSPU/SPUInstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/CellSPU/SPUInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/CellSPU/SPUInstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -538,9 +538,8 @@
unsigned
SPUInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
- // FIXME this should probably have a DebugLoc argument
- DebugLoc dl;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 2 || Cond.size() == 0) &&
@@ -550,14 +549,14 @@
if (FBB == 0) {
if (Cond.empty()) {
// Unconditional branch
- MachineInstrBuilder MIB = BuildMI(&MBB, dl, get(SPU::BR));
+ MachineInstrBuilder MIB = BuildMI(&MBB, DL, get(SPU::BR));
MIB.addMBB(TBB);
DEBUG(errs() << "Inserted one-way uncond branch: ");
DEBUG((*MIB).dump());
} else {
// Conditional branch
- MachineInstrBuilder MIB = BuildMI(&MBB, dl, get(Cond[0].getImm()));
+ MachineInstrBuilder MIB = BuildMI(&MBB, DL, get(Cond[0].getImm()));
MIB.addReg(Cond[1].getReg()).addMBB(TBB);
DEBUG(errs() << "Inserted one-way cond branch: ");
@@ -565,8 +564,8 @@
}
return 1;
} else {
- MachineInstrBuilder MIB = BuildMI(&MBB, dl, get(Cond[0].getImm()));
- MachineInstrBuilder MIB2 = BuildMI(&MBB, dl, get(SPU::BR));
+ MachineInstrBuilder MIB = BuildMI(&MBB, DL, get(Cond[0].getImm()));
+ MachineInstrBuilder MIB2 = BuildMI(&MBB, DL, get(SPU::BR));
// Two-way Conditional Branch.
MIB.addReg(Cond[1].getReg()).addMBB(TBB);
Modified: llvm/branches/Apple/Morbo/lib/Target/CellSPU/SPUInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/CellSPU/SPUInstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/CellSPU/SPUInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/CellSPU/SPUInstrInfo.h Fri Jun 18 15:24:46 2010
@@ -91,8 +91,9 @@
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
- MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ MachineBasicBlock *FBB,
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
};
}
Modified: llvm/branches/Apple/Morbo/lib/Target/MBlaze/MBlazeInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/MBlaze/MBlazeInstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/MBlaze/MBlazeInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/MBlaze/MBlazeInstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -184,10 +184,11 @@
unsigned MBlazeInstrInfo::
InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
// Can only insert uncond branches so far.
assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
- BuildMI(&MBB, DebugLoc(), get(MBlaze::BRI)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(MBlaze::BRI)).addMBB(TBB);
return 1;
}
Modified: llvm/branches/Apple/Morbo/lib/Target/MBlaze/MBlazeInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/MBlaze/MBlazeInstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/MBlaze/MBlazeInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/MBlaze/MBlazeInstrInfo.h Fri Jun 18 15:24:46 2010
@@ -198,7 +198,8 @@
/// Branch Analysis
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
virtual bool copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
unsigned DestReg, unsigned SrcReg,
Modified: llvm/branches/Apple/Morbo/lib/Target/MSP430/MSP430InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/MSP430/MSP430InstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/MSP430/MSP430InstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/MSP430/MSP430InstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -318,10 +318,8 @@
unsigned
MSP430InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
- // FIXME this should probably have a DebugLoc operand
- DebugLoc DL;
-
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 1 || Cond.size() == 0) &&
Modified: llvm/branches/Apple/Morbo/lib/Target/MSP430/MSP430InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/MSP430/MSP430InstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/MSP430/MSP430InstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/MSP430/MSP430InstrInfo.h Fri Jun 18 15:24:46 2010
@@ -90,7 +90,8 @@
unsigned RemoveBranch(MachineBasicBlock &MBB) const;
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
};
Modified: llvm/branches/Apple/Morbo/lib/Target/Mips/MipsInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/Mips/MipsInstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/Mips/MipsInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/Mips/MipsInstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -513,9 +513,8 @@
unsigned MipsInstrInfo::
InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
- // FIXME this should probably have a DebugLoc argument
- DebugLoc dl;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 3 || Cond.size() == 2 || Cond.size() == 0) &&
@@ -524,18 +523,18 @@
if (FBB == 0) { // One way branch.
if (Cond.empty()) {
// Unconditional branch?
- BuildMI(&MBB, dl, get(Mips::J)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(Mips::J)).addMBB(TBB);
} else {
// Conditional branch.
unsigned Opc = GetCondBranchFromCond((Mips::CondCode)Cond[0].getImm());
const TargetInstrDesc &TID = get(Opc);
if (TID.getNumOperands() == 3)
- BuildMI(&MBB, dl, TID).addReg(Cond[1].getReg())
+ BuildMI(&MBB, DL, TID).addReg(Cond[1].getReg())
.addReg(Cond[2].getReg())
.addMBB(TBB);
else
- BuildMI(&MBB, dl, TID).addReg(Cond[1].getReg())
+ BuildMI(&MBB, DL, TID).addReg(Cond[1].getReg())
.addMBB(TBB);
}
@@ -547,12 +546,12 @@
const TargetInstrDesc &TID = get(Opc);
if (TID.getNumOperands() == 3)
- BuildMI(&MBB, dl, TID).addReg(Cond[1].getReg()).addReg(Cond[2].getReg())
+ BuildMI(&MBB, DL, TID).addReg(Cond[1].getReg()).addReg(Cond[2].getReg())
.addMBB(TBB);
else
- BuildMI(&MBB, dl, TID).addReg(Cond[1].getReg()).addMBB(TBB);
+ BuildMI(&MBB, DL, TID).addReg(Cond[1].getReg()).addMBB(TBB);
- BuildMI(&MBB, dl, get(Mips::J)).addMBB(FBB);
+ BuildMI(&MBB, DL, get(Mips::J)).addMBB(FBB);
return 2;
}
Modified: llvm/branches/Apple/Morbo/lib/Target/Mips/MipsInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/Mips/MipsInstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/Mips/MipsInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/Mips/MipsInstrInfo.h Fri Jun 18 15:24:46 2010
@@ -204,7 +204,8 @@
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
virtual bool copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
unsigned DestReg, unsigned SrcReg,
Modified: llvm/branches/Apple/Morbo/lib/Target/PIC16/PIC16InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/PIC16/PIC16InstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/PIC16/PIC16InstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/PIC16/PIC16InstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -195,15 +195,15 @@
unsigned PIC16InstrInfo::
InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
if (FBB == 0) { // One way branch.
if (Cond.empty()) {
// Unconditional branch?
- DebugLoc dl;
- BuildMI(&MBB, dl, get(PIC16::br_uncond)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(PIC16::br_uncond)).addMBB(TBB);
}
return 1;
}
Modified: llvm/branches/Apple/Morbo/lib/Target/PIC16/PIC16InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/PIC16/PIC16InstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/PIC16/PIC16InstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/PIC16/PIC16InstrInfo.h Fri Jun 18 15:24:46 2010
@@ -67,7 +67,8 @@
virtual
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB,
SmallVectorImpl<MachineOperand> &Cond,
Modified: llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -302,9 +302,8 @@
unsigned
PPCInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
- // FIXME this should probably have a DebugLoc argument
- DebugLoc dl;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 2 || Cond.size() == 0) &&
@@ -313,17 +312,17 @@
// One-way branch.
if (FBB == 0) {
if (Cond.empty()) // Unconditional branch
- BuildMI(&MBB, dl, get(PPC::B)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(PPC::B)).addMBB(TBB);
else // Conditional branch
- BuildMI(&MBB, dl, get(PPC::BCC))
+ BuildMI(&MBB, DL, get(PPC::BCC))
.addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB);
return 1;
}
// Two-way Conditional Branch.
- BuildMI(&MBB, dl, get(PPC::BCC))
+ BuildMI(&MBB, DL, get(PPC::BCC))
.addImm(Cond[0].getImm()).addReg(Cond[1].getReg()).addMBB(TBB);
- BuildMI(&MBB, dl, get(PPC::B)).addMBB(FBB);
+ BuildMI(&MBB, DL, get(PPC::B)).addMBB(FBB);
return 2;
}
Modified: llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.h Fri Jun 18 15:24:46 2010
@@ -109,7 +109,8 @@
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
virtual bool copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
Modified: llvm/branches/Apple/Morbo/lib/Target/Sparc/SparcInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/Sparc/SparcInstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/Sparc/SparcInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/Sparc/SparcInstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -109,12 +109,11 @@
unsigned
SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond)const{
- // FIXME this should probably take a DebugLoc argument
- DebugLoc dl;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL)const{
// Can only insert uncond branches so far.
assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
- BuildMI(&MBB, dl, get(SP::BA)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(SP::BA)).addMBB(TBB);
return 1;
}
Modified: llvm/branches/Apple/Morbo/lib/Target/Sparc/SparcInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/Sparc/SparcInstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/Sparc/SparcInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/Sparc/SparcInstrInfo.h Fri Jun 18 15:24:46 2010
@@ -68,7 +68,8 @@
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
virtual bool copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
Modified: llvm/branches/Apple/Morbo/lib/Target/SystemZ/SystemZInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/SystemZ/SystemZInstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/SystemZ/SystemZInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/SystemZ/SystemZInstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -517,9 +517,8 @@
unsigned
SystemZInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
- // FIXME: this should probably have a DebugLoc operand
- DebugLoc DL;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 1 || Cond.size() == 0) &&
Modified: llvm/branches/Apple/Morbo/lib/Target/SystemZ/SystemZInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/SystemZ/SystemZInstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/SystemZ/SystemZInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/SystemZ/SystemZInstrInfo.h Fri Jun 18 15:24:46 2010
@@ -99,7 +99,8 @@
bool AllowModify) const;
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
SystemZCC::CondCodes getOppositeCondition(SystemZCC::CondCodes CC) const;
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86FastISel.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86FastISel.cpp Fri Jun 18 15:24:46 2010
@@ -884,7 +884,7 @@
BuildMI(MBB, DL, TII.get(X86::JP_4)).addMBB(TrueMBB);
}
- FastEmitBranch(FalseMBB);
+ FastEmitBranch(FalseMBB, DL);
MBB->addSuccessor(TrueMBB);
return true;
}
@@ -938,7 +938,7 @@
BuildMI(MBB, DL, TII.get(OpCode == X86::SETOr ?
X86::JO_4 : X86::JB_4))
.addMBB(TrueMBB);
- FastEmitBranch(FalseMBB);
+ FastEmitBranch(FalseMBB, DL);
MBB->addSuccessor(TrueMBB);
return true;
}
@@ -953,7 +953,7 @@
BuildMI(MBB, DL, TII.get(X86::TEST8rr)).addReg(OpReg).addReg(OpReg);
BuildMI(MBB, DL, TII.get(X86::JNE_4)).addMBB(TrueMBB);
- FastEmitBranch(FalseMBB);
+ FastEmitBranch(FalseMBB, DL);
MBB->addSuccessor(TrueMBB);
return true;
}
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -1840,9 +1840,8 @@
unsigned
X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const {
- // FIXME this should probably have a DebugLoc operand
- DebugLoc dl;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const {
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 1 || Cond.size() == 0) &&
@@ -1851,7 +1850,7 @@
if (Cond.empty()) {
// Unconditional branch?
assert(!FBB && "Unconditional branch with multiple successors!");
- BuildMI(&MBB, dl, get(X86::JMP_4)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(X86::JMP_4)).addMBB(TBB);
return 1;
}
@@ -1861,27 +1860,27 @@
switch (CC) {
case X86::COND_NP_OR_E:
// Synthesize NP_OR_E with two branches.
- BuildMI(&MBB, dl, get(X86::JNP_4)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(X86::JNP_4)).addMBB(TBB);
++Count;
- BuildMI(&MBB, dl, get(X86::JE_4)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(X86::JE_4)).addMBB(TBB);
++Count;
break;
case X86::COND_NE_OR_P:
// Synthesize NE_OR_P with two branches.
- BuildMI(&MBB, dl, get(X86::JNE_4)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(X86::JNE_4)).addMBB(TBB);
++Count;
- BuildMI(&MBB, dl, get(X86::JP_4)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(X86::JP_4)).addMBB(TBB);
++Count;
break;
default: {
unsigned Opc = GetCondBranchFromCond(CC);
- BuildMI(&MBB, dl, get(Opc)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(Opc)).addMBB(TBB);
++Count;
}
}
if (FBB) {
// Two-way Conditional branch. Insert the second branch.
- BuildMI(&MBB, dl, get(X86::JMP_4)).addMBB(FBB);
+ BuildMI(&MBB, DL, get(X86::JMP_4)).addMBB(FBB);
++Count;
}
return Count;
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.h Fri Jun 18 15:24:46 2010
@@ -585,7 +585,8 @@
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
virtual bool copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SrcReg,
Modified: llvm/branches/Apple/Morbo/lib/Target/XCore/XCoreInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/XCore/XCoreInstrInfo.cpp?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/XCore/XCoreInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/XCore/XCoreInstrInfo.cpp Fri Jun 18 15:24:46 2010
@@ -291,9 +291,8 @@
unsigned
XCoreInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond)const{
- // FIXME there should probably be a DebugLoc argument here
- DebugLoc dl;
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL)const{
// Shouldn't be a fall through.
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
assert((Cond.size() == 2 || Cond.size() == 0) &&
@@ -302,11 +301,11 @@
if (FBB == 0) { // One way branch.
if (Cond.empty()) {
// Unconditional branch
- BuildMI(&MBB, dl, get(XCore::BRFU_lu6)).addMBB(TBB);
+ BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(TBB);
} else {
// Conditional branch.
unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());
- BuildMI(&MBB, dl, get(Opc)).addReg(Cond[1].getReg())
+ BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg())
.addMBB(TBB);
}
return 1;
@@ -315,9 +314,9 @@
// Two-way Conditional branch.
assert(Cond.size() == 2 && "Unexpected number of components!");
unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm());
- BuildMI(&MBB, dl, get(Opc)).addReg(Cond[1].getReg())
+ BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg())
.addMBB(TBB);
- BuildMI(&MBB, dl, get(XCore::BRFU_lu6)).addMBB(FBB);
+ BuildMI(&MBB, DL, get(XCore::BRFU_lu6)).addMBB(FBB);
return 2;
}
Modified: llvm/branches/Apple/Morbo/lib/Target/XCore/XCoreInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/XCore/XCoreInstrInfo.h?rev=106308&r1=106307&r2=106308&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/XCore/XCoreInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/XCore/XCoreInstrInfo.h Fri Jun 18 15:24:46 2010
@@ -58,8 +58,9 @@
bool AllowModify) const;
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
- MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond) const;
+ MachineBasicBlock *FBB,
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const;
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
More information about the llvm-branch-commits
mailing list