[llvm-branch-commits] [llvm-branch] r105520 - in /llvm/branches/Apple/Troughton: lib/CodeGen/MachineCSE.cpp test/CodeGen/ARM/machine-cse-cmp.ll
Evan Cheng
evan.cheng at apple.com
Fri Jun 4 20:17:02 PDT 2010
Author: evancheng
Date: Fri Jun 4 22:17:01 2010
New Revision: 105520
URL: http://llvm.org/viewvc/llvm-project?rev=105520&view=rev
Log:
Merge 105502.
Added:
llvm/branches/Apple/Troughton/test/CodeGen/ARM/machine-cse-cmp.ll
- copied unchanged from r105502, llvm/trunk/test/CodeGen/ARM/machine-cse-cmp.ll
Modified:
llvm/branches/Apple/Troughton/lib/CodeGen/MachineCSE.cpp
Modified: llvm/branches/Apple/Troughton/lib/CodeGen/MachineCSE.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Troughton/lib/CodeGen/MachineCSE.cpp?rev=105520&r1=105519&r2=105520&view=diff
==============================================================================
--- llvm/branches/Apple/Troughton/lib/CodeGen/MachineCSE.cpp (original)
+++ llvm/branches/Apple/Troughton/lib/CodeGen/MachineCSE.cpp Fri Jun 4 22:17:01 2010
@@ -30,9 +30,7 @@
STATISTIC(NumCoalesces, "Number of copies coalesced");
STATISTIC(NumCSEs, "Number of common subexpression eliminated");
-
-static cl::opt<bool> CSEPhysDef("machine-cse-phys-defs",
- cl::init(false), cl::Hidden);
+STATISTIC(NumPhysCSEs, "Number of phyreg defining common subexpr eliminated");
namespace {
class MachineCSE : public MachineFunctionPass {
@@ -172,7 +170,8 @@
/// hasLivePhysRegDefUse - Return true if the specified instruction read / write
/// physical registers (except for dead defs of physical registers). It also
-/// returns the physical register def by reference if it's the only one.
+/// returns the physical register def by reference if it's the only one and the
+/// instruction does not uses a physical register.
bool MachineCSE::hasLivePhysRegDefUse(const MachineInstr *MI,
const MachineBasicBlock *MBB,
unsigned &PhysDef) const {
@@ -186,9 +185,11 @@
continue;
if (TargetRegisterInfo::isVirtualRegister(Reg))
continue;
- if (MO.isUse())
+ if (MO.isUse()) {
// Can't touch anything to read a physical register.
+ PhysDef = 0;
return true;
+ }
if (MO.isDead())
// If the def is dead, it's ok.
continue;
@@ -356,6 +357,7 @@
if (!isCSECandidate(MI))
continue;
+ bool DefPhys = false;
bool FoundCSE = VNT.count(MI);
if (!FoundCSE) {
// Look for trivial copy coalescing opportunities.
@@ -376,11 +378,13 @@
// ... Unless the CS is local and it also defines the physical register
// which is not clobbered in between.
- if (PhysDef && CSEPhysDef) {
+ if (PhysDef) {
unsigned CSVN = VNT.lookup(MI);
MachineInstr *CSMI = Exps[CSVN];
- if (PhysRegDefReaches(CSMI, MI, PhysDef))
+ if (PhysRegDefReaches(CSMI, MI, PhysDef)) {
FoundCSE = true;
+ DefPhys = true;
+ }
}
}
@@ -426,6 +430,8 @@
}
MI->eraseFromParent();
++NumCSEs;
+ if (DefPhys)
+ ++NumPhysCSEs;
} else {
DEBUG(dbgs() << "*** Not profitable, avoid CSE!\n");
VNT.insert(MI, CurrVN++);
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