[llvm-branch-commits] [llvm-branch] r105388 - in /llvm/branches/Apple/Morbo: ./ lib/CodeGen/MachineSink.cpp lib/Target/ARM/ARMInstrFormats.td test/CodeGen/X86/sink-hoist.ll
Bill Wendling
isanbard at gmail.com
Thu Jun 3 00:59:34 PDT 2010
Author: void
Date: Thu Jun 3 02:59:34 2010
New Revision: 105388
URL: http://llvm.org/viewvc/llvm-project?rev=105388&view=rev
Log:
--- Merging r105387 into '.':
U test/CodeGen/X86/sink-hoist.ll
U lib/CodeGen/MachineSink.cpp
Modified:
llvm/branches/Apple/Morbo/ (props changed)
llvm/branches/Apple/Morbo/lib/CodeGen/MachineSink.cpp
llvm/branches/Apple/Morbo/lib/Target/ARM/ARMInstrFormats.td (props changed)
llvm/branches/Apple/Morbo/test/CodeGen/X86/sink-hoist.ll
Propchange: llvm/branches/Apple/Morbo/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Thu Jun 3 02:59:34 2010
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Hermes:96832,96835,96858,96870,96876,96879,104427,104930,104971
-/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98768,98773,98778,98780,98810,98835,98839,98845,98855,98862,98881,98920,98977,98980,99032-99033,99043,99196,99223,99263,99282-99284,99306,99319-99321,99324,99336,99378,99418,99423,99429,99440,99455,99463,99465,99469,99484,99490,99492-99494,99507,99524,99537,99539-99540,99544,99570,99575,99598,99620,99629-99630,99636,99671,99692,99695,99697,99699,99722,99816,99835-99836,99845-99846,99848,99850,99855,99879,99881-99883,99895,99899,99910,99916,99919,99952-99954,99957,99959,99974-99975,99982,99984-99986,99988-99989,99992-99993,99995,99997-99999,100016,100035,100037-100038,100042,100044,100056,100072,100074,100078,100081-100090,100092,100094-100095,100116,100134,100184,100209,100214-100218,100220-100221,100223-100225,100231,100250,100252,100257,100261,100304,100332,100353,100384,100454-100455,100457,100466,100478,100480,100487,100494,100497,100505,100521,100553,100568,100584,100592,100609-100610,100636,100710,100736
,100742,100751,100768-100769,100771,100781,100797,100804,100837,100867,100892,100936-100937,101011,101023,101075,101077,101079,101081,101085,101154,101158,101162,101165,101181,101190,101202,101282,101294,101303,101314-101315,101317,101331,101343,101383,101392,101420,101453,101604,101615,101629,101684-101686,101805,101845,101847,101851,101855,101870,101879,101897,101925,101930,101965,101971,101979,102111,102120,102192,102202,102225,102236-102237,102358,102366,102394,102396,102405,102421,102454-102456,102463,102467-102468,102470,102481,102486-102488,102492-102493,102504-102505,102508-102510,102513,102519,102524,102526,102531,102558,102646,102653,102655,102661-102662,102672,102743,102760,102770,102791,102948,102970,102980,103001,103126,103133,103233,103314,103356,103415,103419,103439,103451,103455,103459,103798,103801-103802,103804,103808,103813,103824,103829,103990,103995,104066,104182,104233,104236,104265,104274,104302,104338,104412,104419,104524,104531,104640,104646,104649,1
04655-104656,104661,104664,104705-104706,104720,104722,104732,104737,104740,104785,104848,104858,104872,104884,104900,104967,105285,105292,105295,105360
+/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98768,98773,98778,98780,98810,98835,98839,98845,98855,98862,98881,98920,98977,98980,99032-99033,99043,99196,99223,99263,99282-99284,99306,99319-99321,99324,99336,99378,99418,99423,99429,99440,99455,99463,99465,99469,99484,99490,99492-99494,99507,99524,99537,99539-99540,99544,99570,99575,99598,99620,99629-99630,99636,99671,99692,99695,99697,99699,99722,99816,99835-99836,99845-99846,99848,99850,99855,99879,99881-99883,99895,99899,99910,99916,99919,99952-99954,99957,99959,99974-99975,99982,99984-99986,99988-99989,99992-99993,99995,99997-99999,100016,100035,100037-100038,100042,100044,100056,100072,100074,100078,100081-100090,100092,100094-100095,100116,100134,100184,100209,100214-100218,100220-100221,100223-100225,100231,100250,100252,100257,100261,100304,100332,100353,100384,100454-100455,100457,100466,100478,100480,100487,100494,100497,100505,100521,100553,100568,100584,100592,100609-100610,100636,100710,100736
,100742,100751,100768-100769,100771,100781,100797,100804,100837,100867,100892,100936-100937,101011,101023,101075,101077,101079,101081,101085,101154,101158,101162,101165,101181,101190,101202,101282,101294,101303,101314-101315,101317,101331,101343,101383,101392,101420,101453,101604,101615,101629,101684-101686,101805,101845,101847,101851,101855,101870,101879,101897,101925,101930,101965,101971,101979,102111,102120,102192,102202,102225,102236-102237,102358,102366,102394,102396,102405,102421,102454-102456,102463,102467-102468,102470,102481,102486-102488,102492-102493,102504-102505,102508-102510,102513,102519,102524,102526,102531,102558,102646,102653,102655,102661-102662,102672,102743,102760,102770,102791,102948,102970,102980,103001,103126,103133,103233,103314,103356,103415,103419,103439,103451,103455,103459,103798,103801-103802,103804,103808,103813,103824,103829,103990,103995,104066,104182,104233,104236,104265,104274,104302,104338,104412,104419,104524,104531,104640,104646,104649,1
04655-104656,104661,104664,104705-104706,104720,104722,104732,104737,104740,104785,104848,104858,104872,104884,104900,104967,105285,105292,105295,105360,105387
/llvm-gcc-4.2/trunk:104182
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/MachineSink.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/MachineSink.cpp?rev=105388&r1=105387&r2=105388&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/MachineSink.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/MachineSink.cpp Thu Jun 3 02:59:34 2010
@@ -25,6 +25,7 @@
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
@@ -61,6 +62,7 @@
bool ProcessBlock(MachineBasicBlock &MBB);
bool SinkInstruction(MachineInstr *MI, bool &SawStore);
bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB) const;
+ bool LiveOutOfBasicBlock(const MachineInstr *MI, unsigned Reg) const;
};
} // end anonymous namespace
@@ -163,6 +165,44 @@
return MadeChange;
}
+/// LiveOutOfBasicBlock - Determine if the physical register, defined and dead
+/// in MI, is live on exit from the basic block.
+bool MachineSinking::LiveOutOfBasicBlock(const MachineInstr *MI,
+ unsigned Reg) const {
+ assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
+ "Only want to determine if a physical register is live out of a BB!");
+
+ const MachineBasicBlock *MBB = MI->getParent();
+ SmallSet<unsigned, 8> KilledRegs;
+ MachineBasicBlock::const_iterator I = MBB->end();
+ MachineBasicBlock::const_iterator E = MBB->begin();
+ assert(I != E && "How can there be an empty block at this point?!");
+
+ // Loop through the instructions bottom-up. If we see a kill of the preg
+ // first, then it's not live out of the BB. If we see a use or def first, then
+ // we assume that it is live out of the BB.
+ do {
+ const MachineInstr &CurMI = *--I;
+
+ for (unsigned i = 0, e = CurMI.getNumOperands(); i != e; ++i) {
+ const MachineOperand &MO = CurMI.getOperand(i);
+ if (!MO.isReg()) continue; // Ignore non-register operands.
+
+ unsigned MOReg = MO.getReg();
+ if (MOReg == 0) continue;
+
+ if (MOReg == Reg) {
+ if (MO.isKill())
+ return false;
+ if (MO.isUse() || MO.isDef())
+ return true;
+ }
+ }
+ } while (I != E);
+
+ return false;
+}
+
/// SinkInstruction - Determine whether it is safe to sink the specified machine
/// instruction out of its current block into a successor.
bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
@@ -185,6 +225,7 @@
// SuccToSinkTo - This is the successor to sink this instruction to, once we
// decide.
MachineBasicBlock *SuccToSinkTo = 0;
+ SmallVector<unsigned, 4> PhysRegs;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
@@ -210,9 +251,12 @@
if (AllocatableSet.test(AliasReg))
return false;
}
- } else if (!MO.isDead()) {
- // A def that isn't dead. We can't move it.
- return false;
+ } else {
+ if (!MO.isDead())
+ // A def that isn't dead. We can't move it.
+ return false;
+ else
+ PhysRegs.push_back(Reg);
}
} else {
// Virtual register uses are always safe to sink.
@@ -272,7 +316,15 @@
// happen with loops.
if (MI->getParent() == SuccToSinkTo)
return false;
-
+
+ // If the instruction to move defines a dead physical register which is live
+ // when leaving the basic block, don't move it because it could turn into a
+ // "zombie" define of that preg. E.g., EFLAGS. (<rdar://problem/8030636>)
+ for (SmallVectorImpl<unsigned>::const_iterator
+ I = PhysRegs.begin(), E = PhysRegs.end(); I != E; ++I)
+ if (LiveOutOfBasicBlock(MI, *I))
+ return false;
+
DEBUG(dbgs() << "Sink instr " << *MI);
DEBUG(dbgs() << "to block " << *SuccToSinkTo);
Propchange: llvm/branches/Apple/Morbo/lib/Target/ARM/ARMInstrFormats.td
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Thu Jun 3 02:59:34 2010
@@ -1,2 +1,2 @@
/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrFormats.td:104930
-/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td:98980,103126,104182,104233,104236,104265,104274,104302,104338,104412,104419,104524,104531,104640,104646,104649,104655-104656,104661,104664,104705-104706,104720,104722,104732,104737,104740,104785,104848,104858,104872,104884,104900,105092,105285,105292,105295,105360
+/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td:98980,103126,104182,104233,104236,104265,104274,104302,104338,104412,104419,104524,104531,104640,104646,104649,104655-104656,104661,104664,104705-104706,104720,104722,104732,104737,104740,104785,104848,104858,104872,104884,104900,105092,105285,105292,105295,105360,105387
Modified: llvm/branches/Apple/Morbo/test/CodeGen/X86/sink-hoist.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/test/CodeGen/X86/sink-hoist.ll?rev=105388&r1=105387&r2=105388&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/test/CodeGen/X86/sink-hoist.ll (original)
+++ llvm/branches/Apple/Morbo/test/CodeGen/X86/sink-hoist.ll Thu Jun 3 02:59:34 2010
@@ -44,26 +44,33 @@
; Sink instructions with dead EFLAGS defs.
-; CHECK: zzz:
-; CHECK: je
-; CHECK-NEXT: orb
-
-define zeroext i8 @zzz(i8 zeroext %a, i8 zeroext %b) nounwind readnone {
-entry:
- %tmp = zext i8 %a to i32 ; <i32> [#uses=1]
- %tmp2 = icmp eq i8 %a, 0 ; <i1> [#uses=1]
- %tmp3 = or i8 %b, -128 ; <i8> [#uses=1]
- %tmp4 = and i8 %b, 127 ; <i8> [#uses=1]
- %b_addr.0 = select i1 %tmp2, i8 %tmp4, i8 %tmp3 ; <i8> [#uses=1]
- ret i8 %b_addr.0
-}
+; FIXME: Unfail the zzz test if we can correctly mark pregs with the kill flag.
+;
+; See <rdar://problem/8030636>. This test isn't valid after we made machine
+; sinking more conservative about sinking instructions that define a preg into a
+; block when we don't know if the preg is killed within the current block.
+
+
+; FIXMEHECK: zzz:
+; FIXMEHECK: je
+; FIXMEHECK-NEXT: orb
+
+; define zeroext i8 @zzz(i8 zeroext %a, i8 zeroext %b) nounwind readnone {
+; entry:
+; %tmp = zext i8 %a to i32 ; <i32> [#uses=1]
+; %tmp2 = icmp eq i8 %a, 0 ; <i1> [#uses=1]
+; %tmp3 = or i8 %b, -128 ; <i8> [#uses=1]
+; %tmp4 = and i8 %b, 127 ; <i8> [#uses=1]
+; %b_addr.0 = select i1 %tmp2, i8 %tmp4, i8 %tmp3 ; <i8> [#uses=1]
+; ret i8 %b_addr.0
+; }
; Codegen should hoist and CSE these constants.
; CHECK: vv:
-; CHECK: LCPI4_0(%rip), %xmm0
-; CHECK: LCPI4_1(%rip), %xmm1
-; CHECK: LCPI4_2(%rip), %xmm2
+; CHECK: LCPI3_0(%rip), %xmm0
+; CHECK: LCPI3_1(%rip), %xmm1
+; CHECK: LCPI3_2(%rip), %xmm2
; CHECK: align
; CHECK-NOT: LCPI
; CHECK: ret
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