[llvm-branch-commits] [llvm-branch] r93396 - in /llvm/branches/Apple/Zoidberg/lib/Target/ARM: ARMISelLowering.cpp ARMLoadStoreOptimizer.cpp

[Jakob Stoklund Olesen]

Author: stoklund
Date: Wed Jan 13 18:59:51 2010
New Revision: 93396

URL: http://llvm.org/viewvc/llvm-project?rev=93396&view=rev
Log:
$ svn merge -c 93342 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r93342 into .:
U    lib/Target/ARM/ARMISelLowering.cpp
$ svn merge -c 93393 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r93393 into .:
U    lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Modified:
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMISelLowering.cpp
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMISelLowering.cpp?rev=93396&r1=93395&r2=93396&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMISelLowering.cpp Wed Jan 13 18:59:51 2010
@@ -3148,7 +3148,7 @@
   default: llvm_unreachable("unsupported size for AtomicCmpSwap!");
   case 1:
     ldrOpc = isThumb2 ? ARM::t2LDREXB : ARM::LDREXB;
-    strOpc = isThumb2 ? ARM::t2LDREXB : ARM::STREXB;
+    strOpc = isThumb2 ? ARM::t2STREXB : ARM::STREXB;
     break;
   case 2:
     ldrOpc = isThumb2 ? ARM::t2LDREXH : ARM::LDREXH;

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=93396&r1=93395&r2=93396&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Wed Jan 13 18:59:51 2010
@@ -740,6 +740,18 @@
 /// isMemoryOp - Returns true if instruction is a memory operations (that this
 /// pass is capable of operating on).
 static bool isMemoryOp(const MachineInstr *MI) {
+  if (MI->hasOneMemOperand()) {
+    const MachineMemOperand *MMO = *MI->memoperands_begin();
+
+    // Don't touch volatile memory accesses - we may be changing their order.
+    if (MMO->isVolatile())
+      return false;
+
+    // Unaligned ldr/str is emulated by some kernels, but unaligned ldm/stm is not.
+    if (MMO->getAlignment() < 4)
+      return false;
+  }
+
   int Opcode = MI->getOpcode();
   switch (Opcode) {
   default: break;