[llvm-branch-commits] [llvm-branch] r92840 - in /llvm/branches/Apple/Zoidberg/lib/CodeGen: AggressiveAntiDepBreaker.cpp AggressiveAntiDepBreaker.h CriticalAntiDepBreaker.cpp CriticalAntiDepBreaker.h
Jim Grosbach
grosbach at apple.com
Wed Jan 6 09:07:15 PST 2010
Author: grosbach
Date: Wed Jan 6 11:07:15 2010
New Revision: 92840
URL: http://llvm.org/viewvc/llvm-project?rev=92840&view=rev
Log:
merge 92837
Modified:
llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.cpp
llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.h
llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.cpp
llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.h
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.cpp?rev=92840&r1=92839&r2=92840&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.cpp Wed Jan 6 11:07:15 2010
@@ -1,4 +1,4 @@
-//===----- AggressiveAntiDepBreaker.cpp - Anti-dep breaker -------- ---------===//
+//===----- AggressiveAntiDepBreaker.cpp - Anti-dep breaker ----------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -74,18 +74,18 @@
{
assert(GroupNodes[0] == 0 && "GroupNode 0 not parent!");
assert(GroupNodeIndices[0] == 0 && "Reg 0 not in Group 0!");
-
+
// find group for each register
unsigned Group1 = GetGroup(Reg1);
unsigned Group2 = GetGroup(Reg2);
-
+
// if either group is 0, then that must become the parent
unsigned Parent = (Group1 == 0) ? Group1 : Group2;
unsigned Other = (Parent == Group1) ? Group2 : Group1;
GroupNodes.at(Other) = Parent;
return Parent;
}
-
+
unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg)
{
// Create a new GroupNode for Reg. Reg's existing GroupNode must
@@ -108,7 +108,7 @@
AggressiveAntiDepBreaker::
AggressiveAntiDepBreaker(MachineFunction& MFi,
- TargetSubtarget::RegClassVector& CriticalPathRCs) :
+ TargetSubtarget::RegClassVector& CriticalPathRCs) :
AntiDepBreaker(), MF(MFi),
MRI(MF.getRegInfo()),
TRI(MF.getTarget().getRegisterInfo()),
@@ -123,9 +123,9 @@
else
CriticalPathSet |= CPSet;
}
-
+
DEBUG(errs() << "AntiDep Critical-Path Registers:");
- DEBUG(for (int r = CriticalPathSet.find_first(); r != -1;
+ DEBUG(for (int r = CriticalPathSet.find_first(); r != -1;
r = CriticalPathSet.find_next(r))
errs() << " " << TRI->getName(r));
DEBUG(errs() << '\n');
@@ -229,10 +229,11 @@
// schedule region).
if (State->IsLive(Reg)) {
DEBUG(if (State->GetGroup(Reg) != 0)
- errs() << " " << TRI->getName(Reg) << "=g" <<
+ errs() << " " << TRI->getName(Reg) << "=g" <<
State->GetGroup(Reg) << "->g0(region live-out)");
State->UnionGroups(Reg, 0);
- } else if ((DefIndices[Reg] < InsertPosIndex) && (DefIndices[Reg] >= Count)) {
+ } else if ((DefIndices[Reg] < InsertPosIndex)
+ && (DefIndices[Reg] >= Count)) {
DefIndices[Reg] = Count;
}
}
@@ -263,7 +264,7 @@
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg()) continue;
- if ((MO.isDef() && MI->isRegTiedToUseOperand(i)) ||
+ if ((MO.isDef() && MI->isRegTiedToUseOperand(i)) ||
IsImplicitDefUse(MI, MO)) {
const unsigned Reg = MO.getReg();
PassthruRegs.insert(Reg);
@@ -317,11 +318,12 @@
}
void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx,
- const char *tag, const char *header,
+ const char *tag,
+ const char *header,
const char *footer) {
unsigned *KillIndices = State->GetKillIndices();
unsigned *DefIndices = State->GetDefIndices();
- std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
+ std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
RegRefs = State->GetRegRefs();
if (!State->IsLive(Reg)) {
@@ -352,10 +354,12 @@
DEBUG(if ((header == NULL) && (footer != NULL)) errs() << footer);
}
-void AggressiveAntiDepBreaker::PrescanInstruction(MachineInstr *MI, unsigned Count,
- std::set<unsigned>& PassthruRegs) {
+void AggressiveAntiDepBreaker::PrescanInstruction(MachineInstr *MI,
+ unsigned Count,
+ std::set<unsigned>& PassthruRegs)
+{
unsigned *DefIndices = State->GetDefIndices();
- std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
+ std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
RegRefs = State->GetRegRefs();
// Handle dead defs by simulating a last-use of the register just
@@ -368,7 +372,7 @@
if (!MO.isReg() || !MO.isDef()) continue;
unsigned Reg = MO.getReg();
if (Reg == 0) continue;
-
+
HandleLastUse(Reg, Count + 1, "", "\tDead Def: ", "\n");
}
@@ -379,7 +383,7 @@
unsigned Reg = MO.getReg();
if (Reg == 0) continue;
- DEBUG(errs() << " " << TRI->getName(Reg) << "=g" << State->GetGroup(Reg));
+ DEBUG(errs() << " " << TRI->getName(Reg) << "=g" << State->GetGroup(Reg));
// If MI's defs have a special allocation requirement, don't allow
// any def registers to be changed. Also assume all registers
@@ -395,11 +399,11 @@
unsigned AliasReg = *Alias;
if (State->IsLive(AliasReg)) {
State->UnionGroups(Reg, AliasReg);
- DEBUG(errs() << "->g" << State->GetGroup(Reg) << "(via " <<
+ DEBUG(errs() << "->g" << State->GetGroup(Reg) << "(via " <<
TRI->getName(AliasReg) << ")");
}
}
-
+
// Note register reference...
const TargetRegisterClass *RC = NULL;
if (i < MI->getDesc().getNumOperands())
@@ -435,7 +439,7 @@
void AggressiveAntiDepBreaker::ScanInstruction(MachineInstr *MI,
unsigned Count) {
DEBUG(errs() << "\tUse Groups:");
- std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
+ std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
RegRefs = State->GetRegRefs();
// Scan the register uses for this instruction and update
@@ -445,9 +449,9 @@
if (!MO.isReg() || !MO.isUse()) continue;
unsigned Reg = MO.getReg();
if (Reg == 0) continue;
-
- DEBUG(errs() << " " << TRI->getName(Reg) << "=g" <<
- State->GetGroup(Reg));
+
+ DEBUG(errs() << " " << TRI->getName(Reg) << "=g" <<
+ State->GetGroup(Reg));
// It wasn't previously live but now it is, this is a kill. Forget
// the previous live-range information and start a new live-range
@@ -469,7 +473,7 @@
AggressiveAntiDepState::RegisterReference RR = { &MO, RC };
RegRefs.insert(std::make_pair(Reg, RR));
}
-
+
DEBUG(errs() << '\n');
// Form a group of all defs and uses of a KILL instruction to ensure
@@ -483,7 +487,7 @@
if (!MO.isReg()) continue;
unsigned Reg = MO.getReg();
if (Reg == 0) continue;
-
+
if (FirstReg != 0) {
DEBUG(errs() << "=" << TRI->getName(Reg));
State->UnionGroups(FirstReg, Reg);
@@ -492,7 +496,7 @@
FirstReg = Reg;
}
}
-
+
DEBUG(errs() << "->g" << State->GetGroup(FirstReg) << '\n');
}
}
@@ -504,13 +508,14 @@
// Check all references that need rewriting for Reg. For each, use
// the corresponding register class to narrow the set of registers
// that are appropriate for renaming.
- std::pair<std::multimap<unsigned,
+ std::pair<std::multimap<unsigned,
AggressiveAntiDepState::RegisterReference>::iterator,
std::multimap<unsigned,
AggressiveAntiDepState::RegisterReference>::iterator>
Range = State->GetRegRefs().equal_range(Reg);
- for (std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>::iterator
- Q = Range.first, QE = Range.second; Q != QE; ++Q) {
+ for (std::multimap<unsigned,
+ AggressiveAntiDepState::RegisterReference>::iterator Q = Range.first,
+ QE = Range.second; Q != QE; ++Q) {
const TargetRegisterClass *RC = Q->second.RC;
if (RC == NULL) continue;
@@ -524,9 +529,9 @@
DEBUG(errs() << " " << RC->getName());
}
-
+
return BV;
-}
+}
bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
unsigned AntiDepGroupIndex,
@@ -534,7 +539,7 @@
std::map<unsigned, unsigned> &RenameMap) {
unsigned *KillIndices = State->GetKillIndices();
unsigned *DefIndices = State->GetDefIndices();
- std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
+ std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
RegRefs = State->GetRegRefs();
// Collect all referenced registers in the same group as
@@ -549,7 +554,8 @@
// Find the "superest" register in the group. At the same time,
// collect the BitVector of registers that can be used to rename
// each register.
- DEBUG(errs() << "\tRename Candidates for Group g" << AntiDepGroupIndex << ":\n");
+ DEBUG(errs() << "\tRename Candidates for Group g" << AntiDepGroupIndex
+ << ":\n");
std::map<unsigned, BitVector> RenameRegisterMap;
unsigned SuperReg = 0;
for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
@@ -560,7 +566,7 @@
// If Reg has any references, then collect possible rename regs
if (RegRefs.count(Reg) > 0) {
DEBUG(errs() << "\t\t" << TRI->getName(Reg) << ":");
-
+
BitVector BV = GetRenameRegisters(Reg);
RenameRegisterMap.insert(std::pair<unsigned, BitVector>(Reg, BV));
@@ -587,7 +593,7 @@
static int renamecnt = 0;
if (renamecnt++ % DebugDiv != DebugMod)
return false;
-
+
errs() << "*** Performing rename " << TRI->getName(SuperReg) <<
" for debug ***\n";
}
@@ -597,9 +603,9 @@
// order. If that register is available, and the corresponding
// registers are available for the other group subregisters, then we
// can use those registers to rename.
- const TargetRegisterClass *SuperRC =
+ const TargetRegisterClass *SuperRC =
TRI->getPhysicalRegisterRegClass(SuperReg, MVT::Other);
-
+
const TargetRegisterClass::iterator RB = SuperRC->allocation_order_begin(MF);
const TargetRegisterClass::iterator RE = SuperRC->allocation_order_end(MF);
if (RB == RE) {
@@ -621,7 +627,7 @@
const unsigned NewSuperReg = *R;
// Don't replace a register with itself.
if (NewSuperReg == SuperReg) continue;
-
+
DEBUG(errs() << " [" << TRI->getName(NewSuperReg) << ':');
RenameMap.clear();
@@ -640,7 +646,7 @@
}
DEBUG(errs() << " " << TRI->getName(NewReg));
-
+
// Check if Reg can be renamed to NewReg.
BitVector BV = RenameRegisterMap[Reg];
if (!BV.test(NewReg)) {
@@ -660,7 +666,8 @@
for (const unsigned *Alias = TRI->getAliasSet(NewReg);
*Alias; ++Alias) {
unsigned AliasReg = *Alias;
- if (State->IsLive(AliasReg) || (KillIndices[Reg] > DefIndices[AliasReg])) {
+ if (State->IsLive(AliasReg) ||
+ (KillIndices[Reg] > DefIndices[AliasReg])) {
DEBUG(errs() << "(alias " << TRI->getName(AliasReg) << " live)");
found = true;
break;
@@ -669,11 +676,11 @@
if (found)
goto next_super_reg;
}
-
+
// Record that 'Reg' can be renamed to 'NewReg'.
RenameMap.insert(std::pair<unsigned, unsigned>(Reg, NewReg));
}
-
+
// If we fall-out here, then every register in the group can be
// renamed, as recorded in RenameMap.
RenameOrder.erase(SuperRC);
@@ -701,13 +708,13 @@
unsigned InsertPosIndex) {
unsigned *KillIndices = State->GetKillIndices();
unsigned *DefIndices = State->GetDefIndices();
- std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
+ std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
RegRefs = State->GetRegRefs();
// The code below assumes that there is at least one instruction,
// so just duck out immediately if the block is empty.
if (SUnits.empty()) return 0;
-
+
// For each regclass the next register to use for renaming.
RenameOrderType RenameOrder;
@@ -726,17 +733,17 @@
if (CriticalPathSet.any()) {
for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
SUnit *SU = &SUnits[i];
- if (!CriticalPathSU ||
- ((SU->getDepth() + SU->Latency) >
+ if (!CriticalPathSU ||
+ ((SU->getDepth() + SU->Latency) >
(CriticalPathSU->getDepth() + CriticalPathSU->Latency))) {
CriticalPathSU = SU;
}
}
-
+
CriticalPathMI = CriticalPathSU->getInstr();
}
-#ifndef NDEBUG
+#ifndef NDEBUG
DEBUG(errs() << "\n===== Aggressive anti-dependency breaking\n");
DEBUG(errs() << "Available regs:");
for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) {
@@ -763,7 +770,7 @@
// Process the defs in MI...
PrescanInstruction(MI, Count, PassthruRegs);
-
+
// The dependence edges that represent anti- and output-
// dependencies that are candidates for breaking.
std::vector<SDep*> Edges;
@@ -776,7 +783,7 @@
if (MI == CriticalPathMI) {
CriticalPathSU = CriticalPathStep(CriticalPathSU);
CriticalPathMI = (CriticalPathSU) ? CriticalPathSU->getInstr() : 0;
- } else {
+ } else {
ExcludeRegs = &CriticalPathSet;
}
@@ -787,14 +794,14 @@
for (unsigned i = 0, e = Edges.size(); i != e; ++i) {
SDep *Edge = Edges[i];
SUnit *NextSU = Edge->getSUnit();
-
+
if ((Edge->getKind() != SDep::Anti) &&
(Edge->getKind() != SDep::Output)) continue;
-
+
unsigned AntiDepReg = Edge->getReg();
DEBUG(errs() << "\tAntidep reg: " << TRI->getName(AntiDepReg));
assert(AntiDepReg != 0 && "Anti-dependence on reg0?");
-
+
if (!AllocatableSet.test(AntiDepReg)) {
// Don't break anti-dependencies on non-allocatable registers.
DEBUG(errs() << " (non-allocatable)\n");
@@ -813,12 +820,13 @@
} else {
// No anti-dep breaking for implicit deps
MachineOperand *AntiDepOp = MI->findRegisterDefOperand(AntiDepReg);
- assert(AntiDepOp != NULL && "Can't find index for defined register operand");
+ assert(AntiDepOp != NULL &&
+ "Can't find index for defined register operand");
if ((AntiDepOp == NULL) || AntiDepOp->isImplicit()) {
DEBUG(errs() << " (implicit)\n");
continue;
}
-
+
// If the SUnit has other dependencies on the SUnit that
// it anti-depends on, don't bother breaking the
// anti-dependency since those edges would prevent such
@@ -844,58 +852,59 @@
DEBUG(errs() << " (real dependency)\n");
AntiDepReg = 0;
break;
- } else if ((P->getSUnit() != NextSU) &&
- (P->getKind() == SDep::Data) &&
+ } else if ((P->getSUnit() != NextSU) &&
+ (P->getKind() == SDep::Data) &&
(P->getReg() == AntiDepReg)) {
DEBUG(errs() << " (other dependency)\n");
AntiDepReg = 0;
break;
}
}
-
+
if (AntiDepReg == 0) continue;
}
-
+
assert(AntiDepReg != 0);
if (AntiDepReg == 0) continue;
-
+
// Determine AntiDepReg's register group.
const unsigned GroupIndex = State->GetGroup(AntiDepReg);
if (GroupIndex == 0) {
DEBUG(errs() << " (zero group)\n");
continue;
}
-
+
DEBUG(errs() << '\n');
-
+
// Look for a suitable register to use to break the anti-dependence.
std::map<unsigned, unsigned> RenameMap;
if (FindSuitableFreeRegisters(GroupIndex, RenameOrder, RenameMap)) {
DEBUG(errs() << "\tBreaking anti-dependence edge on "
<< TRI->getName(AntiDepReg) << ":");
-
+
// Handle each group register...
for (std::map<unsigned, unsigned>::iterator
S = RenameMap.begin(), E = RenameMap.end(); S != E; ++S) {
unsigned CurrReg = S->first;
unsigned NewReg = S->second;
-
- DEBUG(errs() << " " << TRI->getName(CurrReg) << "->" <<
- TRI->getName(NewReg) << "(" <<
+
+ DEBUG(errs() << " " << TRI->getName(CurrReg) << "->" <<
+ TRI->getName(NewReg) << "(" <<
RegRefs.count(CurrReg) << " refs)");
-
+
// Update the references to the old register CurrReg to
// refer to the new register NewReg.
- std::pair<std::multimap<unsigned,
- AggressiveAntiDepState::RegisterReference>::iterator,
+ std::pair<std::multimap<unsigned,
+ AggressiveAntiDepState::RegisterReference>::iterator,
std::multimap<unsigned,
- AggressiveAntiDepState::RegisterReference>::iterator>
+ AggressiveAntiDepState::RegisterReference>::iterator>
Range = RegRefs.equal_range(CurrReg);
- for (std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>::iterator
+ for (std::multimap<unsigned,
+ AggressiveAntiDepState::RegisterReference>::iterator
Q = Range.first, QE = Range.second; Q != QE; ++Q) {
Q->second.Operand->setReg(NewReg);
}
-
+
// We just went back in time and modified history; the
// liveness information for CurrReg is now inconsistent. Set
// the state as if it were dead.
@@ -903,7 +912,7 @@
RegRefs.erase(NewReg);
DefIndices[NewReg] = DefIndices[CurrReg];
KillIndices[NewReg] = KillIndices[CurrReg];
-
+
State->UnionGroups(CurrReg, 0);
RegRefs.erase(CurrReg);
DefIndices[CurrReg] = KillIndices[CurrReg];
@@ -912,7 +921,7 @@
(DefIndices[CurrReg] == ~0u)) &&
"Kill and Def maps aren't consistent for AntiDepReg!");
}
-
+
++Broken;
DEBUG(errs() << '\n');
}
@@ -921,6 +930,6 @@
ScanInstruction(MI, Count);
}
-
+
return Broken;
}
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.h?rev=92840&r1=92839&r2=92840&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/AggressiveAntiDepBreaker.h Wed Jan 6 11:07:15 2010
@@ -30,7 +30,7 @@
#include <map>
namespace llvm {
- /// Class AggressiveAntiDepState
+ /// Class AggressiveAntiDepState
/// Contains all the state necessary for anti-dep breaking.
class AggressiveAntiDepState {
public:
@@ -50,27 +50,27 @@
/// is the parent of a group, or point to another node to indicate
/// that it is a member of the same group as that node.
std::vector<unsigned> GroupNodes;
-
+
/// GroupNodeIndices - For each register, the index of the GroupNode
/// currently representing the group that the register belongs to.
/// Register 0 is always represented by the 0 group, a group
/// composed of registers that are not eligible for anti-aliasing.
unsigned GroupNodeIndices[TargetRegisterInfo::FirstVirtualRegister];
-
+
/// RegRefs - Map registers to all their references within a live range.
std::multimap<unsigned, RegisterReference> RegRefs;
-
+
/// KillIndices - The index of the most recent kill (proceding bottom-up),
/// or ~0u if the register is not live.
unsigned KillIndices[TargetRegisterInfo::FirstVirtualRegister];
-
+
/// DefIndices - The index of the most recent complete def (proceding bottom
/// up), or ~0u if the register is live.
unsigned DefIndices[TargetRegisterInfo::FirstVirtualRegister];
public:
AggressiveAntiDepState(MachineBasicBlock *BB);
-
+
/// GetKillIndices - Return the kill indices.
unsigned *GetKillIndices() { return KillIndices; }
@@ -83,13 +83,14 @@
// GetGroup - Get the group for a register. The returned value is
// the index of the GroupNode representing the group.
unsigned GetGroup(unsigned Reg);
-
+
// GetGroupRegs - Return a vector of the registers belonging to a
// group. If RegRefs is non-NULL then only included referenced registers.
void GetGroupRegs(
unsigned Group,
std::vector<unsigned> &Regs,
- std::multimap<unsigned, AggressiveAntiDepState::RegisterReference> *RegRefs);
+ std::multimap<unsigned,
+ AggressiveAntiDepState::RegisterReference> *RegRefs);
// UnionGroups - Union Reg1's and Reg2's groups to form a new
// group. Return the index of the GroupNode representing the
@@ -106,7 +107,7 @@
};
- /// Class AggressiveAntiDepBreaker
+ /// Class AggressiveAntiDepBreaker
class AggressiveAntiDepBreaker : public AntiDepBreaker {
MachineFunction& MF;
MachineRegisterInfo &MRI;
@@ -126,14 +127,15 @@
AggressiveAntiDepState *State;
public:
- AggressiveAntiDepBreaker(MachineFunction& MFi,
+ AggressiveAntiDepBreaker(MachineFunction& MFi,
TargetSubtarget::RegClassVector& CriticalPathRCs);
~AggressiveAntiDepBreaker();
-
+
/// Start - Initialize anti-dep breaking for a new basic block.
void StartBlock(MachineBasicBlock *BB);
- /// BreakAntiDependencies - Identifiy anti-dependencies along the critical path
+ /// BreakAntiDependencies - Identifiy anti-dependencies along the critical
+ /// path
/// of the ScheduleDAG and break them by renaming registers.
///
unsigned BreakAntiDependencies(std::vector<SUnit>& SUnits,
@@ -156,7 +158,7 @@
/// IsImplicitDefUse - Return true if MO represents a register
/// that is both implicitly used and defined in MI
bool IsImplicitDefUse(MachineInstr *MI, MachineOperand& MO);
-
+
/// GetPassthruRegs - If MI implicitly def/uses a register, then
/// return that register and all subregisters.
void GetPassthruRegs(MachineInstr *MI, std::set<unsigned>& PassthruRegs);
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.cpp?rev=92840&r1=92839&r2=92840&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.cpp Wed Jan 6 11:07:15 2010
@@ -287,7 +287,8 @@
unsigned
CriticalAntiDepBreaker::findSuitableFreeRegister(unsigned AntiDepReg,
unsigned LastNewReg,
- const TargetRegisterClass *RC) {
+ const TargetRegisterClass *RC)
+{
for (TargetRegisterClass::iterator R = RC->allocation_order_begin(MF),
RE = RC->allocation_order_end(MF); R != RE; ++R) {
unsigned NewReg = *R;
@@ -299,10 +300,10 @@
if (NewReg == LastNewReg) continue;
// If NewReg is dead and NewReg's most recent def is not before
// AntiDepReg's kill, it's safe to replace AntiDepReg with NewReg.
- assert(((KillIndices[AntiDepReg] == ~0u) != (DefIndices[AntiDepReg] == ~0u)) &&
- "Kill and Def maps aren't consistent for AntiDepReg!");
- assert(((KillIndices[NewReg] == ~0u) != (DefIndices[NewReg] == ~0u)) &&
- "Kill and Def maps aren't consistent for NewReg!");
+ assert(((KillIndices[AntiDepReg] == ~0u) != (DefIndices[AntiDepReg] == ~0u))
+ && "Kill and Def maps aren't consistent for AntiDepReg!");
+ assert(((KillIndices[NewReg] == ~0u) != (DefIndices[NewReg] == ~0u))
+ && "Kill and Def maps aren't consistent for NewReg!");
if (KillIndices[NewReg] != ~0u ||
Classes[NewReg] == reinterpret_cast<TargetRegisterClass *>(-1) ||
KillIndices[AntiDepReg] > DefIndices[NewReg])
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.h?rev=92840&r1=92839&r2=92840&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/CriticalAntiDepBreaker.h Wed Jan 6 11:07:15 2010
@@ -64,11 +64,12 @@
public:
CriticalAntiDepBreaker(MachineFunction& MFi);
~CriticalAntiDepBreaker();
-
+
/// Start - Initialize anti-dep breaking for a new basic block.
void StartBlock(MachineBasicBlock *BB);
- /// BreakAntiDependencies - Identifiy anti-dependencies along the critical path
+ /// BreakAntiDependencies - Identifiy anti-dependencies along the critical
+ /// path
/// of the ScheduleDAG and break them by renaming registers.
///
unsigned BreakAntiDependencies(std::vector<SUnit>& SUnits,
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