[llvm-branch-commits] [llvm-branch] r96251 - in /llvm/branches/Apple/Zoidberg: include/llvm/CodeGen/Passes.h lib/CodeGen/CMakeLists.txt lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/OptimizePHIs.cpp test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll

[Bob Wilson]

Author: bwilson
Date: Mon Feb 15 13:28:40 2010
New Revision: 96251

URL: http://llvm.org/viewvc/llvm-project?rev=96251&view=rev
Log:
--- Merging r95951 into '.':
A    test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll
U    include/llvm/CodeGen/Passes.h
U    lib/CodeGen/LLVMTargetMachine.cpp
A    lib/CodeGen/OptimizePHIs.cpp
U    lib/CodeGen/CMakeLists.txt

Added:
    llvm/branches/Apple/Zoidberg/lib/CodeGen/OptimizePHIs.cpp
      - copied, changed from r95951, llvm/trunk/lib/CodeGen/OptimizePHIs.cpp
    llvm/branches/Apple/Zoidberg/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll
      - copied unchanged from r95951, llvm/trunk/test/CodeGen/Thumb2/2010-02-11-phi-cycle.ll
Modified:
    llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/Passes.h
    llvm/branches/Apple/Zoidberg/lib/CodeGen/CMakeLists.txt
    llvm/branches/Apple/Zoidberg/lib/CodeGen/LLVMTargetMachine.cpp

Modified: llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/Passes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/Passes.h?rev=96251&r1=96250&r2=96251&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/Passes.h (original)
+++ llvm/branches/Apple/Zoidberg/include/llvm/CodeGen/Passes.h Mon Feb 15 13:28:40 2010
@@ -170,6 +170,10 @@
   /// instructions.
   FunctionPass *createMachineSinkingPass();
 
+  /// createOptimizePHIsPass - This pass optimizes machine instruction PHIs
+  /// to take advantage of opportunities created during DAG legalization.
+  FunctionPass *createOptimizePHIsPass();
+
   /// createStackSlotColoringPass - This pass performs stack slot coloring.
   FunctionPass *createStackSlotColoringPass(bool);
 

Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/CMakeLists.txt?rev=96251&r1=96250&r2=96251&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/CMakeLists.txt (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/CMakeLists.txt Mon Feb 15 13:28:40 2010
@@ -38,6 +38,7 @@
   MachineVerifier.cpp
   ObjectCodeEmitter.cpp
   OcamlGC.cpp
+  OptimizePHIs.cpp
   PHIElimination.cpp
   Passes.cpp
   PostRASchedulerList.cpp

Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/LLVMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/LLVMTargetMachine.cpp?rev=96251&r1=96250&r2=96251&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/LLVMTargetMachine.cpp Mon Feb 15 13:28:40 2010
@@ -321,6 +321,7 @@
                  /* allowDoubleDefs= */ true);
 
   if (OptLevel != CodeGenOpt::None) {
+    PM.add(createOptimizePHIsPass());
     if (!DisableMachineLICM)
       PM.add(createMachineLICMPass());
     if (!DisableMachineSink)

Copied: llvm/branches/Apple/Zoidberg/lib/CodeGen/OptimizePHIs.cpp (from r95951, llvm/trunk/lib/CodeGen/OptimizePHIs.cpp)
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/OptimizePHIs.cpp?p2=llvm/branches/Apple/Zoidberg/lib/CodeGen/OptimizePHIs.cpp&p1=llvm/trunk/lib/CodeGen/OptimizePHIs.cpp&r1=95951&r2=96251&rev=96251&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/OptimizePHIs.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/OptimizePHIs.cpp Mon Feb 15 13:28:40 2010
@@ -76,7 +76,8 @@
 bool OptimizePHIs::IsSingleValuePHICycle(const MachineInstr *MI,
                                          unsigned &SingleValReg,
                                          SmallSet<unsigned, 16> &RegsInCycle) {
-  assert(MI->isPHI() && "IsSingleValuePHICycle expects a PHI instruction");
+  assert(MI->getOpcode() == TargetInstrInfo::PHI &&
+         "IsSingleValuePHICycle expects a PHI instruction");
   unsigned DstReg = MI->getOperand(0).getReg();
 
   // See if we already saw this register.
@@ -104,7 +105,7 @@
     if (!SrcMI)
       return false;
 
-    if (SrcMI->isPHI()) {
+    if (SrcMI->getOpcode() == TargetInstrInfo::PHI) {
       if (!IsSingleValuePHICycle(SrcMI, SingleValReg, RegsInCycle))
         return false;
     } else {
@@ -124,7 +125,7 @@
   for (MachineBasicBlock::iterator
          MII = MBB.begin(), E = MBB.end(); MII != E; ) {
     MachineInstr *MI = &*MII++;
-    if (!MI->isPHI())
+    if (MI->getOpcode() != TargetInstrInfo::PHI)
       break;
 
     unsigned SingleValReg = 0;