[llvm-branch-commits] [llvm-branch] r95914 - in /llvm/branches/Apple/Hermes/lib/Target/ARM: ARMBaseInstrInfo.cpp ARMISelLowering.cpp ARMISelLowering.h ARMInstrInfo.td ARMInstrThumb.td ARMInstrThumb2.td
Jim Grosbach
grosbach at apple.com
Thu Feb 11 11:49:44 PST 2010
Author: grosbach
Date: Thu Feb 11 13:49:44 2010
New Revision: 95914
URL: http://llvm.org/viewvc/llvm-project?rev=95914&view=rev
Log:
merge 95603
Modified:
llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp
llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.h
llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrInfo.td
llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td
llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb2.td
Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=95914&r1=95913&r2=95914&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMBaseInstrInfo.cpp Thu Feb 11 13:49:44 2010
@@ -470,9 +470,9 @@
case ARM::Int_eh_sjlj_setjmp:
return 24;
case ARM::tInt_eh_sjlj_setjmp:
- return 20;
+ return 14;
case ARM::t2Int_eh_sjlj_setjmp:
- return 22;
+ return 14;
case ARM::BR_JTr:
case ARM::BR_JTm:
case ARM::BR_JTadd:
Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp?rev=95914&r1=95913&r2=95914&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.cpp Thu Feb 11 13:49:44 2010
@@ -1440,7 +1440,8 @@
}
SDValue
-ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) {
+ARMTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG,
+ const ARMSubtarget *Subtarget) {
unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
DebugLoc dl = Op.getDebugLoc();
switch (IntNo) {
@@ -1476,7 +1477,11 @@
return Result;
}
case Intrinsic::eh_sjlj_setjmp:
- return DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, MVT::i32, Op.getOperand(1));
+ SDValue Val = Subtarget->isThumb() ?
+ DAG.getCopyFromReg(DAG.getEntryNode(), dl, ARM::SP, MVT::i32) :
+ DAG.getConstant(0, MVT::i32);
+ return DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, MVT::i32, Op.getOperand(1),
+ Val);
}
}
@@ -3025,7 +3030,8 @@
case ISD::RETURNADDR: break;
case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG);
case ISD::GLOBAL_OFFSET_TABLE: return LowerGLOBAL_OFFSET_TABLE(Op, DAG);
- case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG);
+ case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG,
+ Subtarget);
case ISD::BIT_CONVERT: return ExpandBIT_CONVERT(Op.getNode(), DAG);
case ISD::SHL:
case ISD::SRL:
Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.h?rev=95914&r1=95913&r2=95914&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.h (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMISelLowering.h Thu Feb 11 13:49:44 2010
@@ -278,7 +278,8 @@
const CCValAssign &VA,
ISD::ArgFlagsTy Flags);
SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG);
- SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG);
+ SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG,
+ const ARMSubtarget *Subtarget);
SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG);
SDValue LowerGlobalAddressDarwin(SDValue Op, SelectionDAG &DAG);
SDValue LowerGlobalAddressELF(SDValue Op, SelectionDAG &DAG);
Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrInfo.td?rev=95914&r1=95913&r2=95914&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrInfo.td Thu Feb 11 13:49:44 2010
@@ -44,7 +44,8 @@
SDTCisPtrTy<1>, SDTCisVT<2, i32>]>;
def SDT_ARMThreadPointer : SDTypeProfile<1, 0, [SDTCisPtrTy<0>]>;
-def SDT_ARMEH_SJLJ_Setjmp : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisPtrTy<1>]>;
+def SDT_ARMEH_SJLJ_Setjmp : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisPtrTy<1>,
+ SDTCisInt<2>]>;
def SDT_ARMMEMBARRIERV7 : SDTypeProfile<0, 0, []>;
def SDT_ARMSYNCBARRIERV7 : SDTypeProfile<0, 0, []>;
@@ -1800,21 +1801,22 @@
// except for our own input by listing the relevant registers in Defs. By
// doing so, we also cause the prologue/epilogue code to actively preserve
// all of the callee-saved resgisters, which is exactly what we want.
-let Defs =
+// A constant value is passed in $val, and we use the location as a scratch.
+let Defs =
[ R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, LR, D0,
D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15,
D16, D17, D18, D19, D20, D21, D22, D23, D24, D25, D26, D27, D28, D29, D30,
D31 ] in {
- def Int_eh_sjlj_setjmp : XI<(outs), (ins GPR:$src),
+ def Int_eh_sjlj_setjmp : XI<(outs), (ins GPR:$src, GPR:$val),
AddrModeNone, SizeSpecial, IndexModeNone,
Pseudo, NoItinerary,
"str\tsp, [$src, #+8] @ eh_setjmp begin\n\t"
- "add\tr12, pc, #8\n\t"
- "str\tr12, [$src, #+4]\n\t"
+ "add\t$val, pc, #8\n\t"
+ "str\t$val, [$src, #+4]\n\t"
"mov\tr0, #0\n\t"
"add\tpc, pc, #0\n\t"
"mov\tr0, #1 @ eh_setjmp end", "",
- [(set R0, (ARMeh_sjlj_setjmp GPR:$src))]>;
+ [(set R0, (ARMeh_sjlj_setjmp GPR:$src, GPR:$val))]>;
}
//===----------------------------------------------------------------------===//
Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td?rev=95914&r1=95913&r2=95914&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb.td Thu Feb 11 13:49:44 2010
@@ -813,22 +813,20 @@
// except for our own input by listing the relevant registers in Defs. By
// doing so, we also cause the prologue/epilogue code to actively preserve
// all of the callee-saved resgisters, which is exactly what we want.
+// The current SP is passed in $val, and we reuse the reg as a scratch.
let Defs =
[ R0, R1, R2, R3, R4, R5, R6, R7, R12 ] in {
- def tInt_eh_sjlj_setjmp : ThumbXI<(outs), (ins GPR:$src),
+ def tInt_eh_sjlj_setjmp : ThumbXI<(outs),(ins tGPR:$src, tGPR:$val),
AddrModeNone, SizeSpecial, NoItinerary,
- "mov\tr12, r1\t@ begin eh.setjmp\n"
- "\tmov\tr1, sp\n"
- "\tstr\tr1, [$src, #8]\n"
- "\tmov\tr1, pc\n"
- "\tadds\tr1, #9\n"
- "\tstr\tr1, [$src, #4]\n"
- "\tmov\tr1, r12\n"
+ "str\t$val, [$src, #8]\t@ begin eh.setjmp\n"
+ "\tmov\t$val, pc\n"
+ "\tadds\t$val, #9\n"
+ "\tstr\t$val, [$src, #4]\n"
"\tmovs\tr0, #0\n"
"\tb\t1f\n"
"\tmovs\tr0, #1\t@ end eh.setjmp\n"
"1:", "",
- [(set R0, (ARMeh_sjlj_setjmp GPR:$src))]>;
+ [(set R0, (ARMeh_sjlj_setjmp tGPR:$src, tGPR:$val))]>;
}
//===----------------------------------------------------------------------===//
// Non-Instruction Patterns
Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb2.td?rev=95914&r1=95913&r2=95914&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMInstrThumb2.td Thu Feb 11 13:49:44 2010
@@ -1817,22 +1817,23 @@
// except for our own input by listing the relevant registers in Defs. By
// doing so, we also cause the prologue/epilogue code to actively preserve
// all of the callee-saved resgisters, which is exactly what we want.
-let Defs =
+// The current SP is passed in $val, and we reuse the reg as a scratch.
+let Defs =
[ R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, LR, D0,
D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15,
D16, D17, D18, D19, D20, D21, D22, D23, D24, D25, D26, D27, D28, D29, D30,
D31 ] in {
- def t2Int_eh_sjlj_setjmp : Thumb2XI<(outs), (ins GPR:$src),
+ def t2Int_eh_sjlj_setjmp : Thumb2XI<(outs), (ins GPR:$src, tGPR:$val),
AddrModeNone, SizeSpecial, NoItinerary,
- "str.w\tsp, [$src, #+8] @ eh_setjmp begin\n"
- "\tadr\tr12, 0f\n"
- "\torr.w\tr12, r12, #1\n"
- "\tstr.w\tr12, [$src, #+4]\n"
+ "str\t$val, [$src, #8]\t@ begin eh.setjmp\n"
+ "\tmov\t$val, pc\n"
+ "\tadds\t$val, #9\n"
+ "\tstr\t$val, [$src, #4]\n"
"\tmovs\tr0, #0\n"
"\tb\t1f\n"
- "0:\tmovs\tr0, #1 @ eh_setjmp end\n"
+ "\tmovs\tr0, #1\t@ end eh.setjmp\n"
"1:", "",
- [(set R0, (ARMeh_sjlj_setjmp GPR:$src))]>;
+ [(set R0, (ARMeh_sjlj_setjmp GPR:$src, tGPR:$val))]>;
}
More information about the llvm-branch-commits
mailing list