[llvm-branch-commits] [llvm-branch] r95460 - in /llvm/branches/Apple/Zoidberg: lib/Target/ARM/Thumb2InstrInfo.cpp test/CodeGen/Thumb2/thumb2-spill-q.ll

[Bob Wilson]

Author: bwilson
Date: Fri Feb  5 18:37:19 2010
New Revision: 95460

URL: http://llvm.org/viewvc/llvm-project?rev=95460&view=rev
Log:
--- Merging r95456 into '.':
U    test/CodeGen/Thumb2/thumb2-spill-q.ll
U    lib/Target/ARM/Thumb2InstrInfo.cpp

Modified:
    llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp
    llvm/branches/Apple/Zoidberg/test/CodeGen/Thumb2/thumb2-spill-q.ll

Modified: llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp?rev=95460&r1=95459&r2=95460&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/Target/ARM/Thumb2InstrInfo.cpp Fri Feb  5 18:37:19 2010
@@ -406,8 +406,8 @@
     MI.getOperand(FrameRegIdx+1).ChangeToImmediate(ThisImmVal);
   } else {
 
-    // AddrMode4 cannot handle any offset.
-    if (AddrMode == ARMII::AddrMode4)
+    // AddrMode4 and AddrMode6 cannot handle any offset.
+    if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6)
       return false;
 
     // AddrModeT2_so cannot handle any offset. If there is no offset
@@ -442,15 +442,12 @@
         NewOpc = positiveOffsetOpcode(Opcode);
         NumBits = 12;
       }
-    } else {
-      // VFP and NEON address modes.
-      int InstrOffs = 0;
-      if (AddrMode == ARMII::AddrMode5) {
-        const MachineOperand &OffOp = MI.getOperand(FrameRegIdx+1);
-        InstrOffs = ARM_AM::getAM5Offset(OffOp.getImm());
-        if (ARM_AM::getAM5Op(OffOp.getImm()) == ARM_AM::sub)
-          InstrOffs *= -1;
-      }
+    } else if (AddrMode == ARMII::AddrMode5) {
+      // VFP address mode.
+      const MachineOperand &OffOp = MI.getOperand(FrameRegIdx+1);
+      int InstrOffs = ARM_AM::getAM5Offset(OffOp.getImm());
+      if (ARM_AM::getAM5Op(OffOp.getImm()) == ARM_AM::sub)
+        InstrOffs *= -1;
       NumBits = 8;
       Scale = 4;
       Offset += InstrOffs * 4;
@@ -459,6 +456,8 @@
         Offset = -Offset;
         isSub = true;
       }
+    } else {
+      llvm_unreachable("Unsupported addressing mode!");
     }
 
     if (NewOpc != Opcode)

Modified: llvm/branches/Apple/Zoidberg/test/CodeGen/Thumb2/thumb2-spill-q.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/test/CodeGen/Thumb2/thumb2-spill-q.ll?rev=95460&r1=95459&r2=95460&view=diff

==============================================================================
--- llvm/branches/Apple/Zoidberg/test/CodeGen/Thumb2/thumb2-spill-q.ll (original)
+++ llvm/branches/Apple/Zoidberg/test/CodeGen/Thumb2/thumb2-spill-q.ll Fri Feb  5 18:37:19 2010
@@ -12,8 +12,8 @@
 define arm_apcscc void @aaa(%quuz* %this, i8* %block) {
 ; CHECK: aaa:
 ; CHECK: bic r4, r4, #15
-; CHECK: vst1.64 {{.*}}sp, :128
-; CHECK: vld1.64 {{.*}}sp, :128
+; CHECK: vst1.64 {{.*}}[r{{.*}}, :128]
+; CHECK: vld1.64 {{.*}}[r{{.*}}, :128]
 entry:
   %0 = call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* undef) nounwind ; <<4 x float>> [#uses=1]
   store float 6.300000e+01, float* undef, align 4