[llvm-branch-commits] [llvm-branch] r95449 - in /llvm/branches/Apple/Zoidberg: lib/CodeGen/SelectionDAG/LegalizeTypes.h lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp lib/CodeGen/SelectionDAG/TargetLowering.cpp lib/VMCore/Instructions.cpp test/CodeGen/X86/vsplit-and.ll test/Transforms/InstCombine/bitcast-sext-vector.ll
Bill Wendling
isanbard at gmail.com
Fri Feb 5 15:06:15 PST 2010
Author: void
Date: Fri Feb 5 17:06:15 2010
New Revision: 95449
URL: http://llvm.org/viewvc/llvm-project?rev=95449&view=rev
Log:
$ svn merge -c -94280 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r94280 into '.':
D test/Transforms/InstCombine/bitcast-sext-vector.ll
U lib/VMCore/Instructions.cpp
$ svn merge -c -94342 https://llvm.org/svn/llvm-project/llvm/trunk
--- Reverse-merging r94342 into '.':
D test/CodeGen/X86/vsplit-and.ll
U lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
U lib/CodeGen/SelectionDAG/LegalizeTypes.h
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
Removed:
llvm/branches/Apple/Zoidberg/test/CodeGen/X86/vsplit-and.ll
llvm/branches/Apple/Zoidberg/test/Transforms/InstCombine/bitcast-sext-vector.ll
Modified:
llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeTypes.h
llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/branches/Apple/Zoidberg/lib/VMCore/Instructions.cpp
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=95449&r1=95448&r2=95449&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeTypes.h Fri Feb 5 17:06:15 2010
@@ -609,7 +609,6 @@
SDValue WidenVecRes_SIGN_EXTEND_INREG(SDNode* N);
SDValue WidenVecRes_SELECT(SDNode* N);
SDValue WidenVecRes_SELECT_CC(SDNode* N);
- SDValue WidenVecRes_SETCC(SDNode* N);
SDValue WidenVecRes_UNDEF(SDNode *N);
SDValue WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N);
SDValue WidenVecRes_VSETCC(SDNode* N);
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=95449&r1=95448&r2=95449&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Fri Feb 5 17:06:15 2010
@@ -1172,7 +1172,6 @@
case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
- case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
case ISD::VECTOR_SHUFFLE:
Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
@@ -1719,14 +1718,6 @@
N->getOperand(1), InOp1, InOp2, N->getOperand(4));
}
-SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
- EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
- SDValue InOp1 = GetWidenedVector(N->getOperand(0));
- SDValue InOp2 = GetWidenedVector(N->getOperand(1));
- return DAG.getNode(ISD::SETCC, N->getDebugLoc(), WidenVT,
- InOp1, InOp2, N->getOperand(2));
-}
-
SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
return DAG.getUNDEF(WidenVT);
Modified: llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=95449&r1=95448&r2=95449&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/CodeGen/SelectionDAG/TargetLowering.cpp Fri Feb 5 17:06:15 2010
@@ -682,7 +682,7 @@
for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
EVT SVT = (MVT::SimpleValueType)nVT;
if (isTypeLegal(SVT) && SVT.getVectorElementType() == EltVT &&
- SVT.getVectorNumElements() > NElts && NElts != 1) {
+ SVT.getVectorNumElements() > NElts) {
TransformToType[i] = SVT;
ValueTypeActions.setTypeAction(VT, Promote);
IsLegalWiderType = true;
Modified: llvm/branches/Apple/Zoidberg/lib/VMCore/Instructions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/lib/VMCore/Instructions.cpp?rev=95449&r1=95448&r2=95449&view=diff
==============================================================================
--- llvm/branches/Apple/Zoidberg/lib/VMCore/Instructions.cpp (original)
+++ llvm/branches/Apple/Zoidberg/lib/VMCore/Instructions.cpp Fri Feb 5 17:06:15 2010
@@ -2065,9 +2065,8 @@
return secondOp;
case 3:
// no-op cast in second op implies firstOp as long as the DestTy
- // is integer and we are not converting between a vector and a
- // non vector type
- if (SrcTy->getTypeID() != Type::VectorTyID && DstTy->isInteger())
+ // is integer
+ if (DstTy->isInteger())
return firstOp;
return 0;
case 4:
Removed: llvm/branches/Apple/Zoidberg/test/CodeGen/X86/vsplit-and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/test/CodeGen/X86/vsplit-and.ll?rev=95448&view=auto
==============================================================================
--- llvm/branches/Apple/Zoidberg/test/CodeGen/X86/vsplit-and.ll (original)
+++ llvm/branches/Apple/Zoidberg/test/CodeGen/X86/vsplit-and.ll (removed)
@@ -1,22 +0,0 @@
-; RUN: llc < %s -march=x86 -disable-mmx | FileCheck %s
-
-
-define void @t(<2 x i64>* %dst, <2 x i64> %src1, <2 x i64> %src2) nounwind readonly {
-; CHECK: andb
- %cmp1 = icmp ne <2 x i64> %src1, zeroinitializer
- %cmp2 = icmp ne <2 x i64> %src2, zeroinitializer
- %t1 = and <2 x i1> %cmp1, %cmp2
- %t2 = sext <2 x i1> %t1 to <2 x i64>
- store <2 x i64> %t2, <2 x i64>* %dst
- ret void
-}
-
-define void @t2(<3 x i64>* %dst, <3 x i64> %src1, <3 x i64> %src2) nounwind readonly {
-; CHECK: andb
- %cmp1 = icmp ne <3 x i64> %src1, zeroinitializer
- %cmp2 = icmp ne <3 x i64> %src2, zeroinitializer
- %t1 = and <3 x i1> %cmp1, %cmp2
- %t2 = sext <3 x i1> %t1 to <3 x i64>
- store <3 x i64> %t2, <3 x i64>* %dst
- ret void
-}
Removed: llvm/branches/Apple/Zoidberg/test/Transforms/InstCombine/bitcast-sext-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zoidberg/test/Transforms/InstCombine/bitcast-sext-vector.ll?rev=95448&view=auto
==============================================================================
--- llvm/branches/Apple/Zoidberg/test/Transforms/InstCombine/bitcast-sext-vector.ll (original)
+++ llvm/branches/Apple/Zoidberg/test/Transforms/InstCombine/bitcast-sext-vector.ll (removed)
@@ -1,11 +0,0 @@
-; RUN: opt < %s -instcombine -S | FileCheck %s
-; CHECK: sext
-; Don't fold zero/sign extensions with a bitcast between a vector and scalar.
-
-define i32 @t(<4 x i8> %src1, <4 x i8> %src2) nounwind readonly {
-entry:
- %cmp = icmp eq <4 x i8> %src1, %src2; <<4 x i1>> [#uses=1]
- %sext = sext <4 x i1> %cmp to <4 x i8>
- %val = bitcast <4 x i8> %sext to i32
- ret i32 %val
-}
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