[llvm-branch-commits] [cfe-branch] r111415 - in /cfe/branches/Apple/williamson: lib/Basic/Targets.cpp lib/Basic/Targets.cpp.orig test/CodeGen/asm_arm.c
Daniel Dunbar
daniel at zuster.org
Wed Aug 18 13:33:47 PDT 2010
Author: ddunbar
Date: Wed Aug 18 15:33:47 2010
New Revision: 111415
URL: http://llvm.org/viewvc/llvm-project?rev=111415&view=rev
Log:
Merge r110775:
--
Author: Daniel Dunbar <daniel at zuster.org>
Date: Wed Aug 11 02:17:20 2010 +0000
ARM: Recognize single precision float register names.
- We don't recognize double or NEON register names yet -- we don't have the
infrastructure to generate the right clobbers for them.
Modified:
cfe/branches/Apple/williamson/lib/Basic/Targets.cpp
cfe/branches/Apple/williamson/lib/Basic/Targets.cpp.orig
cfe/branches/Apple/williamson/test/CodeGen/asm_arm.c
Modified: cfe/branches/Apple/williamson/lib/Basic/Targets.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/Apple/williamson/lib/Basic/Targets.cpp?rev=111415&r1=111414&r2=111415&view=diff
==============================================================================
--- cfe/branches/Apple/williamson/lib/Basic/Targets.cpp (original)
+++ cfe/branches/Apple/williamson/lib/Basic/Targets.cpp Wed Aug 18 15:33:47 2010
@@ -1772,8 +1772,18 @@
};
const char * const ARMTargetInfo::GCCRegNames[] = {
+ // Integer registers
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc"
+ "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
+
+ // Float registers
+ "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
+ "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
+ "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
+ "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31"
+
+ // FIXME: Need double and NEON registers, but we need support for aliasing
+ // multiple registers for that.
};
void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
Modified: cfe/branches/Apple/williamson/lib/Basic/Targets.cpp.orig
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/Apple/williamson/lib/Basic/Targets.cpp.orig?rev=111415&r1=111414&r2=111415&view=diff
==============================================================================
--- cfe/branches/Apple/williamson/lib/Basic/Targets.cpp.orig (original)
+++ cfe/branches/Apple/williamson/lib/Basic/Targets.cpp.orig Wed Aug 18 15:33:47 2010
@@ -1773,17 +1773,16 @@
const char * const ARMTargetInfo::GCCRegNames[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
+ "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc"
};
void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
- unsigned &NumNames) const {
+ unsigned &NumNames) const {
Names = GCCRegNames;
NumNames = llvm::array_lengthof(GCCRegNames);
}
const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
-
{ { "a1" }, "r0" },
{ { "a2" }, "r1" },
{ { "a3" }, "r2" },
@@ -1797,9 +1796,9 @@
{ { "sl" }, "r10" },
{ { "fp" }, "r11" },
{ { "ip" }, "r12" },
- { { "sp" }, "r13" },
- { { "lr" }, "r14" },
- { { "pc" }, "r15" },
+ { { "r13" }, "sp" },
+ { { "r14" }, "lr" },
+ { { "r15" }, "pc" },
};
void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
Modified: cfe/branches/Apple/williamson/test/CodeGen/asm_arm.c
URL: http://llvm.org/viewvc/llvm-project/cfe/branches/Apple/williamson/test/CodeGen/asm_arm.c?rev=111415&r1=111414&r2=111415&view=diff
==============================================================================
--- cfe/branches/Apple/williamson/test/CodeGen/asm_arm.c (original)
+++ cfe/branches/Apple/williamson/test/CodeGen/asm_arm.c Wed Aug 18 15:33:47 2010
@@ -38,3 +38,17 @@
void test5() {
__asm__("" : : : "r13", "r14", "r15", "sp", "lr", "pc");
}
+
+// CHECK: @test6
+// CHECK: call void asm sideeffect "", "
+// CHECK: ~{s0},~{s1},~{s2},~{s3},~{s4},~{s5},~{s6},~{s7},
+// CHECK: ~{s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},
+// CHECK: ~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s22},~{s23},
+// CHECK: ~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"()
+void test6() {
+ __asm__("" : : :
+ "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
+ "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
+ "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
+ "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31");
+}
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