[llvm-branch-commits] [llvm-branch] r110838 - in /llvm/branches/Apple/Pertwee: ./ lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMISelLowering.h test/CodeGen/ARM/select.ll
Bill Wendling
isanbard at gmail.com
Wed Aug 11 11:39:42 PDT 2010
Author: void
Date: Wed Aug 11 13:39:42 2010
New Revision: 110838
URL: http://llvm.org/viewvc/llvm-project?rev=110838&view=rev
Log:
Revert r110800.
$ svn merge -c -110800 https://llvm.org/svn/llvm-project/llvm/branches/Apple/Pertwee
--- Reverse-merging r110800 into '.':
U test/CodeGen/ARM/select.ll
U lib/Target/ARM/ARMISelLowering.h
U lib/Target/ARM/ARMISelLowering.cpp
Modified:
llvm/branches/Apple/Pertwee/ (props changed)
llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.cpp
llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.h
llvm/branches/Apple/Pertwee/test/CodeGen/ARM/select.ll
Propchange: llvm/branches/Apple/Pertwee/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Wed Aug 11 13:39:42 2010
@@ -1 +1 @@
-/llvm/trunk:109842,109879,110152,110170,110233,110248-110249,110254,110269,110279,110366,110589,110614,110687,110799
+/llvm/trunk:109842,109879,110152,110170,110233,110248-110249,110254,110269,110279,110366,110589,110614,110687
Modified: llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.cpp?rev=110838&r1=110837&r2=110838&view=diff
==============================================================================
--- llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.cpp Wed Aug 11 13:39:42 2010
@@ -485,9 +485,9 @@
setOperationAction(ISD::SETCC, MVT::i32, Expand);
setOperationAction(ISD::SETCC, MVT::f32, Expand);
setOperationAction(ISD::SETCC, MVT::f64, Expand);
- setOperationAction(ISD::SELECT, MVT::i32, Custom);
- setOperationAction(ISD::SELECT, MVT::f32, Custom);
- setOperationAction(ISD::SELECT, MVT::f64, Custom);
+ setOperationAction(ISD::SELECT, MVT::i32, Expand);
+ setOperationAction(ISD::SELECT, MVT::f32, Expand);
+ setOperationAction(ISD::SELECT, MVT::f64, Expand);
setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
@@ -2313,52 +2313,6 @@
return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Flag, Cmp);
}
-SDValue ARMTargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
- SDValue Cond = Op.getOperand(0);
- SDValue SelectTrue = Op.getOperand(1);
- SDValue SelectFalse = Op.getOperand(2);
- DebugLoc dl = Op.getDebugLoc();
-
- // Convert:
- //
- // (select (cmov 1, 0, cond), t, f) -> (cmov t, f, cond)
- // (select (cmov 0, 1, cond), t, f) -> (cmov f, t, cond)
- //
- if (Cond.getOpcode() == ARMISD::CMOV && Cond.hasOneUse()) {
- const ConstantSDNode *CMOVTrue =
- dyn_cast<ConstantSDNode>(Cond.getOperand(0));
- const ConstantSDNode *CMOVFalse =
- dyn_cast<ConstantSDNode>(Cond.getOperand(1));
-
- if (CMOVTrue && CMOVFalse) {
- unsigned CMOVTrueVal = CMOVTrue->getZExtValue();
- unsigned CMOVFalseVal = CMOVFalse->getZExtValue();
-
- SDValue True;
- SDValue False;
- if (CMOVTrueVal == 1 && CMOVFalseVal == 0) {
- True = SelectTrue;
- False = SelectFalse;
- } else if (CMOVTrueVal == 0 && CMOVFalseVal == 1) {
- True = SelectFalse;
- False = SelectTrue;
- }
-
- if (True.getNode() && False.getNode()) {
- EVT VT = Cond.getValueType();
- SDValue ARMcc = Cond.getOperand(2);
- SDValue CCR = Cond.getOperand(3);
- SDValue Cmp = Cond.getOperand(4);
- return DAG.getNode(ARMISD::CMOV, dl, VT, True, False, ARMcc, CCR, Cmp);
- }
- }
- }
-
- return DAG.getSelectCC(dl, Cond,
- DAG.getConstant(0, Cond.getValueType()),
- SelectTrue, SelectFalse, ISD::SETNE);
-}
-
SDValue ARMTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
EVT VT = Op.getValueType();
SDValue LHS = Op.getOperand(0);
@@ -3732,7 +3686,6 @@
return Subtarget->isTargetDarwin() ? LowerGlobalAddressDarwin(Op, DAG) :
LowerGlobalAddressELF(Op, DAG);
case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
- case ISD::SELECT: return LowerSELECT(Op, DAG);
case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
case ISD::BR_CC: return LowerBR_CC(Op, DAG);
case ISD::BR_JT: return LowerBR_JT(Op, DAG);
Modified: llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.h?rev=110838&r1=110837&r2=110838&view=diff
==============================================================================
--- llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.h (original)
+++ llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.h Wed Aug 11 13:39:42 2010
@@ -335,7 +335,6 @@
SelectionDAG &DAG) const;
SDValue LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
- SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const;
Modified: llvm/branches/Apple/Pertwee/test/CodeGen/ARM/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Pertwee/test/CodeGen/ARM/select.ll?rev=110838&r1=110837&r2=110838&view=diff
==============================================================================
--- llvm/branches/Apple/Pertwee/test/CodeGen/ARM/select.ll (original)
+++ llvm/branches/Apple/Pertwee/test/CodeGen/ARM/select.ll Wed Aug 11 13:39:42 2010
@@ -1,6 +1,5 @@
; RUN: llc < %s -march=arm | FileCheck %s
; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s --check-prefix=CHECK-VFP
-; RUN: llc < %s -mattr=+neon,+thumb2 -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=CHECK-NEON
define i32 @f1(i32 %a.s) {
;CHECK: f1:
@@ -66,27 +65,3 @@
%tmp1 = select i1 %tmp, double -1.000e+00, double %b
ret double %tmp1
}
-
-; <rdar://problem/7260094>
-;
-; We used to generate really horrible code for this function. The main cause was
-; a lack of a custom lowering routine for an ISD::SELECT. This would result in
-; two "it" blocks in the code: one for the "icmp" and another to move the index
-; into the constant pool based on the value of the "icmp". If we have one "it"
-; block generated, odds are good that we have close to the ideal code for this:
-;
-; CHECK-NEON: _f8:
-; CHECK-NEON: movw [[REGISTER_1:r[0-9]+]], #1123
-; CHECK-NEON-NEXT: movs [[REGISTER_2:r[0-9]+]], #0
-; CHECK-NEON-NEXT: cmp r0, [[REGISTER_1]]
-; CHECK-NEON-NEXT: adr [[REGISTER_3:r[0-9]+]], #LCPI
-; CHECK-NEON-NEXT: it eq
-; CHECK-NEON-NEXT: moveq [[REGISTER_2]], #4
-; CHECK-NEON-NEXT: ldr
-; CHECK-NEON: bx
-
-define arm_apcscc float @f8(i32 %a) nounwind {
- %tmp = icmp eq i32 %a, 1123
- %tmp1 = select i1 %tmp, float 0x3FF3BE76C0000000, float 0x40030E9A20000000
- ret float %tmp1
-}
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