[llvm-branch-commits] [llvm-branch] r110172 - in /llvm/branches/Apple/Pertwee: ./ lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/vaba.ll

[Bob Wilson]

Author: bwilson
Date: Tue Aug  3 19:14:04 2010
New Revision: 110172

URL: http://llvm.org/viewvc/llvm-project?rev=110172&view=rev
Log:
--- Merging r110170 into '.':
U    test/CodeGen/ARM/vaba.ll
U    lib/Target/ARM/ARMISelLowering.cpp

Modified:
    llvm/branches/Apple/Pertwee/   (props changed)
    llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.cpp
    llvm/branches/Apple/Pertwee/test/CodeGen/ARM/vaba.ll

Propchange: llvm/branches/Apple/Pertwee/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Tue Aug  3 19:14:04 2010
@@ -1 +1 @@
-/llvm/trunk:109842,109879
+/llvm/trunk:109842,109879,110170

Modified: llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.cpp?rev=110172&r1=110171&r2=110172&view=diff
==============================================================================
--- llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/branches/Apple/Pertwee/lib/Target/ARM/ARMISelLowering.cpp Tue Aug  3 19:14:04 2010
@@ -4227,12 +4227,28 @@
 /// operands.
 static SDValue PerformADDCombineWithOperands(SDNode *N, SDValue N0, SDValue N1,
                                          TargetLowering::DAGCombinerInfo &DCI) {
+  SelectionDAG &DAG = DCI.DAG;
+
   // fold (add (select cc, 0, c), x) -> (select cc, x, (add, x, c))
   if (N0.getOpcode() == ISD::SELECT && N0.getNode()->hasOneUse()) {
     SDValue Result = combineSelectAndUse(N, N0, N1, DCI);
     if (Result.getNode()) return Result;
   }
 
+  // fold (add (arm_neon_vabd a, b) c) -> (arm_neon_vaba c, a, b)
+  EVT VT = N->getValueType(0);
+  if (N0.getOpcode() == ISD::INTRINSIC_WO_CHAIN && VT.isInteger()) {
+    unsigned IntNo = cast<ConstantSDNode>(N0.getOperand(0))->getZExtValue();
+    if (IntNo == Intrinsic::arm_neon_vabds)
+      return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, N->getDebugLoc(), VT,
+                         DAG.getConstant(Intrinsic::arm_neon_vabas, MVT::i32),
+                         N1, N0.getOperand(1), N0.getOperand(2));
+    if (IntNo == Intrinsic::arm_neon_vabdu)
+      return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, N->getDebugLoc(), VT,
+                         DAG.getConstant(Intrinsic::arm_neon_vabau, MVT::i32),
+                         N1, N0.getOperand(1), N0.getOperand(2));
+  }
+
   return SDValue();
 }
 

Modified: llvm/branches/Apple/Pertwee/test/CodeGen/ARM/vaba.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Pertwee/test/CodeGen/ARM/vaba.ll?rev=110172&r1=110171&r2=110172&view=diff
==============================================================================
--- llvm/branches/Apple/Pertwee/test/CodeGen/ARM/vaba.ll (original)
+++ llvm/branches/Apple/Pertwee/test/CodeGen/ARM/vaba.ll Tue Aug  3 19:14:04 2010
@@ -203,3 +203,27 @@
 declare <8 x i16> @llvm.arm.neon.vabalu.v8i16(<8 x i16>, <8 x i8>, <8 x i8>) nounwind readnone
 declare <4 x i32> @llvm.arm.neon.vabalu.v4i32(<4 x i32>, <4 x i16>, <4 x i16>) nounwind readnone
 declare <2 x i64> @llvm.arm.neon.vabalu.v2i64(<2 x i64>, <2 x i32>, <2 x i32>) nounwind readnone
+
+define <8 x i8> @vabd_combine_s8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
+;CHECK: vabd_combine_s8:
+;CHECK: vaba.s8
+	%tmp1 = load <8 x i8>* %A
+	%tmp2 = load <8 x i8>* %B
+	%tmp3 = call <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
+        %tmp4 = add <8 x i8> %tmp2, %tmp3
+	ret <8 x i8> %tmp4
+}
+
+define <4 x i16> @vabd_combine_u16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
+;CHECK: vabd_combine_u16:
+;CHECK: vaba.u16
+	%tmp1 = load <4 x i16>* %A
+	%tmp2 = load <4 x i16>* %B
+	%tmp3 = call <4 x i16> @llvm.arm.neon.vabdu.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
+        %tmp4 = add <4 x i16> %tmp3, %tmp1
+	ret <4 x i16> %tmp4
+}
+
+declare <8 x i8>  @llvm.arm.neon.vabds.v8i8(<8 x i8>, <8 x i8>) nounwind readnone
+declare <4 x i16> @llvm.arm.neon.vabdu.v4i16(<4 x i16>, <4 x i16>) nounwind readnone
+