[llvm-branch-commits] [llvm-branch] r102392 - in /llvm/branches/Apple/Morbo: include/llvm/CodeGen/SelectionDAG.h include/llvm/Target/TargetInstrInfo.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
Dale Johannesen
dalej at apple.com
Mon Apr 26 15:28:53 PDT 2010
Author: johannes
Date: Mon Apr 26 17:28:53 2010
New Revision: 102392
URL: http://llvm.org/viewvc/llvm-project?rev=102392&view=rev
Log:
Merge next round of debug info stuff. SelectionDAGBuilder.cpp,
ARMAsmPrinter.cpp, PPCAsmPrinter.cpp modified by hand to compensate
for earlier patches that are not in Morbo.
$ svn merge -c 102361 https://dalej@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r102361 into '.':
U lib/CodeGen/LiveIntervalAnalysis.cpp
$ svn merge -c 102371 https://dalej@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r102371 into '.':
U include/llvm/Target/TargetInstrInfo.h
U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
$ svn merge -c 102372 https://dalej@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r102372 into '.':
U include/llvm/CodeGen/SelectionDAG.h
U lib/CodeGen/SelectionDAG/SelectionDAG.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
$ svn merge -c 102373 https://dalej@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r102373 into '.':
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
$ svn merge -c 102380 https://dalej@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r102380 into '.':
G lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Modified:
llvm/branches/Apple/Morbo/include/llvm/CodeGen/SelectionDAG.h
llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h
llvm/branches/Apple/Morbo/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/branches/Apple/Morbo/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
llvm/branches/Apple/Morbo/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
Modified: llvm/branches/Apple/Morbo/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/include/llvm/CodeGen/SelectionDAG.h?rev=102392&r1=102391&r2=102392&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/branches/Apple/Morbo/include/llvm/CodeGen/SelectionDAG.h Mon Apr 26 17:28:53 2010
@@ -64,8 +64,15 @@
/// instead the info is kept off to the side in this structure. Each SDNode may
/// have one or more associated dbg_value entries. This information is kept in
/// DbgValMap.
+/// Byval parameters are handled separately because they don't use alloca's,
+/// which busts the normal mechanism. There is good reason for handling all
+/// parameters separately: they may not have code generated for them, they
+/// should always go at the beginning of the function regardless of other code
+/// motion, and debug info for them is potentially useful even if the parameter
+/// is unused. Right now only byval parameters are handled separately.
class SDDbgInfo {
SmallVector<SDDbgValue*, 32> DbgValues;
+ SmallVector<SDDbgValue*, 32> ByvalParmDbgValues;
DenseMap<const SDNode*, SmallVector<SDDbgValue*, 2> > DbgValMap;
void operator=(const SDDbgInfo&); // Do not implement.
@@ -73,19 +80,22 @@
public:
SDDbgInfo() {}
- void add(SDDbgValue *V, const SDNode *Node = 0) {
+ void add(SDDbgValue *V, const SDNode *Node, bool isParameter) {
+ if (isParameter) {
+ ByvalParmDbgValues.push_back(V);
+ } else DbgValues.push_back(V);
if (Node)
DbgValMap[Node].push_back(V);
- DbgValues.push_back(V);
}
void clear() {
DbgValMap.clear();
DbgValues.clear();
+ ByvalParmDbgValues.clear();
}
bool empty() const {
- return DbgValues.empty();
+ return DbgValues.empty() && ByvalParmDbgValues.empty();
}
SmallVector<SDDbgValue*,2> &getSDDbgValues(const SDNode *Node) {
@@ -95,6 +105,8 @@
typedef SmallVector<SDDbgValue*,32>::iterator DbgIterator;
DbgIterator DbgBegin() { return DbgValues.begin(); }
DbgIterator DbgEnd() { return DbgValues.end(); }
+ DbgIterator ByvalParmDbgBegin() { return ByvalParmDbgValues.begin(); }
+ DbgIterator ByvalParmDbgEnd() { return ByvalParmDbgValues.end(); }
};
enum CombineLevel {
@@ -879,7 +891,7 @@
/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
/// value is produced by SD.
- void AddDbgValue(SDDbgValue *DB, SDNode *SD = 0);
+ void AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter);
/// GetDbgValues - Get the debug values which reference the given SDNode.
SmallVector<SDDbgValue*,2> &GetDbgValues(const SDNode* SD) {
@@ -892,6 +904,12 @@
SDDbgInfo::DbgIterator DbgBegin() { return DbgInfo->DbgBegin(); }
SDDbgInfo::DbgIterator DbgEnd() { return DbgInfo->DbgEnd(); }
+ SDDbgInfo::DbgIterator ByvalParmDbgBegin() {
+ return DbgInfo->ByvalParmDbgBegin();
+ }
+ SDDbgInfo::DbgIterator ByvalParmDbgEnd() {
+ return DbgInfo->ByvalParmDbgEnd();
+ }
void dump() const;
Modified: llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h?rev=102392&r1=102391&r2=102392&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h Mon Apr 26 17:28:53 2010
@@ -367,6 +367,9 @@
/// normally be lowered the same way as other addresses on the target,
/// e.g. in load instructions. For targets that do not support this
/// the debug info is simply lost.
+ /// If you add this for a target you should handle this DBG_VALUE in the
+ /// target-specific AsmPrinter code as well; you will probably get invalid
+ /// assembly output if you don't.
virtual MachineInstr *emitFrameIndexDebugValue(MachineFunction &MF,
unsigned FrameIx,
uint64_t Offset,
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=102392&r1=102391&r2=102392&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Apr 26 17:28:53 2010
@@ -1296,28 +1296,25 @@
MachineOperand &O = ri.getOperand();
++ri;
if (MI->isDebugValue()) {
-#if 0
- // Disabled temporarily.
// Modify DBG_VALUE now that the value is in a spill slot.
- uint64_t Offset = MI->getOperand(1).getImm();
- const MDNode *MDPtr = MI->getOperand(2).getMetadata();
- DebugLoc DL = MI->getDebugLoc();
- MachineInstr *NewDV = tii_->emitFrameIndexDebugValue(*mf_, Slot, Offset,
- MDPtr, DL);
- if (NewDV) {
- DEBUG(dbgs() << "Modifying debug info due to spill:" << "\t" << *MI);
- ReplaceMachineInstrInMaps(MI, NewDV);
- MachineBasicBlock *MBB = MI->getParent();
- MBB->insert(MBB->erase(MI), NewDV);
- } else {
-#endif
- DEBUG(dbgs() << "Removing debug info due to spill:" << "\t" << *MI);
- RemoveMachineInstrFromMaps(MI);
- vrm.RemoveMachineInstrFromMaps(MI);
- MI->eraseFromParent();
-#if 0
+ if (Slot == VirtRegMap::NO_STACK_SLOT) {
+ uint64_t Offset = MI->getOperand(1).getImm();
+ const MDNode *MDPtr = MI->getOperand(2).getMetadata();
+ DebugLoc DL = MI->getDebugLoc();
+ if (MachineInstr *NewDV = tii_->emitFrameIndexDebugValue(*mf_, Slot,
+ Offset, MDPtr, DL)) {
+ DEBUG(dbgs() << "Modifying debug info due to spill:" << "\t" << *MI);
+ ReplaceMachineInstrInMaps(MI, NewDV);
+ MachineBasicBlock *MBB = MI->getParent();
+ MBB->insert(MBB->erase(MI), NewDV);
+ continue;
+ }
}
-#endif
+
+ DEBUG(dbgs() << "Removing debug info due to spill:" << "\t" << *MI);
+ RemoveMachineInstrFromMaps(MI);
+ vrm.RemoveMachineInstrFromMaps(MI);
+ MI->eraseFromParent();
continue;
}
assert(!O.isImplicit() && "Spilling register that's used as implicit use?");
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=102392&r1=102391&r2=102392&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Mon Apr 26 17:28:53 2010
@@ -470,6 +470,17 @@
SmallSet<unsigned, 8> Seen;
bool HasDbg = DAG->hasDebugValues();
+ // If this is the first BB, emit byval parameter dbg_value's.
+ if (HasDbg && BB->getParent()->begin() == MachineFunction::iterator(BB)) {
+ SDDbgInfo::DbgIterator PDI = DAG->ByvalParmDbgBegin();
+ SDDbgInfo::DbgIterator PDE = DAG->ByvalParmDbgEnd();
+ for (; PDI != PDE; ++PDI) {
+ MachineInstr *DbgMI= Emitter.EmitDbgValue(*PDI, VRBaseMap, EM);
+ if (DbgMI)
+ BB->insert(BB->end(), DbgMI);
+ }
+ }
+
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
SUnit *SU = Sequence[i];
if (!SU) {
@@ -494,20 +505,20 @@
SDNode *N = FlaggedNodes.back();
Emitter.EmitNode(FlaggedNodes.back(), SU->OrigNode != SU, SU->isCloned,
VRBaseMap, EM);
- // Remember the the source order of the inserted instruction.
+ // Remember the source order of the inserted instruction.
if (HasDbg)
ProcessSourceNode(N, DAG, Emitter, EM, VRBaseMap, Orders, Seen);
FlaggedNodes.pop_back();
}
Emitter.EmitNode(SU->getNode(), SU->OrigNode != SU, SU->isCloned,
VRBaseMap, EM);
- // Remember the the source order of the inserted instruction.
+ // Remember the source order of the inserted instruction.
if (HasDbg)
ProcessSourceNode(SU->getNode(), DAG, Emitter, EM, VRBaseMap, Orders,
Seen);
}
- // Insert all the dbg_value which have not already been inserted in source
+ // Insert all the dbg_values which have not already been inserted in source
// order sequence.
if (HasDbg) {
MachineBasicBlock::iterator BBBegin = BB->empty() ? BB->end() : BB->begin();
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=102392&r1=102391&r2=102392&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Mon Apr 26 17:28:53 2010
@@ -5327,8 +5327,8 @@
/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
/// value is produced by SD.
-void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) {
- DbgInfo->add(DB, SD);
+void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
+ DbgInfo->add(DB, SD, isParameter);
if (SD)
SD->setHasDebugValue(true);
}
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=102392&r1=102391&r2=102392&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Mon Apr 26 17:28:53 2010
@@ -3788,11 +3788,6 @@
return 0;
}
case Intrinsic::dbg_declare: {
- // FIXME: currently, we get here only if OptLevel != CodeGenOpt::None.
- // The real handling of this intrinsic is in FastISel.
- if (OptLevel != CodeGenOpt::None)
- // FIXME: Variable debug info is not supported here.
- return 0;
DwarfWriter *DW = DAG.getDwarfWriter();
if (!DW)
return 0;
@@ -3801,24 +3796,67 @@
return 0;
MDNode *Variable = DI.getVariable();
- Value *Address = DI.getAddress();
+ // Parameters are handled specially.
+ bool isParameter = false;
+ ConstantInt *CI = dyn_cast_or_null<ConstantInt>(Variable->getOperand(0));
+ if (CI) {
+ unsigned Val = CI->getZExtValue();
+ unsigned Tag = Val & ~LLVMDebugVersionMask;
+ if (Tag == dwarf::DW_TAG_arg_variable)
+ isParameter = true;
+ }
+ const Value *Address = DI.getAddress();
if (!Address)
return 0;
- if (BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
+ if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
Address = BCI->getOperand(0);
- AllocaInst *AI = dyn_cast<AllocaInst>(Address);
- // Don't handle byval struct arguments or VLAs, for example.
- if (!AI)
- return 0;
- DenseMap<const AllocaInst*, int>::iterator SI =
- FuncInfo.StaticAllocaMap.find(AI);
- if (SI == FuncInfo.StaticAllocaMap.end())
- return 0; // VLAs.
- int FI = SI->second;
+ const AllocaInst *AI = dyn_cast<AllocaInst>(Address);
+ if (AI) {
+ // Don't handle byval arguments or VLAs, for example.
+ // Non-byval arguments are handled here (they refer to the stack temporary
+ // alloca at this point).
+ DenseMap<const AllocaInst*, int>::iterator SI =
+ FuncInfo.StaticAllocaMap.find(AI);
+ if (SI == FuncInfo.StaticAllocaMap.end())
+ return 0; // VLAs.
+ int FI = SI->second;
- if (MachineModuleInfo *MMI = DAG.getMachineModuleInfo())
- if (!DI.getDebugLoc().isUnknown())
+ MachineModuleInfo *MMI = DAG.getMachineModuleInfo();
+ if (!DI.getDebugLoc().isUnknown() && MMI->hasDebugInfo())
MMI->setVariableDbgInfo(Variable, FI, DI.getDebugLoc());
+ }
+
+ // Build an entry in DbgOrdering. Debug info input nodes get an SDNodeOrder
+ // but do not always have a corresponding SDNode built. The SDNodeOrder
+ // absolute, but not relative, values are different depending on whether
+ // debug info exists.
+ ++SDNodeOrder;
+ SDValue &N = NodeMap[Address];
+ SDDbgValue *SDV;
+ if (N.getNode()) {
+ if (isParameter && !AI) {
+ FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N.getNode());
+ if (FINode)
+ // Byval parameter. We have a frame index at this point.
+ SDV = DAG.getDbgValue(Variable, FINode->getIndex(),
+ 0, dl, SDNodeOrder);
+ else
+ // Can't do anything with other non-AI cases yet. This might be a
+ // parameter of a callee function that got inlined, for example.
+ return 0;
+ } else if (AI)
+ SDV = DAG.getDbgValue(Variable, N.getNode(), N.getResNo(),
+ 0, dl, SDNodeOrder);
+ else
+ // Can't do anything with other non-AI cases yet.
+ return 0;
+ DAG.AddDbgValue(SDV, N.getNode(), isParameter);
+ } else {
+ // This isn't useful, but it shows what we're missing.
+ SDV = DAG.getDbgValue(Variable, UndefValue::get(Address->getType()),
+ 0, dl, SDNodeOrder);
+ DAG.AddDbgValue(SDV, 0, isParameter);
+ }
return 0;
}
case Intrinsic::dbg_value: {
@@ -3840,20 +3878,23 @@
// absolute, but not relative, values are different depending on whether
// debug info exists.
++SDNodeOrder;
+ SDDbgValue *SDV;
if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
- DAG.AddDbgValue(DAG.getDbgValue(Variable, V, Offset, dl, SDNodeOrder));
+ SDV = DAG.getDbgValue(Variable, V, Offset, dl, SDNodeOrder);
+ DAG.AddDbgValue(SDV, 0, false);
} else {
SDValue &N = NodeMap[V];
- if (N.getNode())
- DAG.AddDbgValue(DAG.getDbgValue(Variable, N.getNode(),
- N.getResNo(), Offset, dl, SDNodeOrder),
- N.getNode());
- else
+ if (N.getNode()) {
+ SDV = DAG.getDbgValue(Variable, N.getNode(),
+ N.getResNo(), Offset, dl, SDNodeOrder);
+ DAG.AddDbgValue(SDV, N.getNode(), false);
+ } else {
// We may expand this to cover more cases. One case where we have no
// data available is an unreferenced parameter; we need this fallback.
- DAG.AddDbgValue(DAG.getDbgValue(Variable,
- UndefValue::get(V->getType()),
- Offset, dl, SDNodeOrder));
+ SDV = DAG.getDbgValue(Variable, UndefValue::get(V->getType()),
+ Offset, dl, SDNodeOrder);
+ DAG.AddDbgValue(SDV, 0, false);
+ }
}
// Build a debug info table entry.
Modified: llvm/branches/Apple/Morbo/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=102392&r1=102391&r2=102392&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Mon Apr 26 17:28:53 2010
@@ -21,6 +21,7 @@
#include "ARMMachineFunctionInfo.h"
#include "ARMMCInstLower.h"
#include "ARMTargetMachine.h"
+#include "llvm/Analysis/DebugInfo.h"
#include "llvm/Constants.h"
#include "llvm/Module.h"
#include "llvm/Type.h"
@@ -1042,7 +1043,24 @@
int Opc = MI->getOpcode();
if (Opc == ARM::CONSTPOOL_ENTRY)
EmitAlignment(2);
-
+
+ if (Opc == ARM::DBG_VALUE) {
+ unsigned NOps = MI->getNumOperands();
+ assert(NOps==4);
+ O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
+ // cast away const; DIetc do not take const operands for some reason.
+ DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata()));
+ O << V.getName();
+ O << " <- ";
+ // Frame address. Currently handles register +- offset only.
+ assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm());
+ O << '['; printOperand(MI, 0); O << '+'; printOperand(MI, 1);
+ O << ']';
+ O << "+";
+ printOperand(MI, NOps-2);
+ OutStreamer.AddBlankLine();
+ return;
+ }
printInstruction(MI);
OutStreamer.AddBlankLine();
}
Modified: llvm/branches/Apple/Morbo/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=102392&r1=102391&r2=102392&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Mon Apr 26 17:28:53 2010
@@ -21,6 +21,7 @@
#include "PPCPredicates.h"
#include "PPCTargetMachine.h"
#include "PPCSubtarget.h"
+#include "llvm/Analysis/DebugInfo.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Module.h"
@@ -539,6 +540,23 @@
/// the current output stream.
///
void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
+ if (MI->getOpcode() == TargetOpcode::DBG_VALUE) {
+ unsigned NOps = MI->getNumOperands();
+ assert(NOps==4);
+ O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
+ // cast away const; DIetc do not take const operands for some reason.
+ DIVariable V(const_cast<MDNode *>(MI->getOperand(NOps-1).getMetadata()));
+ O << V.getName();
+ O << " <- ";
+ // Frame address. Currently handles register +- offset only.
+ assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm());
+ O << '['; printOperand(MI, 0); O << '+'; printOperand(MI, 1);
+ O << ']';
+ O << "+";
+ printOperand(MI, NOps-2);
+ OutStreamer.AddBlankLine();
+ return;
+ }
// Check for slwi/srwi mnemonics.
if (MI->getOpcode() == PPC::RLWINM) {
unsigned char SH = MI->getOperand(2).getImm();
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