[llvm-branch-commits] [llvm-branch] r102355 - in /llvm/branches/Apple/Morbo: include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/ARM/ lib/Target/PowerPC/ lib/Target/X86/
Dale Johannesen
dalej at apple.com
Mon Apr 26 10:48:13 PDT 2010
Author: johannes
Date: Mon Apr 26 12:48:13 2010
New Revision: 102355
URL: http://llvm.org/viewvc/llvm-project?rev=102355&view=rev
Log:
$ svn merge -c 102316 https://dalej@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r102316 into '.':
U lib/CodeGen/SelectionDAG/FastISel.cpp
$ svn merge -c 102320 https://dalej@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r102320 into '.':
U include/llvm/Target/TargetLowering.h
U lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86ISelLowering.h
$ svn merge -c 102323 https://dalej@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r102323 into '.':
G include/llvm/Target/TargetLowering.h
U include/llvm/Target/TargetInstrInfo.h
U lib/CodeGen/LiveIntervalAnalysis.cpp
U lib/CodeGen/SelectionDAG/InstrEmitter.h
U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
G lib/CodeGen/SelectionDAG/InstrEmitter.cpp
G lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86InstrInfo.h
G lib/Target/X86/X86ISelLowering.h
U lib/Target/X86/X86InstrInfo.cpp
$ svn merge -c 102324 https://dalej@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r102324 into '.':
U lib/Target/ARM/ARMBaseRegisterInfo.cpp
U lib/Target/ARM/ARMBaseInstrInfo.cpp
U lib/Target/ARM/ARMBaseInstrInfo.h
$ svn merge -c 102325 https://dalej@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r102325 into '.':
U lib/Target/PowerPC/PPCInstrInfo.h
U lib/Target/PowerPC/PPCInstrInfo.cpp
$ svn merge -c 102327 https://dalej@llvm.org/svn/llvm-project/llvm/trunk
--- Merging r102327 into '.':
G lib/CodeGen/LiveIntervalAnalysis.cpp
Modified:
llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h
llvm/branches/Apple/Morbo/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/FastISel.cpp
llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/InstrEmitter.h
llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseRegisterInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.h
llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.cpp
llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.cpp
llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.h
Modified: llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/include/llvm/Target/TargetInstrInfo.h Mon Apr 26 12:48:13 2010
@@ -23,6 +23,7 @@
class LiveVariables;
class MCAsmInfo;
class MachineMemOperand;
+class MDNode;
class SDNode;
class SelectionDAG;
class TargetRegisterClass;
@@ -361,6 +362,19 @@
return false;
}
+ /// emitFrameIndexDebugValue - Emit a target-dependent form of
+ /// DBG_VALUE encoding the address of a frame index. Addresses would
+ /// normally be lowered the same way as other addresses on the target,
+ /// e.g. in load instructions. For targets that do not support this
+ /// the debug info is simply lost.
+ virtual MachineInstr *emitFrameIndexDebugValue(MachineFunction &MF,
+ unsigned FrameIx,
+ uint64_t Offset,
+ const MDNode *MDPtr,
+ DebugLoc dl) const {
+ return 0;
+ }
+
/// foldMemoryOperand - Attempt to fold a load or store of the specified stack
/// slot into the specified machine instruction for the specified operand(s).
/// If this is possible, a new instruction is returned with the specified
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Apr 26 12:48:13 2010
@@ -1296,9 +1296,28 @@
MachineOperand &O = ri.getOperand();
++ri;
if (MI->isDebugValue()) {
- // Remove debug info for now.
- O.setReg(0U);
- DEBUG(dbgs() << "Removing debug info due to spill:" << "\t" << *MI);
+#if 0
+ // Disabled temporarily.
+ // Modify DBG_VALUE now that the value is in a spill slot.
+ uint64_t Offset = MI->getOperand(1).getImm();
+ const MDNode *MDPtr = MI->getOperand(2).getMetadata();
+ DebugLoc DL = MI->getDebugLoc();
+ MachineInstr *NewDV = tii_->emitFrameIndexDebugValue(*mf_, Slot, Offset,
+ MDPtr, DL);
+ if (NewDV) {
+ DEBUG(dbgs() << "Modifying debug info due to spill:" << "\t" << *MI);
+ ReplaceMachineInstrInMaps(MI, NewDV);
+ MachineBasicBlock *MBB = MI->getParent();
+ MBB->insert(MBB->erase(MI), NewDV);
+ } else {
+#endif
+ DEBUG(dbgs() << "Removing debug info due to spill:" << "\t" << *MI);
+ RemoveMachineInstrFromMaps(MI);
+ vrm.RemoveMachineInstrFromMaps(MI);
+ MI->eraseFromParent();
+#if 0
+ }
+#endif
continue;
}
assert(!O.isImplicit() && "Spilling register that's used as implicit use?");
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/FastISel.cpp Mon Apr 26 12:48:13 2010
@@ -337,6 +337,8 @@
return true;
AllocaInst *AI = dyn_cast<AllocaInst>(Address);
// Don't handle byval struct arguments or VLAs, for example.
+ // Note that if we have a byval struct argument, fast ISel is turned off;
+ // those are handled in SelectionDAGBuilder.
if (!AI) break;
DenseMap<const AllocaInst*, int>::iterator SI =
StaticAllocaMap.find(AI);
@@ -344,7 +346,7 @@
int FI = SI->second;
if (!DI->getDebugLoc().isUnknown())
MMI->setVariableDbgInfo(DI->getVariable(), FI, DI->getDebugLoc());
-
+
// Building the map above is target independent. Generating DBG_VALUE
// inline is target dependent; do this now.
(void)TargetSelectInstruction(cast<Instruction>(I));
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Mon Apr 26 12:48:13 2010
@@ -507,13 +507,19 @@
/// EmitDbgValue - Generate machine instruction for a dbg_value node.
///
MachineInstr *InstrEmitter::EmitDbgValue(SDDbgValue *SD,
- MachineBasicBlock *InsertBB,
DenseMap<SDValue, unsigned> &VRBaseMap,
DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) {
uint64_t Offset = SD->getOffset();
MDNode* MDPtr = SD->getMDPtr();
DebugLoc DL = SD->getDebugLoc();
+ if (SD->getKind() == SDDbgValue::FRAMEIX) {
+ // Stack address; this needs to be lowered in target-dependent fashion.
+ // EmitTargetCodeForFrameDebugValue is responsible for allocation.
+ unsigned FrameIx = SD->getFrameIx();
+ return TII->emitFrameIndexDebugValue(*MF, FrameIx, Offset, MDPtr, DL);
+ }
+ // Otherwise, we're going to create an instruction here.
const TargetInstrDesc &II = TII->get(TargetOpcode::DBG_VALUE);
MachineInstrBuilder MIB = BuildMI(*MF, DL, II);
if (SD->getKind() == SDDbgValue::SDNODE) {
@@ -541,15 +547,6 @@
// dropped.
MIB.addReg(0U);
}
- } else if (SD->getKind() == SDDbgValue::FRAMEIX) {
- unsigned FrameIx = SD->getFrameIx();
- // Stack address; this needs to be lowered in target-dependent fashion.
- // FIXME test that the target supports this somehow; if not emit Undef.
- // Create a pseudo for EmitInstrWithCustomInserter's consumption.
- MIB.addImm(FrameIx).addImm(Offset).addMetadata(MDPtr);
- abort();
- TLI->EmitInstrWithCustomInserter(&*MIB, InsertBB, EM);
- return 0;
} else {
// Insert an Undef so we can see what we dropped.
MIB.addReg(0U);
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/InstrEmitter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/InstrEmitter.h?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/InstrEmitter.h (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/InstrEmitter.h Mon Apr 26 12:48:13 2010
@@ -103,7 +103,6 @@
/// EmitDbgValue - Generate machine instruction for a dbg_value node.
///
MachineInstr *EmitDbgValue(SDDbgValue *SD,
- MachineBasicBlock *InsertBB,
DenseMap<SDValue, unsigned> &VRBaseMap,
DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM);
Modified: llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Mon Apr 26 12:48:13 2010
@@ -449,11 +449,11 @@
continue;
unsigned DVOrder = DVs[i]->getOrder();
if (DVOrder == ++Order) {
- // FIXME: If the source node with next higher order is scheduled before
- // this could end up generating funky debug info.
- MachineInstr *DbgMI = Emitter.EmitDbgValue(DVs[i], BB, VRBaseMap, EM);
- Orders.push_back(std::make_pair(DVOrder, DbgMI));
- BB->insert(InsertPos, DbgMI);
+ MachineInstr *DbgMI = Emitter.EmitDbgValue(DVs[i], VRBaseMap, EM);
+ if (DbgMI) {
+ Orders.push_back(std::make_pair(DVOrder, DbgMI));
+ BB->insert(InsertPos, DbgMI);
+ }
DVs[i]->setIsInvalidated();
}
}
@@ -534,13 +534,15 @@
(*DI)->getOrder() >= LastOrder && (*DI)->getOrder() < Order; ++DI) {
if ((*DI)->isInvalidated())
continue;
- MachineInstr *DbgMI = Emitter.EmitDbgValue(*DI, MIBB, VRBaseMap, EM);
- if (!LastOrder)
- // Insert to start of the BB (after PHIs).
- BB->insert(BBBegin, DbgMI);
- else {
- MachineBasicBlock::iterator Pos = MI;
- MIBB->insert(llvm::next(Pos), DbgMI);
+ MachineInstr *DbgMI = Emitter.EmitDbgValue(*DI, VRBaseMap, EM);
+ if (DbgMI) {
+ if (!LastOrder)
+ // Insert to start of the BB (after PHIs).
+ BB->insert(BBBegin, DbgMI);
+ else {
+ MachineBasicBlock::iterator Pos = MI;
+ MIBB->insert(llvm::next(Pos), DbgMI);
+ }
}
}
LastOrder = Order;
@@ -552,8 +554,9 @@
MachineBasicBlock *InsertBB = Emitter.getBlock();
MachineBasicBlock::iterator Pos= Emitter.getBlock()->getFirstTerminator();
if (!(*DI)->isInvalidated()) {
- MachineInstr *DbgMI= Emitter.EmitDbgValue(*DI, InsertBB, VRBaseMap, EM);
- InsertBB->insert(Pos, DbgMI);
+ MachineInstr *DbgMI= Emitter.EmitDbgValue(*DI, VRBaseMap, EM);
+ if (DbgMI)
+ InsertBB->insert(Pos, DbgMI);
}
++DI;
}
Modified: llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.cpp Mon Apr 26 12:48:13 2010
@@ -790,6 +790,16 @@
}
}
+MachineInstr*
+ARMBaseInstrInfo::emitFrameIndexDebugValue(MachineFunction &MF,
+ unsigned FrameIx, uint64_t Offset,
+ const MDNode *MDPtr,
+ DebugLoc DL) const {
+ MachineInstrBuilder MIB = BuildMI(MF, DL, get(ARM::DBG_VALUE))
+ .addFrameIndex(FrameIx).addImm(0).addImm(Offset).addMetadata(MDPtr);
+ return &*MIB;
+}
+
MachineInstr *ARMBaseInstrInfo::
foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
const SmallVectorImpl<unsigned> &Ops, int FI) const {
Modified: llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.h?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseInstrInfo.h Mon Apr 26 12:48:13 2010
@@ -269,6 +269,12 @@
unsigned DestReg, int FrameIndex,
const TargetRegisterClass *RC) const;
+ virtual MachineInstr *emitFrameIndexDebugValue(MachineFunction &MF,
+ unsigned FrameIx,
+ uint64_t Offset,
+ const MDNode *MDPtr,
+ DebugLoc DL) const;
+
virtual bool canFoldMemoryOperand(const MachineInstr *MI,
const SmallVectorImpl<unsigned> &Ops) const;
Modified: llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/ARM/ARMBaseRegisterInfo.cpp Mon Apr 26 12:48:13 2010
@@ -1180,6 +1180,13 @@
SPAdj = 0;
Offset += SPAdj;
+ // Special handling of dbg_value instructions.
+ if (MI.isDebugValue()) {
+ MI.getOperand(i). ChangeToRegister(FrameReg, false /*isDef*/);
+ MI.getOperand(i+1).ChangeToImmediate(Offset);
+ return 0;
+ }
+
// Modify MI as necessary to handle as much of 'Offset' as possible
bool Done = false;
if (!AFI->isThumbFunction())
Modified: llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.cpp Mon Apr 26 12:48:13 2010
@@ -629,6 +629,16 @@
MBB.insert(MI, NewMIs[i]);
}
+MachineInstr*
+PPCInstrInfo::emitFrameIndexDebugValue(MachineFunction &MF,
+ unsigned FrameIx, uint64_t Offset,
+ const MDNode *MDPtr,
+ DebugLoc DL) const {
+ MachineInstrBuilder MIB = BuildMI(MF, DL, get(PPC::DBG_VALUE));
+ addFrameReference(MIB, FrameIx, 0, false).addImm(Offset).addMetadata(MDPtr);
+ return &*MIB;
+}
+
/// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
/// copy instructions, turning them into load/store instructions.
MachineInstr *PPCInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
Modified: llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.h?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/PowerPC/PPCInstrInfo.h Mon Apr 26 12:48:13 2010
@@ -126,6 +126,12 @@
unsigned DestReg, int FrameIndex,
const TargetRegisterClass *RC) const;
+ virtual MachineInstr *emitFrameIndexDebugValue(MachineFunction &MF,
+ unsigned FrameIx,
+ uint64_t Offset,
+ const MDNode *MDPtr,
+ DebugLoc DL) const;
+
/// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
/// copy instructions, turning them into load/store instructions.
virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.cpp?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.cpp Mon Apr 26 12:48:13 2010
@@ -8641,21 +8641,6 @@
F->DeleteMachineInstr(MI); // The pseudo instruction is gone now.
return BB;
}
- // DBG_VALUE. Only the frame index case is done here.
- case X86::DBG_VALUE: {
- const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
- DebugLoc DL = MI->getDebugLoc();
- X86AddressMode AM;
- MachineFunction *F = BB->getParent();
- AM.BaseType = X86AddressMode::FrameIndexBase;
- AM.Base.FrameIndex = MI->getOperand(0).getImm();
- addFullAddress(BuildMI(BB, DL, TII->get(X86::DBG_VALUE)), AM).
- addImm(MI->getOperand(1).getImm()).
- addMetadata(MI->getOperand(2).getMetadata());
- F->DeleteMachineInstr(MI); // Remove pseudo.
- return BB;
- }
-
// String/text processing lowering.
case X86::PCMPISTRM128REG:
return EmitPCMP(MI, BB, 3, false /* in-mem */);
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.cpp?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.cpp Mon Apr 26 12:48:13 2010
@@ -2315,6 +2315,20 @@
return true;
}
+MachineInstr*
+X86InstrInfo::emitFrameIndexDebugValue(MachineFunction &MF,
+ unsigned FrameIx, uint64_t Offset,
+ const MDNode *MDPtr,
+ DebugLoc DL) const {
+ // Target dependent DBG_VALUE. Only the frame index case is done here.
+ X86AddressMode AM;
+ AM.BaseType = X86AddressMode::FrameIndexBase;
+ AM.Base.FrameIndex = FrameIx;
+ MachineInstrBuilder MIB = BuildMI(MF, DL, get(X86::DBG_VALUE));
+ addFullAddress(MIB, AM).addImm(Offset).addMetadata(MDPtr);
+ return &*MIB;
+}
+
static MachineInstr *FuseTwoAddrInst(MachineFunction &MF, unsigned Opcode,
const SmallVectorImpl<MachineOperand> &MOs,
MachineInstr *MI,
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.h?rev=102355&r1=102354&r2=102355&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.h Mon Apr 26 12:48:13 2010
@@ -623,6 +623,12 @@
MachineBasicBlock::iterator MI,
const std::vector<CalleeSavedInfo> &CSI) const;
+ virtual
+ MachineInstr *emitFrameIndexDebugValue(MachineFunction &MF,
+ unsigned FrameIx, uint64_t Offset,
+ const MDNode *MDPtr,
+ DebugLoc DL) const;
+
/// foldMemoryOperand - If this target supports it, fold a load or store of
/// the specified stack slot into the specified machine instruction for the
/// specified operand(s). If this is possible, the target should perform the
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