[llvm-branch-commits] [llvm-branch] r101820 - in /llvm/branches/Apple/Morbo: ./ include/llvm/CodeGen/SelectionDAGNodes.h include/llvm/IntrinsicsX86.td lib/Target/X86/X86.td lib/Target/X86/X86ISelLowering.h lib/Target/X86/X86InstrFormats.td lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86InstrSSE.td lib/Target/X86/X86Subtarget.cpp lib/Target/X86/X86Subtarget.h test/MC/AsmParser/X86/x86_32-bit_cat.s test/MC/AsmParser/X86/x86_32-encoding.s
Eric Christopher
echristo at apple.com
Mon Apr 19 15:31:47 PDT 2010
Author: echristo
Date: Mon Apr 19 17:31:47 2010
New Revision: 101820
URL: http://llvm.org/viewvc/llvm-project?rev=101820&view=rev
Log:
Merge from mainline, revisions:
99835, 100078, 100231, 100250, 100252, 100466
Modified:
llvm/branches/Apple/Morbo/ (props changed)
llvm/branches/Apple/Morbo/include/llvm/CodeGen/SelectionDAGNodes.h
llvm/branches/Apple/Morbo/include/llvm/IntrinsicsX86.td
llvm/branches/Apple/Morbo/lib/Target/X86/X86.td
llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.h
llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrFormats.td
llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.td
llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrSSE.td
llvm/branches/Apple/Morbo/lib/Target/X86/X86Subtarget.cpp
llvm/branches/Apple/Morbo/lib/Target/X86/X86Subtarget.h
llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_32-bit_cat.s
llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_32-encoding.s
Propchange: llvm/branches/Apple/Morbo/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Apr 19 17:31:47 2010
@@ -1,2 +1,2 @@
/llvm/branches/Apple/Hermes:96832,96835,96858,96870,96876,96879
-/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98768,98773,98778,98780,98810,98835,98839,98845,98855,98862,98881,98920,98977,99032-99033,99043,99196,99223,99263,99282-99284,99306,99319-99321,99324,99336,99378,99418,99423,99429,99455,99463,99465,99469,99484,99490,99492-99494,99507,99524,99537,99539-99540,99544,99570,99575,99598,99620,99629-99630,99636,99671,99692,99695,99697,99699,99722,99816,99836,99845-99846,99848,99850,99855,99879,99881-99883,99895,99899,99910,99916,99919,99952-99954,99957,99959,99974-99975,99982,99984-99986,99988,99992-99993,99995,99997-99999,100016,100035,100037-100038,100042,100044,100056,100072,100074,100081-100090,100092,100094-100095,100116,100134,100184,100209,100214-100218,100220-100221,100223-100225,100257,100261,100304,100332,100353,100384,100454-100455,100457,100478,100480,100487,100494,100497,100505,100521,100553,100568,100584,100592,100609-100610,100636,100710,100736,100742,100751,100768-100769,100771,100781,100797,100804,10
0837,100867,100892,100936-100937,101011,101023,101075,101077,101079,101081,101085,101154,101158,101162,101165,101181,101190,101202,101282,101303,101314-101315,101317,101331,101343,101383,101392,101420,101453,101604,101615,101629,101684-101686,101805
+/llvm/trunk:98602,98604,98612,98615-98616,98675,98686,98743-98744,98768,98773,98778,98780,98810,98835,98839,98845,98855,98862,98881,98920,98977,99032-99033,99043,99196,99223,99263,99282-99284,99306,99319-99321,99324,99336,99378,99418,99423,99429,99440,99455,99463,99465,99469,99484,99490,99492-99494,99507,99524,99537,99539-99540,99544,99570,99575,99598,99620,99629-99630,99636,99671,99692,99695,99697,99699,99722,99816,99835-99836,99845-99846,99848,99850,99855,99879,99881-99883,99895,99899,99910,99916,99919,99952-99954,99957,99959,99974-99975,99982,99984-99986,99988,99992-99993,99995,99997-99999,100016,100035,100037-100038,100042,100044,100056,100072,100074,100078,100081-100090,100092,100094-100095,100116,100134,100184,100209,100214-100218,100220-100221,100223-100225,100231,100250,100252,100257,100261,100304,100332,100353,100384,100454-100455,100457,100466,100478,100480,100487,100494,100497,100505,100521,100553,100568,100584,100592,100609-100610,100636,100710,100736,100742,1007
51,100768-100769,100771,100781,100797,100804,100837,100867,100892,100936-100937,101011,101023,101075,101077,101079,101081,101085,101154,101158,101162,101165,101181,101190,101202,101282,101303,101314-101315,101317,101331,101343,101383,101392,101420,101453,101604,101615,101629,101684-101686,101805
Modified: llvm/branches/Apple/Morbo/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/include/llvm/CodeGen/SelectionDAGNodes.h?rev=101820&r1=101819&r2=101820&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/branches/Apple/Morbo/include/llvm/CodeGen/SelectionDAGNodes.h Mon Apr 19 17:31:47 2010
@@ -616,7 +616,7 @@
/// which do not reference a specific memory location should be less than
/// this value. Those that do must not be less than this value, and can
/// be used with SelectionDAG::getMemIntrinsicNode.
- static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+80;
+ static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+85;
/// Node predicates
Modified: llvm/branches/Apple/Morbo/include/llvm/IntrinsicsX86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/include/llvm/IntrinsicsX86.td?rev=101820&r1=101819&r2=101820&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/include/llvm/IntrinsicsX86.td (original)
+++ llvm/branches/Apple/Morbo/include/llvm/IntrinsicsX86.td Mon Apr 19 17:31:47 2010
@@ -779,6 +779,29 @@
[IntrNoMem, Commutative]>;
}
+// Advanced Encryption Standard (AES) Instructions
+let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_aesni_aesimc : GCCBuiltin<"__builtin_ia32_aesimc128">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_aesni_aesenc : GCCBuiltin<"__builtin_ia32_aesenc128">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_aesni_aesenclast : GCCBuiltin<"__builtin_ia32_aesenclast128">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_aesni_aesdec : GCCBuiltin<"__builtin_ia32_aesdec128">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_aesni_aesdeclast : GCCBuiltin<"__builtin_ia32_aesdeclast128">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_aesni_aeskeygenassist :
+ GCCBuiltin<"__builtin_ia32_aeskeygenassist128">,
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+}
+
// Vector pack
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse41_packusdw : GCCBuiltin<"__builtin_ia32_packusdw128">,
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86.td?rev=101820&r1=101819&r2=101820&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86.td (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86.td Mon Apr 19 17:31:47 2010
@@ -74,6 +74,8 @@
def FeatureVectorUAMem : SubtargetFeature<"vector-unaligned-mem",
"HasVectorUAMem", "true",
"Allow unaligned memory operands on vector/SIMD instructions">;
+def FeatureAES : SubtargetFeature<"aes", "HasAES", "true",
+ "Enable AES instructions">;
//===----------------------------------------------------------------------===//
// X86 processors supported.
@@ -101,11 +103,17 @@
def : Proc<"core2", [FeatureSSSE3, Feature64Bit, FeatureSlowBTMem]>;
def : Proc<"penryn", [FeatureSSE41, Feature64Bit, FeatureSlowBTMem]>;
def : Proc<"atom", [FeatureSSE3, Feature64Bit, FeatureSlowBTMem]>;
+// "Arrandale" along with corei3 and corei5
def : Proc<"corei7", [FeatureSSE42, Feature64Bit, FeatureSlowBTMem,
- FeatureFastUAMem]>;
+ FeatureFastUAMem, FeatureAES]>;
def : Proc<"nehalem", [FeatureSSE42, Feature64Bit, FeatureSlowBTMem,
FeatureFastUAMem]>;
+// Westmere is a similar machine to nehalem with some additional features.
+// Westmere is the corei3/i5/i7 path from nehalem to sandybridge
+def : Proc<"westmere", [FeatureSSE42, Feature64Bit, FeatureSlowBTMem,
+ FeatureFastUAMem, FeatureAES]>;
// Sandy Bridge does not have FMA
+// FIXME: Wikipedia says it does... it should have AES as well.
def : Proc<"sandybridge", [FeatureSSE42, FeatureAVX, Feature64Bit]>;
def : Proc<"k6", [FeatureMMX]>;
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.h?rev=101820&r1=101819&r2=101820&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86ISelLowering.h Mon Apr 19 17:31:47 2010
@@ -234,6 +234,9 @@
PCMPEQB, PCMPEQW, PCMPEQD, PCMPEQQ,
PCMPGTB, PCMPGTW, PCMPGTD, PCMPGTQ,
+ // Advanced Encryption Standard (AES) Instructions
+ AESIMC, AESENC, AESENCLAST, AESDEC, AESDECLAST,
+
// ADD, SUB, SMUL, UMUL, etc. - Arithmetic operations with FLAGS results.
ADD, SUB, SMUL, UMUL,
INC, DEC, OR, XOR, AND,
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrFormats.td?rev=101820&r1=101819&r2=101820&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrFormats.td (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrFormats.td Mon Apr 19 17:31:47 2010
@@ -324,6 +324,20 @@
: I<o, F, outs, ins, asm, pattern, SSEPackedInt>, TA,
Requires<[HasSSE42]>;
+// AES Instruction Templates:
+//
+// AES8I
+// These use the same encoding as the SSE4.2 T8 and TA encodings.
+class AES8I<bits<8> o, Format F, dag outs, dag ins, string asm,
+ list<dag>pattern>
+ : I<o, F, outs, ins, asm, pattern, SSEPackedInt>, T8,
+ Requires<[HasAES]>;
+
+class AESAI<bits<8> o, Format F, dag outs, dag ins, string asm,
+ list<dag> pattern>
+ : Ii8<o, F, outs, ins, asm, pattern, SSEPackedInt>, TA,
+ Requires<[HasAES]>;
+
// X86-64 Instruction templates...
//
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.td?rev=101820&r1=101819&r2=101820&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrInfo.td Mon Apr 19 17:31:47 2010
@@ -328,6 +328,7 @@
def OptForSpeed : Predicate<"!OptForSize">;
def FastBTMem : Predicate<"!Subtarget->isBTMemSlow()">;
def CallImmAddr : Predicate<"Subtarget->IsLegalToCallImmediateAddr(TM)">;
+def HasAES : Predicate<"Subtarget->hasAES()">;
//===----------------------------------------------------------------------===//
// X86 Instruction Format Definitions.
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrSSE.td?rev=101820&r1=101819&r2=101820&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86InstrSSE.td Mon Apr 19 17:31:47 2010
@@ -4025,3 +4025,81 @@
defm PCMPESTRIO : SS42AI_pcmpestri<int_x86_sse42_pcmpestrio128>;
defm PCMPESTRIS : SS42AI_pcmpestri<int_x86_sse42_pcmpestris128>;
defm PCMPESTRIZ : SS42AI_pcmpestri<int_x86_sse42_pcmpestriz128>;
+
+//===----------------------------------------------------------------------===//
+// AES-NI Instructions
+//===----------------------------------------------------------------------===//
+
+let Constraints = "$src1 = $dst" in {
+ multiclass AESI_binop_rm_int<bits<8> opc, string OpcodeStr,
+ Intrinsic IntId128, bit Commutable = 0> {
+ def rr : AES8I<opc, MRMSrcReg, (outs VR128:$dst),
+ (ins VR128:$src1, VR128:$src2),
+ !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
+ [(set VR128:$dst, (IntId128 VR128:$src1, VR128:$src2))]>,
+ OpSize {
+ let isCommutable = Commutable;
+ }
+ def rm : AES8I<opc, MRMSrcMem, (outs VR128:$dst),
+ (ins VR128:$src1, i128mem:$src2),
+ !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
+ [(set VR128:$dst,
+ (IntId128 VR128:$src1,
+ (bitconvert (memopv16i8 addr:$src2))))]>, OpSize;
+ }
+}
+
+defm AESENC : AESI_binop_rm_int<0xDC, "aesenc",
+ int_x86_aesni_aesenc>;
+defm AESENCLAST : AESI_binop_rm_int<0xDD, "aesenclast",
+ int_x86_aesni_aesenclast>;
+defm AESDEC : AESI_binop_rm_int<0xDE, "aesdec",
+ int_x86_aesni_aesdec>;
+defm AESDECLAST : AESI_binop_rm_int<0xDF, "aesdeclast",
+ int_x86_aesni_aesdeclast>;
+
+def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, VR128:$src2)),
+ (AESENCrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (int_x86_aesni_aesenc VR128:$src1, (memop addr:$src2))),
+ (AESENCrm VR128:$src1, addr:$src2)>;
+def : Pat<(v2i64 (int_x86_aesni_aesenclast VR128:$src1, VR128:$src2)),
+ (AESENCLASTrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (int_x86_aesni_aesenclast VR128:$src1, (memop addr:$src2))),
+ (AESENCLASTrm VR128:$src1, addr:$src2)>;
+def : Pat<(v2i64 (int_x86_aesni_aesdec VR128:$src1, VR128:$src2)),
+ (AESDECrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (int_x86_aesni_aesdec VR128:$src1, (memop addr:$src2))),
+ (AESDECrm VR128:$src1, addr:$src2)>;
+def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, VR128:$src2)),
+ (AESDECLASTrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (int_x86_aesni_aesdeclast VR128:$src1, (memop addr:$src2))),
+ (AESDECLASTrm VR128:$src1, addr:$src2)>;
+
+def AESIMCrr : AES8I<0xDB, MRMSrcReg, (outs VR128:$dst),
+ (ins VR128:$src1),
+ "aesimc\t{$src1, $dst|$dst, $src1}",
+ [(set VR128:$dst,
+ (int_x86_aesni_aesimc VR128:$src1))]>,
+ OpSize;
+
+def AESIMCrm : AES8I<0xDB, MRMSrcMem, (outs VR128:$dst),
+ (ins i128mem:$src1),
+ "aesimc\t{$src1, $dst|$dst, $src1}",
+ [(set VR128:$dst,
+ (int_x86_aesni_aesimc (bitconvert (memopv2i64 addr:$src1))))]>,
+ OpSize;
+
+def AESKEYGENASSIST128rr : AESAI<0xDF, MRMSrcReg, (outs VR128:$dst),
+ (ins VR128:$src1, i32i8imm:$src2),
+ "aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+ [(set VR128:$dst,
+ (int_x86_aesni_aeskeygenassist VR128:$src1, imm:$src2))]>,
+ OpSize;
+def AESKEYGENASSIST128rm : AESAI<0xDF, MRMSrcMem, (outs VR128:$dst),
+ (ins i128mem:$src1, i32i8imm:$src2),
+ "aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+ [(set VR128:$dst,
+ (int_x86_aesni_aeskeygenassist (bitconvert (memopv2i64 addr:$src1)),
+ imm:$src2))]>,
+ OpSize;
+
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86Subtarget.cpp?rev=101820&r1=101819&r2=101820&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86Subtarget.cpp Mon Apr 19 17:31:47 2010
@@ -259,6 +259,7 @@
HasFMA3 = IsIntel && ((ECX >> 12) & 0x1);
HasAVX = ((ECX >> 28) & 0x1);
+ HasAES = IsIntel && ((ECX >> 25) & 0x1);
if (IsIntel || IsAMD) {
// Determine if bit test memory instructions are slow.
@@ -286,6 +287,7 @@
, HasX86_64(false)
, HasSSE4A(false)
, HasAVX(false)
+ , HasAES(false)
, HasFMA3(false)
, HasFMA4(false)
, IsBTMemSlow(false)
Modified: llvm/branches/Apple/Morbo/lib/Target/X86/X86Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/lib/Target/X86/X86Subtarget.h?rev=101820&r1=101819&r2=101820&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/lib/Target/X86/X86Subtarget.h (original)
+++ llvm/branches/Apple/Morbo/lib/Target/X86/X86Subtarget.h Mon Apr 19 17:31:47 2010
@@ -69,6 +69,9 @@
/// HasAVX - Target has AVX instructions
bool HasAVX;
+ /// HasAES - Target has AES instructions
+ bool HasAES;
+
/// HasFMA3 - Target has 3-operand fused multiply-add
bool HasFMA3;
@@ -148,6 +151,7 @@
bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
bool hasAVX() const { return HasAVX; }
+ bool hasAES() const { return HasAES; }
bool hasFMA3() const { return HasFMA3; }
bool hasFMA4() const { return HasFMA4; }
bool isBTMemSlow() const { return IsBTMemSlow; }
Modified: llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_32-bit_cat.s
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_32-bit_cat.s?rev=101820&r1=101819&r2=101820&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_32-bit_cat.s (original)
+++ llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_32-bit_cat.s Mon Apr 19 17:31:47 2010
@@ -7809,3 +7809,39 @@
// CHECK: pcmpgtq %xmm5, %xmm5
pcmpgtq %xmm5,%xmm5
+
+// CHECK: aesimc %xmm0, %xmm1
+ aesimc %xmm0,%xmm1
+
+// CHECK: aesimc (%eax), %xmm1
+ aesimc (%eax),%xmm1
+
+// CHECK: aesenc %xmm1, %xmm2
+ aesenc %xmm1,%xmm2
+
+// CHECK: aesenc 4(%ebx), %xmm2
+ aesenc 4(%ebx),%xmm2
+
+// CHECK: aesenclast %xmm3, %xmm4
+ aesenclast %xmm3,%xmm4
+
+// CHECK: aesenclast 4(%edx,%edi), %xmm4
+ aesenclast 4(%edx,%edi),%xmm4
+
+// CHECK: aesdec %xmm5, %xmm6
+ aesdec %xmm5,%xmm6
+
+// CHECK: aesdec 4(%ecx,%eax,8), %xmm6
+ aesdec 4(%ecx,%eax,8),%xmm6
+
+// CHECK: aesdeclast %xmm7, %xmm0
+ aesdeclast %xmm7,%xmm0
+
+// CHECK: aesdeclast 3405691582, %xmm0
+ aesdeclast 0xcafebabe,%xmm0
+
+// CHECK: aeskeygenassist $125, %xmm1, %xmm2
+ aeskeygenassist $125, %xmm1, %xmm2
+
+// CHECK: aeskeygenassist $125, (%edx,%eax,4), %xmm2
+ aeskeygenassist $125, (%edx,%eax,4), %xmm2
Modified: llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_32-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_32-encoding.s?rev=101820&r1=101819&r2=101820&view=diff
==============================================================================
--- llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_32-encoding.s (original)
+++ llvm/branches/Apple/Morbo/test/MC/AsmParser/X86/x86_32-encoding.s Mon Apr 19 17:31:47 2010
@@ -9861,3 +9861,51 @@
// CHECK: pcmpgtq %xmm5, %xmm5
// CHECK: encoding: [0x66,0x0f,0x38,0x37,0xed]
pcmpgtq %xmm5,%xmm5
+
+// CHECK: aesimc %xmm0, %xmm1
+// CHECK: encoding: [0x66,0x0f,0x38,0xdb,0xc8]
+ aesimc %xmm0,%xmm1
+
+// CHECK: aesimc (%eax), %xmm1
+// CHECK: encoding: [0x66,0x0f,0x38,0xdb,0x08]
+ aesimc (%eax),%xmm1
+
+// CHECK: aesenc %xmm1, %xmm2
+// CHECK: encoding: [0x66,0x0f,0x38,0xdc,0xd1]
+ aesenc %xmm1,%xmm2
+
+// CHECK: aesenc 4(%ebx), %xmm2
+// CHECK: encoding: [0x66,0x0f,0x38,0xdc,0x53,0x04]
+ aesenc 4(%ebx),%xmm2
+
+// CHECK: aesenclast %xmm3, %xmm4
+// CHECK: encoding: [0x66,0x0f,0x38,0xdd,0xe3]
+ aesenclast %xmm3,%xmm4
+
+// CHECK: aesenclast 4(%edx,%edi), %xmm4
+// CHECK: encoding: [0x66,0x0f,0x38,0xdd,0x64,0x3a,0x04]
+ aesenclast 4(%edx,%edi),%xmm4
+
+// CHECK: aesdec %xmm5, %xmm6
+// CHECK: encoding: [0x66,0x0f,0x38,0xde,0xf5]
+ aesdec %xmm5,%xmm6
+
+// CHECK: aesdec 4(%ecx,%eax,8), %xmm6
+// CHECK: encoding: [0x66,0x0f,0x38,0xde,0x74,0xc1,0x04]
+ aesdec 4(%ecx,%eax,8),%xmm6
+
+// CHECK: aesdeclast %xmm7, %xmm0
+// CHECK: encoding: [0x66,0x0f,0x38,0xdf,0xc7]
+ aesdeclast %xmm7,%xmm0
+
+// CHECK: aesdeclast 3405691582, %xmm0
+// CHECK: encoding: [0x66,0x0f,0x38,0xdf,0x05,0xbe,0xba,0xfe,0xca]
+ aesdeclast 0xcafebabe,%xmm0
+
+// CHECK: aeskeygenassist $125, %xmm1, %xmm2
+// CHECK: encoding: [0x66,0x0f,0x3a,0xdf,0xd1,0x7d]
+ aeskeygenassist $125, %xmm1, %xmm2
+
+// CHECK: aeskeygenassist $125, (%edx,%eax,4), %xmm2
+// CHECK: encoding: [0x66,0x0f,0x3a,0xdf,0x14,0x82,0x7d]
+ aeskeygenassist $125, (%edx,%eax,4), %xmm2
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