[llvm-branch-commits] [llvm-branch] r100152 - in /llvm/branches/Apple/Hermes: ./ lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Jim Grosbach
grosbach at apple.com
Thu Apr 1 16:23:52 PDT 2010
Author: grosbach
Date: Thu Apr 1 18:23:52 2010
New Revision: 100152
URL: http://llvm.org/viewvc/llvm-project?rev=100152&view=rev
Log:
merge 99630
Modified:
llvm/branches/Apple/Hermes/ (props changed)
llvm/branches/Apple/Hermes/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Propchange: llvm/branches/Apple/Hermes/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Thu Apr 1 18:23:52 2010
@@ -1 +1 @@
-/llvm/trunk:96521,96525,96572,96621,96775,96825,96827,96990,97025,97065,97071,97538,97707,97757,97782,97797,98210,98270,98395,98398,98402,98409,98416,98427,98561,98586,98845,98977,99043
+/llvm/trunk:96521,96525,96572,96621,96775,96825,96827,96990,97025,97065,97071,97538,97707,97757,97782,97797,98210,98270,98395,98398,98402,98409,98416,98427,98561,98586,98845,98977,99043,99630
Modified: llvm/branches/Apple/Hermes/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Hermes/lib/Target/ARM/ARMLoadStoreOptimizer.cpp?rev=100152&r1=100151&r2=100152&view=diff
==============================================================================
--- llvm/branches/Apple/Hermes/lib/Target/ARM/ARMLoadStoreOptimizer.cpp (original)
+++ llvm/branches/Apple/Hermes/lib/Target/ARM/ARMLoadStoreOptimizer.cpp Thu Apr 1 18:23:52 2010
@@ -340,6 +340,7 @@
unsigned PReg = PMO.getReg();
unsigned PRegNum = PMO.isUndef() ? UINT_MAX
: ARMRegisterInfo::getRegisterNumbering(PReg);
+ unsigned Count = 1;
for (unsigned i = SIndex+1, e = MemOps.size(); i != e; ++i) {
int NewOffset = MemOps[i].Offset;
@@ -349,11 +350,14 @@
: ARMRegisterInfo::getRegisterNumbering(Reg);
// AM4 - register numbers in ascending order.
// AM5 - consecutive register numbers in ascending order.
+ // Can only do up to 16 double-word registers per insn.
if (Reg != ARM::SP &&
NewOffset == Offset + (int)Size &&
- ((isAM4 && RegNum > PRegNum) || RegNum == PRegNum+1)) {
+ ((isAM4 && RegNum > PRegNum)
+ || ((Size < 8 || Count < 16) && RegNum == PRegNum+1))) {
Offset += Size;
PRegNum = RegNum;
+ ++Count;
} else {
// Can't merge this in. Try merge the earlier ones first.
MergeOpsUpdate(MBB, MemOps, SIndex, i, insertAfter, SOffset,
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