[llvm-branch-commits] [llvm-branch] r85416 - in /llvm/branches/Apple/Leela/lib/Target/ARM: ARMBaseRegisterInfo.cpp ARMBaseRegisterInfo.h ARMTargetMachine.h Thumb1RegisterInfo.cpp Thumb1RegisterInfo.h Thumb2RegisterInfo.cpp Thumb2RegisterInfo.h
Bill Wendling
isanbard at gmail.com
Wed Oct 28 11:42:38 PDT 2009
Author: void
Date: Wed Oct 28 13:42:37 2009
New Revision: 85416
URL: http://llvm.org/viewvc/llvm-project?rev=85416&view=rev
Log:
$ svn merge -c 85064 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r85064 into '.':
U lib/Target/ARM/Thumb2RegisterInfo.cpp
$ svn merge -c 85065 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r85065 into '.':
U lib/Target/ARM/ARMTargetMachine.h
$ svn merge -c 85333 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r85333 into '.':
U lib/Target/ARM/ARMBaseRegisterInfo.h
U lib/Target/ARM/ARMBaseRegisterInfo.cpp
$ svn merge -c 85335 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r85335 into '.':
G lib/Target/ARM/ARMBaseRegisterInfo.cpp
$ svn merge -c 85406 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r85406 into '.':
U lib/Target/ARM/Thumb1RegisterInfo.cpp
G lib/Target/ARM/Thumb2RegisterInfo.cpp
U lib/Target/ARM/Thumb1RegisterInfo.h
U lib/Target/ARM/Thumb2RegisterInfo.h
G lib/Target/ARM/ARMBaseRegisterInfo.cpp
Modified:
llvm/branches/Apple/Leela/lib/Target/ARM/ARMBaseRegisterInfo.cpp
llvm/branches/Apple/Leela/lib/Target/ARM/ARMBaseRegisterInfo.h
llvm/branches/Apple/Leela/lib/Target/ARM/ARMTargetMachine.h
llvm/branches/Apple/Leela/lib/Target/ARM/Thumb1RegisterInfo.cpp
llvm/branches/Apple/Leela/lib/Target/ARM/Thumb1RegisterInfo.h
llvm/branches/Apple/Leela/lib/Target/ARM/Thumb2RegisterInfo.cpp
llvm/branches/Apple/Leela/lib/Target/ARM/Thumb2RegisterInfo.h
Modified: llvm/branches/Apple/Leela/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=85416&r1=85415&r2=85416&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/branches/Apple/Leela/lib/Target/ARM/ARMBaseRegisterInfo.cpp Wed Oct 28 13:42:37 2009
@@ -29,6 +29,7 @@
#include "llvm/CodeGen/MachineLocation.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
+#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetFrameInfo.h"
@@ -40,13 +41,12 @@
using namespace llvm;
static cl::opt<bool>
-ScavengeFrameIndexVals("arm-virtual-frame-index-vals", cl::Hidden,
- cl::init(false),
- cl::desc("Resolve frame index values via scavenging in PEI"));
+ReuseFrameIndexVals("arm-reuse-frame-index-vals", cl::Hidden, cl::init(true),
+ cl::desc("Reuse repeated frame index values"));
static cl::opt<bool>
-ReuseFrameIndexVals("arm-reuse-frame-index-vals", cl::Hidden, cl::init(false),
- cl::desc("Reuse repeated frame index values"));
+ARMDynamicStackAlign("arm-dynamic-stack-alignment", cl::Hidden, cl::init(false),
+ cl::desc("Dynamically re-align the stack as needed"));
unsigned ARMBaseRegisterInfo::getRegisterNumbering(unsigned RegEnum,
bool *isSPVFP) {
@@ -466,6 +466,21 @@
}
}
+static unsigned calculateMaxStackAlignment(const MachineFrameInfo *FFI) {
+ unsigned MaxAlign = 0;
+
+ for (int i = FFI->getObjectIndexBegin(),
+ e = FFI->getObjectIndexEnd(); i != e; ++i) {
+ if (FFI->isDeadObjectIndex(i))
+ continue;
+
+ unsigned Align = FFI->getObjectAlignment(i);
+ MaxAlign = std::max(MaxAlign, Align);
+ }
+
+ return MaxAlign;
+}
+
/// hasFP - Return true if the specified function should have a dedicated frame
/// pointer register. This is true if the function has variable sized allocas
/// or if frame pointer elimination is disabled.
@@ -473,10 +488,28 @@
bool ARMBaseRegisterInfo::hasFP(const MachineFunction &MF) const {
const MachineFrameInfo *MFI = MF.getFrameInfo();
return (NoFramePointerElim ||
+ needsStackRealignment(MF) ||
MFI->hasVarSizedObjects() ||
MFI->isFrameAddressTaken());
}
+bool ARMBaseRegisterInfo::
+needsStackRealignment(const MachineFunction &MF) const {
+ // Only do this for ARM if explicitly enabled
+ // FIXME: Once it's passing all the tests, enable by default
+ if (!ARMDynamicStackAlign)
+ return false;
+
+ const MachineFrameInfo *MFI = MF.getFrameInfo();
+ const ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
+ unsigned StackAlign = MF.getTarget().getFrameInfo()->getStackAlignment();
+ return (RealignStack &&
+ !AFI->isThumb1OnlyFunction() &&
+ (MFI->getMaxAlignment() > StackAlign) &&
+ !MFI->hasVarSizedObjects());
+
+}
+
bool ARMBaseRegisterInfo::cannotEliminateFrame(const MachineFunction &MF) const {
const MachineFrameInfo *MFI = MF.getFrameInfo();
if (NoFramePointerElim && MFI->hasCalls())
@@ -552,6 +585,16 @@
SmallVector<unsigned, 4> UnspilledCS2GPRs;
ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
+ MachineFrameInfo *MFI = MF.getFrameInfo();
+
+ // Calculate and set max stack object alignment early, so we can decide
+ // whether we will need stack realignment (and thus FP).
+ if (ARMDynamicStackAlign) {
+ unsigned MaxAlign = std::max(MFI->getMaxAlignment(),
+ calculateMaxStackAlignment(MFI));
+ MFI->setMaxAlignment(MaxAlign);
+ }
+
// Don't spill FP if the frame can be eliminated. This is determined
// by scanning the callee-save registers to see if any is used.
const unsigned *CSRegs = getCalleeSavedRegs();
@@ -974,7 +1017,7 @@
bool ARMBaseRegisterInfo::
requiresFrameIndexScavenging(const MachineFunction &MF) const {
- return ScavengeFrameIndexVals;
+ return true;
}
// hasReservedCallFrame - Under normal circumstances, when a frame pointer is
@@ -1052,17 +1095,6 @@
MBB.erase(I);
}
-/// findScratchRegister - Find a 'free' ARM register. If register scavenger
-/// is not being used, R12 is available. Otherwise, try for a call-clobbered
-/// register first and then a spilled callee-saved register if that fails.
-static
-unsigned findScratchRegister(RegScavenger *RS, const TargetRegisterClass *RC,
- ARMFunctionInfo *AFI) {
- unsigned Reg = RS ? RS->FindUnusedReg(RC) : (unsigned) ARM::R12;
- assert(!AFI->isThumb1OnlyFunction());
- return Reg;
-}
-
unsigned
ARMBaseRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
int SPAdj, int *Value,
@@ -1085,16 +1117,28 @@
int FrameIndex = MI.getOperand(i).getIndex();
int Offset = MFI->getObjectOffset(FrameIndex) + MFI->getStackSize() + SPAdj;
+ // When doing dynamic stack realignment, all of these need to change(?)
if (AFI->isGPRCalleeSavedArea1Frame(FrameIndex))
Offset -= AFI->getGPRCalleeSavedArea1Offset();
else if (AFI->isGPRCalleeSavedArea2Frame(FrameIndex))
Offset -= AFI->getGPRCalleeSavedArea2Offset();
else if (AFI->isDPRCalleeSavedAreaFrame(FrameIndex))
Offset -= AFI->getDPRCalleeSavedAreaOffset();
- else if (hasFP(MF) && AFI->hasStackFrame()) {
+ else if (needsStackRealignment(MF)) {
+ // When dynamically realigning the stack, use the frame pointer for
+ // parameters, and the stack pointer for locals.
+ assert (hasFP(MF) && "dynamic stack realignment without a FP!");
+ if (FrameIndex < 0) {
+ FrameReg = getFrameRegister(MF);
+ Offset -= AFI->getFramePtrSpillOffset();
+ // When referencing from the frame pointer, stack pointer adjustments
+ // don't matter.
+ SPAdj = 0;
+ }
+ } else if (hasFP(MF) && AFI->hasStackFrame()) {
assert(SPAdj == 0 && "Unexpected stack offset!");
// Use frame pointer to reference fixed objects unless this is a
- // frameless function,
+ // frameless function.
FrameReg = getFrameRegister(MF);
Offset -= AFI->getFramePtrSpillOffset();
}
@@ -1126,19 +1170,8 @@
// Must be addrmode4.
MI.getOperand(i).ChangeToRegister(FrameReg, false, false, false);
else {
- if (!ScavengeFrameIndexVals) {
- // Insert a set of r12 with the full address: r12 = sp + offset
- // If the offset we have is too large to fit into the instruction, we need
- // to form it with a series of ADDri's. Do this by taking 8-bit chunks
- // out of 'Offset'.
- ScratchReg = findScratchRegister(RS, ARM::GPRRegisterClass, AFI);
- if (ScratchReg == 0)
- // No register is "free". Scavenge a register.
- ScratchReg = RS->scavengeRegister(ARM::GPRRegisterClass, II, SPAdj);
- } else {
- ScratchReg = MF.getRegInfo().createVirtualRegister(ARM::GPRRegisterClass);
- *Value = Offset;
- }
+ ScratchReg = MF.getRegInfo().createVirtualRegister(ARM::GPRRegisterClass);
+ if (Value) *Value = Offset;
if (!AFI->isThumbFunction())
emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
Offset, Pred, PredReg, TII);
@@ -1148,7 +1181,7 @@
Offset, Pred, PredReg, TII);
}
MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true);
- if (!ReuseFrameIndexVals || !ScavengeFrameIndexVals)
+ if (!ReuseFrameIndexVals)
ScratchReg = 0;
}
return ScratchReg;
@@ -1303,6 +1336,18 @@
AFI->setGPRCalleeSavedArea1Size(GPRCS1Size);
AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
+
+ // If we need dynamic stack realignment, do it here.
+ if (needsStackRealignment(MF)) {
+ unsigned Opc;
+ unsigned MaxAlign = MFI->getMaxAlignment();
+ assert (!AFI->isThumb1OnlyFunction());
+ Opc = AFI->isThumbFunction() ? ARM::t2BICri : ARM::BICri;
+
+ AddDefaultCC(AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(Opc), ARM::SP)
+ .addReg(ARM::SP, RegState::Kill)
+ .addImm(MaxAlign-1)));
+ }
}
static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) {
Modified: llvm/branches/Apple/Leela/lib/Target/ARM/ARMBaseRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/ARM/ARMBaseRegisterInfo.h?rev=85416&r1=85415&r2=85416&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/ARM/ARMBaseRegisterInfo.h (original)
+++ llvm/branches/Apple/Leela/lib/Target/ARM/ARMBaseRegisterInfo.h Wed Oct 28 13:42:37 2009
@@ -96,6 +96,8 @@
bool hasFP(const MachineFunction &MF) const;
+ bool needsStackRealignment(const MachineFunction &MF) const;
+
bool cannotEliminateFrame(const MachineFunction &MF) const;
void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
Modified: llvm/branches/Apple/Leela/lib/Target/ARM/ARMTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/ARM/ARMTargetMachine.h?rev=85416&r1=85415&r2=85416&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/ARM/ARMTargetMachine.h (original)
+++ llvm/branches/Apple/Leela/lib/Target/ARM/ARMTargetMachine.h Wed Oct 28 13:42:37 2009
@@ -103,7 +103,7 @@
ThumbTargetMachine(const Target &T, const std::string &TT,
const std::string &FS);
- /// returns either Thumb1RegisterInfo of Thumb2RegisterInfo
+ /// returns either Thumb1RegisterInfo or Thumb2RegisterInfo
virtual const ARMBaseRegisterInfo *getRegisterInfo() const {
return &InstrInfo->getRegisterInfo();
}
Modified: llvm/branches/Apple/Leela/lib/Target/ARM/Thumb1RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/ARM/Thumb1RegisterInfo.cpp?rev=85416&r1=85415&r2=85416&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/ARM/Thumb1RegisterInfo.cpp (original)
+++ llvm/branches/Apple/Leela/lib/Target/ARM/Thumb1RegisterInfo.cpp Wed Oct 28 13:42:37 2009
@@ -77,18 +77,6 @@
return TargetRegisterInfo::getPhysicalRegisterRegClass(Reg, VT);
}
-bool
-Thumb1RegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
- return true;
-}
-
-bool
-Thumb1RegisterInfo::requiresFrameIndexScavenging(const MachineFunction &MF)
- const {
- return true;
-}
-
-
bool Thumb1RegisterInfo::hasReservedCallFrame(MachineFunction &MF) const {
const MachineFrameInfo *FFI = MF.getFrameInfo();
unsigned CFSize = FFI->getMaxCallFrameSize();
Modified: llvm/branches/Apple/Leela/lib/Target/ARM/Thumb1RegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/ARM/Thumb1RegisterInfo.h?rev=85416&r1=85415&r2=85416&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/ARM/Thumb1RegisterInfo.h (original)
+++ llvm/branches/Apple/Leela/lib/Target/ARM/Thumb1RegisterInfo.h Wed Oct 28 13:42:37 2009
@@ -40,9 +40,6 @@
const TargetRegisterClass *
getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const;
- bool requiresRegisterScavenging(const MachineFunction &MF) const;
- bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
-
bool hasReservedCallFrame(MachineFunction &MF) const;
void eliminateCallFramePseudoInstr(MachineFunction &MF,
Modified: llvm/branches/Apple/Leela/lib/Target/ARM/Thumb2RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/ARM/Thumb2RegisterInfo.cpp?rev=85416&r1=85415&r2=85416&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/ARM/Thumb2RegisterInfo.cpp (original)
+++ llvm/branches/Apple/Leela/lib/Target/ARM/Thumb2RegisterInfo.cpp Wed Oct 28 13:42:37 2009
@@ -1,4 +1,4 @@
-//===- Thumb2RegisterInfo.cpp - Thumb-2 Register Information -------*- C++ -*-===//
+//===- Thumb2RegisterInfo.cpp - Thumb-2 Register Information ----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -7,7 +7,8 @@
//
//===----------------------------------------------------------------------===//
//
-// This file contains the Thumb-2 implementation of the TargetRegisterInfo class.
+// This file contains the Thumb-2 implementation of the TargetRegisterInfo
+// class.
//
//===----------------------------------------------------------------------===//
@@ -60,8 +61,3 @@
.addReg(DestReg, getDefRegState(true), SubIdx)
.addConstantPoolIndex(Idx).addImm((int64_t)ARMCC::AL).addReg(0);
}
-
-bool Thumb2RegisterInfo::
-requiresRegisterScavenging(const MachineFunction &MF) const {
- return true;
-}
Modified: llvm/branches/Apple/Leela/lib/Target/ARM/Thumb2RegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Target/ARM/Thumb2RegisterInfo.h?rev=85416&r1=85415&r2=85416&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Target/ARM/Thumb2RegisterInfo.h (original)
+++ llvm/branches/Apple/Leela/lib/Target/ARM/Thumb2RegisterInfo.h Wed Oct 28 13:42:37 2009
@@ -35,8 +35,6 @@
unsigned DestReg, unsigned SubIdx, int Val,
ARMCC::CondCodes Pred = ARMCC::AL,
unsigned PredReg = 0) const;
-
- bool requiresRegisterScavenging(const MachineFunction &MF) const;
};
}
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