[llvm-branch-commits] [llvm-branch] r84961 - in /llvm/branches/Apple/Leela: lib/Transforms/Scalar/CodeGenPrepare.cpp test/CodeGen/X86/codegen-prepare-extload.ll test/CodeGen/X86/stack-color-with-reg.ll
Bill Wendling
isanbard at gmail.com
Fri Oct 23 11:27:24 PDT 2009
Author: void
Date: Fri Oct 23 13:27:24 2009
New Revision: 84961
URL: http://llvm.org/viewvc/llvm-project?rev=84961&view=rev
Log:
$ svn merge -c 84271 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r84271 into '.':
U test/CodeGen/X86/stack-color-with-reg.ll
A test/CodeGen/X86/codegen-prepare-extload.ll
U lib/Transforms/Scalar/CodeGenPrepare.cpp
Added:
llvm/branches/Apple/Leela/test/CodeGen/X86/codegen-prepare-extload.ll
- copied unchanged from r84271, llvm/trunk/test/CodeGen/X86/codegen-prepare-extload.ll
Modified:
llvm/branches/Apple/Leela/lib/Transforms/Scalar/CodeGenPrepare.cpp
llvm/branches/Apple/Leela/test/CodeGen/X86/stack-color-with-reg.ll
Modified: llvm/branches/Apple/Leela/lib/Transforms/Scalar/CodeGenPrepare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/lib/Transforms/Scalar/CodeGenPrepare.cpp?rev=84961&r1=84960&r2=84961&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/lib/Transforms/Scalar/CodeGenPrepare.cpp (original)
+++ llvm/branches/Apple/Leela/lib/Transforms/Scalar/CodeGenPrepare.cpp Fri Oct 23 13:27:24 2009
@@ -73,6 +73,7 @@
DenseMap<Value*,Value*> &SunkAddrs);
bool OptimizeInlineAsmInst(Instruction *I, CallSite CS,
DenseMap<Value*,Value*> &SunkAddrs);
+ bool MoveExtToFormExtLoad(Instruction *I);
bool OptimizeExtUses(Instruction *I);
void findLoopBackEdges(const Function &F);
};
@@ -731,6 +732,43 @@
return MadeChange;
}
+/// MoveExtToFormExtLoad - Move a zext or sext fed by a load into the same
+/// basic block as the load, unless conditions are unfavorable. This allows
+/// SelectionDAG to fold the extend into the load.
+///
+bool CodeGenPrepare::MoveExtToFormExtLoad(Instruction *I) {
+ // Look for a load being extended.
+ LoadInst *LI = dyn_cast<LoadInst>(I->getOperand(0));
+ if (!LI) return false;
+
+ // If they're already in the same block, there's nothing to do.
+ if (LI->getParent() == I->getParent())
+ return false;
+
+ // If the load has other users and the truncate is not free, this probably
+ // isn't worthwhile.
+ if (!LI->hasOneUse() &&
+ TLI && !TLI->isTruncateFree(I->getType(), LI->getType()))
+ return false;
+
+ // Check whether the target supports casts folded into loads.
+ unsigned LType;
+ if (isa<ZExtInst>(I))
+ LType = ISD::ZEXTLOAD;
+ else {
+ assert(isa<SExtInst>(I) && "Unexpected ext type!");
+ LType = ISD::SEXTLOAD;
+ }
+ if (TLI && !TLI->isLoadExtLegal(LType, TLI->getValueType(LI->getType())))
+ return false;
+
+ // Move the extend into the same block as the load, so that SelectionDAG
+ // can fold it.
+ I->removeFromParent();
+ I->insertAfter(LI);
+ return true;
+}
+
bool CodeGenPrepare::OptimizeExtUses(Instruction *I) {
BasicBlock *DefBB = I->getParent();
@@ -846,8 +884,10 @@
MadeChange |= Change;
}
- if (!Change && (isa<ZExtInst>(I) || isa<SExtInst>(I)))
+ if (!Change && (isa<ZExtInst>(I) || isa<SExtInst>(I))) {
+ MadeChange |= MoveExtToFormExtLoad(I);
MadeChange |= OptimizeExtUses(I);
+ }
} else if (CmpInst *CI = dyn_cast<CmpInst>(I)) {
MadeChange |= OptimizeCmpExpression(CI);
} else if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
Modified: llvm/branches/Apple/Leela/test/CodeGen/X86/stack-color-with-reg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Leela/test/CodeGen/X86/stack-color-with-reg.ll?rev=84961&r1=84960&r2=84961&view=diff
==============================================================================
--- llvm/branches/Apple/Leela/test/CodeGen/X86/stack-color-with-reg.ll (original)
+++ llvm/branches/Apple/Leela/test/CodeGen/X86/stack-color-with-reg.ll Fri Oct 23 13:27:24 2009
@@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t
-; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 5
-; RUN: grep asm-printer %t | grep 179
+; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 6
+; RUN: grep asm-printer %t | grep 177
type { [62 x %struct.Bitvec*] } ; type %0
type { i8* } ; type %1
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